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authorCosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>2026-01-05 13:44:44 +0200
committerVinod Koul <vkoul@kernel.org>2026-03-09 12:26:30 +0100
commit40dd470a95c0674515ca606757ffe174bd7d3f90 (patch)
treed567860d1e71270244acf7fa3f1bbc1eacba37d9 /rust/kernel/interop/git@git.tavy.me:linux-stable.git
parentbbb8b402d798f9f211376cee3d649d64dfc17880 (diff)
dt-bindings: dma: renesas,rz-dmac: document RZ/{T2H,N2H}
The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have three DMAC instances. Compared to the previously supported RZ/V2H, these SoCs are missing the error interrupt line and the reset lines, and they use a different ICU IP. Document them, and use RZ/T2H as a fallback for RZ/N2H as the DMACs are entirely compatible. Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260105114445.878262-4-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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