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| author | John Madieu <john.madieu.xa@bp.renesas.com> | 2026-03-18 09:51:18 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-03-25 18:40:50 +0100 |
| commit | 8af9fd59cb7737ca1c707db8e72774f5fa1576fd (patch) | |
| tree | bc8865fb2531818ade93d1fd0a70652b63c1641e /rust/kernel/gpu/git@git.tavy.me:linux-stable.git | |
| parent | 1ac57c9830cb0b586387367f88dbb10d21ec166c (diff) | |
arm64: dts: renesas: r9a09g047e57-smarc-som: Add PCIe reference clock
The RZ/G3E SMARC SoM has a fixed 100 MHz reference clock generator
for PCIe. Model it as a fixed-clock and assign it to the PCIe port.
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> # RZ/V2N EVK
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260318085119.44717-4-john.madieu.xa@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'rust/kernel/gpu/git@git.tavy.me:linux-stable.git')
0 files changed, 0 insertions, 0 deletions
