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| author | Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> | 2026-01-28 00:47:21 +0100 |
|---|---|---|
| committer | Abel Vesa <abel.vesa@oss.qualcomm.com> | 2026-03-19 16:15:32 +0200 |
| commit | d16f57caa78776e6e8a88b96cb2597797b376138 (patch) | |
| tree | fcccdd6599338e1f77309864de2aa2a92d345885 /include/mtd/git@git.tavy.me:linux-stable.git | |
| parent | d5dd8c523686153e29bc3e5ae0f854e13545535d (diff) | |
clk: imx8mq: Correct the CSI PHY sels
According to i.MX 8M Quad Reference Manual (Section 5.1.2 Table 5-1)
MIPI_CSI1_PHY_REF_CLK_ROOT and MIPI_CSI2_PHY_REF_CLK_ROOT have
SYSTEM_PLL2_DIV3 available as their second source, which corresponds
to sys2_pll_333m rather than sys2_pll_125m.
Fixes: b80522040cd3 ("clk: imx: Add clock driver for i.MX8MQ CCM")
Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Link: https://patch.msgid.link/20260128-imx8mq-csi-clk-v1-1-ac028ed26e8c@puri.sm
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Diffstat (limited to 'include/mtd/git@git.tavy.me:linux-stable.git')
0 files changed, 0 insertions, 0 deletions