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authorStephen Boyd <sboyd@kernel.org>2026-04-11 16:24:53 -0700
committerStephen Boyd <sboyd@kernel.org>2026-04-11 16:24:53 -0700
commit42ca4f0c9444bea688c2f4797b00cea0b3f842d9 (patch)
tree3d6f5d63856e2d5cc32d858e3aaa0a819dddefe8 /include/mtd/git@git.tavy.me:linux-stable.git
parentc369299895a591d96745d6492d4888259b004a9e (diff)
parente57c36bc1a3e459239ead492ebce731a88a264b1 (diff)
Merge tag 'samsung-clk-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into clk-samsung
Pull Samsung SoC clock driver updates from Krzysztof Kozlowski: - Axis ARTPEC-9: Add new PLL clocks and new drivers for eight clock controllers on the SoC - ExynosAutov920: Add G3D (GPU) clock controller - Exynos850: Define missing clock for the APM mailbox * tag 'samsung-clk-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: clk: samsung: exynos850: Add APM-to-AP mailbox clock dt-bindings: clock: exynos850: Add APM_AP MAILBOX clock clk: samsung: Use %pe format to simplify clk: samsung: pll: Fix possible truncation in a9fraco recalc rate clk: samsung: exynosautov920: add block G3D clock support dt-bindings: clock: exynosautov920: add G3D clock definitions clk: samsung: gs101: harmonise symbol names (clock arrays) clk: samsung: artpec-9: Add initial clock support for ARTPEC-9 SoC clk: samsung: Add clock PLL support for ARTPEC-9 SoC dt-bindings: clock: Add ARTPEC-9 clock controller
Diffstat (limited to 'include/mtd/git@git.tavy.me:linux-stable.git')
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