diff options
| author | Ovidiu Panait <ovidiu.panait.rb@renesas.com> | 2026-01-25 19:03:14 +0000 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-02-24 08:51:34 +0100 |
| commit | 79cac2b8dc1d9f63fbf6c6793e423052118cc51a (patch) | |
| tree | 99148b2ed1ca211be442311d08620f981237be77 /include/linux/tc_act/git@git.tavy.me:linux-stable.git | |
| parent | 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f (diff) | |
clk: renesas: r9a09g057: Fix ordering of module clocks array
The r9a09g057_mod_clks array is sorted by CPG_CLKON register number and
bit position. Move the RTC and RSPI module clock entries to their
correct position to restore the array sort order.
Fixes: 2efea3b35cc9 ("clk: renesas: r9a09g057: Add entries for RSCIs")
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260125190314.26729-1-ovidiu.panait.rb@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'include/linux/tc_act/git@git.tavy.me:linux-stable.git')
0 files changed, 0 insertions, 0 deletions