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| author | Biju Das <biju.das.jz@bp.renesas.com> | 2026-03-24 11:43:11 +0000 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-03-26 19:40:20 +0100 |
| commit | bf497e7babb5d14570b18b5d2c8a6bb14d4a733b (patch) | |
| tree | 266cfbccad119369c77708095989da52f0bc8a49 /include/linux/i2c/git@git.tavy.me:linux-stable.git | |
| parent | fa3e973ca2d7a46b9f4ad5611b42d1885d7a77b6 (diff) | |
clk: renesas: rzg2l: Re-enable critical module clocks during resume
After a suspend/resume cycle, critical module clocks (CLK_IS_CRITICAL)
may be left disabled as there is no owning driver to restore them,
unlike regular clocks.
Add rzg2l_mod_enable_crit_clock_init_mstop() which walks all module
clocks on resume, re-enables any critical clock found disabled, and then
restores the MSTOP state for clocks that have one via the existing
helper. This replaces the direct call to rzg2l_mod_clock_init_mstop()
in rzg2l_cpg_resume(), preserving the correct clock-before-MSTOP restore
ordering.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260324114329.268249-7-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'include/linux/i2c/git@git.tavy.me:linux-stable.git')
0 files changed, 0 insertions, 0 deletions