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authorStephen Boyd <sboyd@kernel.org>2026-04-11 16:03:44 -0700
committerStephen Boyd <sboyd@kernel.org>2026-04-11 16:03:44 -0700
commit98266d5f940a257d41661bef075057816589040f (patch)
tree18150930b0ffd1fa485354408108c820591a44c3 /include/linux/i2c/git@git.tavy.me:linux-stable.git
parent96df81372d0f4eb74903476bf31967cee1df3480 (diff)
parent77894661c00ab99053c9606f0f7ec673065f86ac (diff)
Merge tag 'renesas-clk-for-v7.1-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull more Renesas clk driver updates from Geert Uytterhoeven: - Add SPI clocks and resets on Renesas RZ/G3E - Add PCIe clocks and resets on Renesas RZ/V2N, RZ/V2H(P), and RZ/G3E - Enable watchdog reset on Renesas RZ/N1D - Remove clocks for watchdogs meant for other CPU cores on Renesas RZ/V2N - Handle critical clock during system resume on Renesas RZ/G2L, RZ/G2UL, and RZ/G3S - Add initial support for the Renesas RZ/G3L (R9A08G046) SoC * tag 'renesas-clk-for-v7.1-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: clk: renesas: Add support for RZ/G3L SoC dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3L SoC clk: renesas: rzg2l: Re-enable critical module clocks during resume clk: renesas: rzg2l: Add rzg2l_mod_clock_init_mstop_helper() clk: renesas: rzg2l: Add helper for mod clock enable/disable clk: renesas: r9a0{7g04[34],8g045}: Add critical reset entries clk: renesas: rzg2l: Add support for critical resets clk: renesas: r9a09g056: Remove entries for WDT{0,2,3} clk: renesas: r9a06g032: Enable watchdog reset sources clk: renesas: cpg-mssr: Use struct_size() helper clk: renesas: r9a09g047: Add PCIe clocks and reset clk: renesas: r9a09g057: Add PCIe clocks and reset clk: renesas: r9a09g056: Add PCIe clocks and reset clk: renesas: r9a09g047: Add entries for the RSPIs
Diffstat (limited to 'include/linux/i2c/git@git.tavy.me:linux-stable.git')
0 files changed, 0 insertions, 0 deletions