diff options
| author | Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> | 2026-05-20 17:51:32 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-07-05 14:37:23 -0500 |
| commit | fc54caf87a5a7289502ecbcdc80bb71f7bb5de9c (patch) | |
| tree | f2af17f2c4f8f6a2965af68a192a7886bb9860d7 /drivers | |
| parent | 5a9f4c535ae05facd4f6ef116b18062f9f2ad768 (diff) | |
soc: qcom: ubwc: drop macrotile_mode from the database
All the users have been migrated to using qcom_ubwc_macrotile_mode()
instead of reading the raw value from the config structure. Drop the
field from struct qcom_ubwc_cfg_data and replace it with the calculated
value. Split single UBWC_3_0 into UBWC_3_0 (no macrotile mode) and
UBWC_3_1 (with macrotile mode).
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260520-ubwc-rework-v5-25-72f2749bc807@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/soc/qcom/ubwc_config.c | 18 |
1 files changed, 3 insertions, 15 deletions
diff --git a/drivers/soc/qcom/ubwc_config.c b/drivers/soc/qcom/ubwc_config.c index 35cde4e9a238..8dd91d0b3974 100644 --- a/drivers/soc/qcom/ubwc_config.c +++ b/drivers/soc/qcom/ubwc_config.c @@ -22,7 +22,6 @@ static const struct qcom_ubwc_cfg_data eliza_data = { UBWC_SWIZZLE_ENABLE_LVL3, /* TODO: highest_bank_bit = 14 for LP_DDR4 */ .highest_bank_bit = 15, - .macrotile_mode = true, }; static const struct qcom_ubwc_cfg_data kaanapali_data = { @@ -30,7 +29,6 @@ static const struct qcom_ubwc_cfg_data kaanapali_data = { .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, .highest_bank_bit = 16, - .macrotile_mode = true, }; static const struct qcom_ubwc_cfg_data msm8937_data = { @@ -58,15 +56,13 @@ static const struct qcom_ubwc_cfg_data sa8775p_data = { .ubwc_enc_version = UBWC_4_0, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL3, .highest_bank_bit = 13, - .macrotile_mode = true, }; static const struct qcom_ubwc_cfg_data sar2130p_data = { - .ubwc_enc_version = UBWC_3_0, /* 4.0.2 in hw */ + .ubwc_enc_version = UBWC_3_1, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, .highest_bank_bit = 13, - .macrotile_mode = true, }; static const struct qcom_ubwc_cfg_data sc7180_data = { @@ -77,19 +73,17 @@ static const struct qcom_ubwc_cfg_data sc7180_data = { }; static const struct qcom_ubwc_cfg_data sc7280_data = { - .ubwc_enc_version = UBWC_3_0, + .ubwc_enc_version = UBWC_3_1, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, .highest_bank_bit = 14, - .macrotile_mode = true, }; static const struct qcom_ubwc_cfg_data sc8180x_data = { - .ubwc_enc_version = UBWC_3_0, + .ubwc_enc_version = UBWC_3_1, .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, .highest_bank_bit = 16, - .macrotile_mode = true, }; static const struct qcom_ubwc_cfg_data sc8280xp_data = { @@ -97,7 +91,6 @@ static const struct qcom_ubwc_cfg_data sc8280xp_data = { .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 | UBWC_SWIZZLE_ENABLE_LVL3, .highest_bank_bit = 16, - .macrotile_mode = true, }; static const struct qcom_ubwc_cfg_data sdm670_data = { @@ -164,7 +157,6 @@ static const struct qcom_ubwc_cfg_data sm8250_data = { UBWC_SWIZZLE_ENABLE_LVL3, /* TODO: highest_bank_bit = 15 for LP_DDR4 */ .highest_bank_bit = 16, - .macrotile_mode = true, }; static const struct qcom_ubwc_cfg_data sm8350_data = { @@ -173,7 +165,6 @@ static const struct qcom_ubwc_cfg_data sm8350_data = { UBWC_SWIZZLE_ENABLE_LVL3, /* TODO: highest_bank_bit = 15 for LP_DDR4 */ .highest_bank_bit = 16, - .macrotile_mode = true, }; static const struct qcom_ubwc_cfg_data sm8550_data = { @@ -182,7 +173,6 @@ static const struct qcom_ubwc_cfg_data sm8550_data = { UBWC_SWIZZLE_ENABLE_LVL3, /* TODO: highest_bank_bit = 15 for LP_DDR4 */ .highest_bank_bit = 16, - .macrotile_mode = true, }; static const struct qcom_ubwc_cfg_data sm8750_data = { @@ -190,7 +180,6 @@ static const struct qcom_ubwc_cfg_data sm8750_data = { .ubwc_swizzle = 6, /* TODO: highest_bank_bit = 15 for LP_DDR4 */ .highest_bank_bit = 16, - .macrotile_mode = true, }; static const struct qcom_ubwc_cfg_data glymur_data = { @@ -198,7 +187,6 @@ static const struct qcom_ubwc_cfg_data glymur_data = { .ubwc_swizzle = 0, /* TODO: highest_bank_bit = 15 for LP_DDR4 */ .highest_bank_bit = 16, - .macrotile_mode = true, }; static const struct of_device_id qcom_ubwc_configs[] __maybe_unused = { |