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path: root/sys/dev/clk
AgeCommit message (Expand)Author
2 daysrockship: Fix a typo in a source code commentGordon Bergling
2024-12-16Add StarFive JH7110's STG clocksJari Sihvola
2024-12-16jh7110: Add sys clocks for STG & PCIEJari Sihvola
2024-12-06Replace calls to bus_generic_attach with bus_attach_childrenJohn Baldwin
2024-11-16riscv: Allwinner D1 clock and reset driverJulien Cassette
2024-05-07jh7110: Add StarFive JH7110 clock/reset generator driversJari Sihvola
2024-05-07Revert "jh7110: Add StarFive JH7110 clock/reset generator drivers"Mitchell Horne
2024-05-07jh7110: Add StarFive JH7110 clock/reset generator driversMitchell Horne
2024-03-08clkdom_dump(): improve output textMitchell Horne
2024-03-08clk_fixed: quiet by defaultMitchell Horne
2024-03-08clk_fixed: call clkdom_dump() for verbose bootMitchell Horne
2024-01-10syscon: Move syscon code in dev/sysconEmmanuel Vadot
2024-01-10hwreset: Move reset code in dev/hwresetEmmanuel Vadot
2024-01-10clk: Move clock code in dev/clkEmmanuel Vadot
2024-01-10clk: Move rockchip driver into the common directoryEmmanuel Vadot
2024-01-10clk: Move allwinner driver into the common directoryEmmanuel Vadot
2023-10-12xilinx: reset: Remove debug printfsEmmanuel Vadot
2023-09-18arm64: zynqmp: Add clock driverEmmanuel Vadot
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