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authorMarcel Moolenaar <marcel@FreeBSD.org>2007-03-28 18:34:59 +0000
committerMarcel Moolenaar <marcel@FreeBSD.org>2007-03-28 18:34:59 +0000
commitebecffe930384eb44d9ba75f052d25b9dc41c91d (patch)
treea931c4313990d5047145bda735ad2cddd6fda407 /sys/dev/uart
parent1c5e367bcca17bd3688e87bb82424bee540bd379 (diff)
For embedded UARTs compatible with the ns8250 family it is possible
that the driver clock is identical to the processor or bus clock. This is the case for the PowerQUICC processor. When the clock is high enough, overflows happen in the calculation of the time it takes to send 1/10 of a character, used in delay loops. Fix the overflows so as to fix bugs in the delay loops that can cause either insufficient delays or excessive delays.
Notes
Notes: svn path=/head/; revision=168000
Diffstat (limited to 'sys/dev/uart')
-rw-r--r--sys/dev/uart/uart_dev_ns8250.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/sys/dev/uart/uart_dev_ns8250.c b/sys/dev/uart/uart_dev_ns8250.c
index 4262f8d53b7b..8e6177be329d 100644
--- a/sys/dev/uart/uart_dev_ns8250.c
+++ b/sys/dev/uart/uart_dev_ns8250.c
@@ -81,7 +81,9 @@ ns8250_delay(struct uart_bas *bas)
uart_barrier(bas);
/* 1/10th the time to transmit 1 character (estimate). */
- return (16000000 * divisor / bas->rclk);
+ if (divisor <= 134)
+ return (16000000 * divisor / bas->rclk);
+ return (16000 * divisor / (bas->rclk / 1000));
}
static int