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authorDimitry Andric <dim@FreeBSD.org>2025-12-27 23:21:13 +0100
committerDimitry Andric <dim@FreeBSD.org>2025-12-27 23:21:13 +0100
commit294ba569803972323a64670451a82af53c660541 (patch)
tree1432420370a4676c985c5b9c06145f8a00223f88 /llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
parent7f920884cd004f9e2e60b3efda5bd75f287faa9d (diff)
Vendor import of llvm-project branch release/21.x llvmorg-21.1.7-0-gcd708029e0b2, a.k.a. 21.1.7 release.vendor/llvm-project/llvmorg-21.1.7-0-gcd708029e0b2
Diffstat (limited to 'llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp')
-rw-r--r--llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index 56ead92187b0..70cfb4b836cc 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -1567,6 +1567,7 @@ InstructionCost RISCVTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst,
// scalarized if the legalized Src and Dst are not equal sized.
const DataLayout &DL = this->getDataLayout();
if (!SrcLT.second.isVector() || !DstLT.second.isVector() ||
+ !SrcLT.first.isValid() || !DstLT.first.isValid() ||
!TypeSize::isKnownLE(DL.getTypeSizeInBits(Src),
SrcLT.second.getSizeInBits()) ||
!TypeSize::isKnownLE(DL.getTypeSizeInBits(Dst),