From b1d0c412088e3908821ef2ec52e2c0e5e7f5a535 Mon Sep 17 00:00:00 2001 From: Ivan Vecera Date: Tue, 30 Jun 2026 14:55:32 +0200 Subject: dpll: add STATE_CONNECTED_OVERRIDE pin capability Add DPLL_PIN_CAPABILITIES_STATE_CONNECTED_OVERRIDE capability flag that indicates a pin can be set to connected regardless of the current DPLL device mode, overriding the active input selection. This is useful for automatic-only DPLL devices where mode cannot be switched to manual, allowing userspace to directly connect such pin from automatic mode. The capability requires STATE_CAN_CHANGE to be set as well; dpll_pin_register() warns if a driver violates this. Document the new capability in the Pin selection section of Documentation/driver-api/dpll.rst. Signed-off-by: Ivan Vecera Link: https://patch.msgid.link/20260630125536.720717-2-ivecera@redhat.com Signed-off-by: Paolo Abeni --- include/uapi/linux/dpll.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include/uapi/linux') diff --git a/include/uapi/linux/dpll.h b/include/uapi/linux/dpll.h index 55eaa82f5f98..5d7ca6a413cd 100644 --- a/include/uapi/linux/dpll.h +++ b/include/uapi/linux/dpll.h @@ -208,11 +208,15 @@ enum dpll_pin_operstate { * @DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE: pin direction can be changed * @DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE: pin priority can be changed * @DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE: pin state can be changed + * @DPLL_PIN_CAPABILITIES_STATE_CONNECTED_OVERRIDE: pin state can be set to + * connected regardless of current DPLL device mode, overriding the active + * input selection. Requires state-can-change to be set as well. */ enum dpll_pin_capabilities { DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE = 1, DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE = 2, DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE = 4, + DPLL_PIN_CAPABILITIES_STATE_CONNECTED_OVERRIDE = 8, }; #define DPLL_PHASE_OFFSET_DIVIDER 1000 -- cgit v1.2.3 From 0cc8348a9786727e3622f833f442e8b45e2d363b Mon Sep 17 00:00:00 2001 From: Ivan Vecera Date: Tue, 30 Jun 2026 14:55:33 +0200 Subject: dpll: add DPLL_PIN_TYPE_INT_NCO pin type Add DPLL_PIN_TYPE_INT_NCO pin type for virtual pins representing the NCO mode of a DPLL. When connected as a DPLL input, the DPLL enters NCO mode where the output frequency is adjusted by the host via the PTP clock interface. Update the fractional-frequency-offset and fractional-frequency- offset-ppt attribute documentation to note that for INT_NCO pins these attributes represent the DPLL's current output frequency offset from its nominal frequency. Reviewed-by: Jiri Pirko Signed-off-by: Ivan Vecera Link: https://patch.msgid.link/20260630125536.720717-3-ivecera@redhat.com Signed-off-by: Paolo Abeni --- include/uapi/linux/dpll.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include/uapi/linux') diff --git a/include/uapi/linux/dpll.h b/include/uapi/linux/dpll.h index 5d7ca6a413cd..85b898b1db5e 100644 --- a/include/uapi/linux/dpll.h +++ b/include/uapi/linux/dpll.h @@ -129,6 +129,9 @@ enum dpll_type { * @DPLL_PIN_TYPE_SYNCE_ETH_PORT: ethernet port PHY's recovered clock * @DPLL_PIN_TYPE_INT_OSCILLATOR: device internal oscillator * @DPLL_PIN_TYPE_GNSS: GNSS recovered clock + * @DPLL_PIN_TYPE_INT_NCO: Device internal numerically controlled oscillator. + * When connected as a DPLL input, the DPLL enters NCO mode where the output + * frequency is adjusted by the host via the PTP clock interface. */ enum dpll_pin_type { DPLL_PIN_TYPE_MUX = 1, @@ -136,6 +139,7 @@ enum dpll_pin_type { DPLL_PIN_TYPE_SYNCE_ETH_PORT, DPLL_PIN_TYPE_INT_OSCILLATOR, DPLL_PIN_TYPE_GNSS, + DPLL_PIN_TYPE_INT_NCO, /* private: */ __DPLL_PIN_TYPE_MAX, -- cgit v1.2.3