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2025-09-02net: mctp: usb: initialise mac header in RX pathJeremy Kerr
We're not currently setting skb->mac_header on ingress, and the netdev core rx path expects it. Without it, we'll hit a warning on DEBUG_NETDEV from commit 1e4033b53db4 ("net: skb_reset_mac_len() must check if mac_header was set") Initialise the mac_header to refer to the USB transport header. Fixes: 0791c0327a6e ("net: mctp: Add MCTP USB transport driver") Signed-off-by: Jeremy Kerr <jk@codeconstruct.com.au> Link: https://patch.msgid.link/20250829-mctp-usb-mac-header-v1-1-338ad725e183@codeconstruct.com.au Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-09-02PCI/MSI: Check MSI_FLAG_PCI_MSI_MASK_PARENT in cond_[startup|shutdown]_parent()Inochi Amaoto
For MSI controllers which only support MSI_FLAG_PCI_MSI_MASK_PARENT, the newly added callback irq_startup() and irq_shutdown() for pci_msi[x]_template will not unmask or mask the interrupt when startup() resp. shutdown() is invoked. This prevents the interrupt from being enabled resp. disabled. Invoke irq_[un]mask_parent() in cond_[startup|shutdown]_parent(), when the interrupt has the MSI_FLAG_PCI_MSI_MASK_PARENT flag set. Fixes: 54f45a30c0d0 ("PCI/MSI: Add startup/shutdown for per device domains") Reported-by: Linux Kernel Functional Testing <lkft@linaro.org> Reported-by: Nathan Chancellor <nathan@kernel.org> Reported-by: Wei Fang <wei.fang@nxp.com> Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Nathan Chancellor <nathan@kernel.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Wei Fang <wei.fang@nxp.com> Tested-by: Chen Wang <unicorn_wang@outlook.com> # Pioneerbox/SG2042 Acked-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://lore.kernel.org/all/20250827230943.17829-1-inochiama@gmail.com Closes: https://lore.kernel.org/regressions/aK4O7Hl8NCVEMznB@monster/ Closes: https://lore.kernel.org/regressions/20250826220959.GA4119563@ax162/ Closes: https://lore.kernel.org/all/20250827093911.1218640-1-wei.fang@nxp.com/
2025-09-02leds: leds-lp55xx: Use correct address for memory programmingAndrei Lalaev
Memory programming doesn't work for devices without page support. For example, LP5562 has 3 engines but doesn't support pages, the start address is changed depending on engine number. According to datasheet [1], the PROG MEM register addresses for each engine are as follows: Engine 1: 0x10 Engine 2: 0x30 Engine 3: 0x50 However, the current implementation incorrectly calculates the address of PROG MEM register using the engine index starting from 1: prog_mem_base = 0x10 LP55xx_BYTES_PER_PAGE = 0x20 Engine 1: 0x10 + 0x20 * 1 = 0x30 Engine 2: 0x10 + 0x20 * 2 = 0x50 Engine 3: 0x10 + 0x20 * 3 = 0x70 This results in writing to the wrong engine memory, causing pattern programming to fail. To correct it, the engine index should be decreased: Engine 1: 0x10 + 0x20 * 0 = 0x10 Engine 2: 0x10 + 0x20 * 1 = 0x30 Engine 3: 0x10 + 0x20 * 2 = 0x50 1 - https://www.ti.com/lit/ds/symlink/lp5562.pdf Fixes: 31379a57cf2f ("leds: leds-lp55xx: Generalize update_program_memory function") Signed-off-by: Andrei Lalaev <andrei.lalaev@anton-paar.com> Link: https://lore.kernel.org/r/20250820-lp5562-prog-mem-address-v1-1-8569647fa71d@anton-paar.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-09-02tpm: Add a driver for Loongson TPM deviceQunqin Zhao
Loongson Security Engine supports random number generation, hash, symmetric encryption and asymmetric encryption. Based on these encryption functions, TPM2 have been implemented in the Loongson Security Engine firmware. This driver is responsible for copying data into the memory visible to the firmware and receiving data from the firmware. Co-developed-by: Yinggang Gu <guyinggang@loongson.cn> Signed-off-by: Yinggang Gu <guyinggang@loongson.cn> Signed-off-by: Qunqin Zhao <zhaoqunqin@loongson.cn> Reviewed-by: Huacai Chen <chenhuacai@loongson.cn> Reviewed-by: Jarkko Sakkinen <jarkko@kernel.org> Link: https://lore.kernel.org/r/20250705072045.1067-4-zhaoqunqin@loongson.cn Signed-off-by: Lee Jones <lee@kernel.org>
2025-09-02crypto: loongson - add Loongson RNG driver supportQunqin Zhao
Loongson's Random Number Generator is found inside Loongson Security Engine chip. Co-developed-by: Yinggang Gu <guyinggang@loongson.cn> Signed-off-by: Yinggang Gu <guyinggang@loongson.cn> Signed-off-by: Qunqin Zhao <zhaoqunqin@loongson.cn> Reviewed-by: Huacai Chen <chenhuacai@loongson.cn> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Link: https://lore.kernel.org/r/20250705072045.1067-3-zhaoqunqin@loongson.cn Signed-off-by: Lee Jones <lee@kernel.org>
2025-09-02mfd: Add support for Loongson Security Engine chip controllerQunqin Zhao
Loongson Security Engine chip supports RNG, SM2, SM3 and SM4 accelerator engines. This is the base driver for other specific engine drivers. Co-developed-by: Yinggang Gu <guyinggang@loongson.cn> Signed-off-by: Yinggang Gu <guyinggang@loongson.cn> Signed-off-by: Qunqin Zhao <zhaoqunqin@loongson.cn> Reviewed-by: Huacai Chen <chenhuacai@loongson.cn> Link: https://lore.kernel.org/r/20250705072045.1067-2-zhaoqunqin@loongson.cn Signed-off-by: Lee Jones <lee@kernel.org>
2025-09-02rnull: add soft-irq completion supportAndreas Hindborg
rnull currently only supports direct completion. Add option for completing requests across CPU nodes via soft IRQ or IPI. Reviewed-by: Alice Ryhl <aliceryhl@google.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Signed-off-by: Andreas Hindborg <a.hindborg@kernel.org> Link: https://lore.kernel.org/r/20250902-rnull-up-v6-16-v7-17-b5212cc89b98@kernel.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2025-09-02rust: block: add remote completion to `Request`Andreas Hindborg
Allow users of rust block device driver API to schedule completion of requests via `blk_mq_complete_request_remote`. Reviewed-by: Alice Ryhl <aliceryhl@google.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Signed-off-by: Andreas Hindborg <a.hindborg@kernel.org> Link: https://lore.kernel.org/r/20250902-rnull-up-v6-16-v7-16-b5212cc89b98@kernel.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2025-09-02rust: block: add `GenDisk` private data supportAndreas Hindborg
Allow users of the rust block device driver API to install private data in the `GenDisk` structure. Reviewed-by: Alice Ryhl <aliceryhl@google.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Signed-off-by: Andreas Hindborg <a.hindborg@kernel.org> Link: https://lore.kernel.org/r/20250902-rnull-up-v6-16-v7-14-b5212cc89b98@kernel.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2025-09-02rnull: enable configuration via `configfs`Andreas Hindborg
Allow rust null block devices to be configured and instantiated via `configfs`. Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Reviewed-by: Alice Ryhl <aliceryhl@google.com> Signed-off-by: Andreas Hindborg <a.hindborg@kernel.org> Link: https://lore.kernel.org/r/20250902-rnull-up-v6-16-v7-13-b5212cc89b98@kernel.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2025-09-02rnull: move driver to separate directoryAndreas Hindborg
The rust null block driver is about to gain some additional modules. Rather than pollute the current directory, move the driver to a subdirectory. Reviewed-by: Alice Ryhl <aliceryhl@google.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Signed-off-by: Andreas Hindborg <a.hindborg@kernel.org> Link: https://lore.kernel.org/r/20250902-rnull-up-v6-16-v7-12-b5212cc89b98@kernel.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2025-09-02net: enetc: don't update sync packet checksum if checksum offload is usedWei Fang
For ENETC v4, the hardware has the capability to support Tx checksum offload. so the enetc driver does not need to update the UDP checksum of PTP sync packets if Tx checksum offload is enabled. Signed-off-by: Wei Fang <wei.fang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20250829050615.1247468-15-wei.fang@nxp.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-09-02net: enetc: add PTP synchronization support for ENETC v4Wei Fang
Regarding PTP, ENETC v4 has some changes compared to ENETC v1 (LS1028A), mainly as follows. 1. ENETC v4 uses a different PTP driver, so the way to get phc_index is different from LS1028A. Therefore, enetc_get_ts_info() has been modified appropriately to be compatible with ENETC v1 and v4. 2. The PMa_SINGLE_STEP register has changed in ENETC v4, not only the register offset, but also some register fields. Therefore, two helper functions are added, enetc_set_one_step_ts() for ENETC v1 and enetc4_set_one_step_ts() for ENETC v4. 3. Since the generic helper functions from ptp_clock are used to get the PHC index of the PTP clock, so FSL_ENETC_CORE depends on Kconfig symbol "PTP_1588_CLOCK_OPTIONAL". But FSL_ENETC_CORE can only be selected, so add the dependency to FSL_ENETC, FSL_ENETC_VF and NXP_ENETC4. Perhaps the best approach would be to change FSL_ENETC_CORE to a visible menu entry. Then make FSL_ENETC, FSL_ENETC_VF, and NXP_ENETC4 depend on it, but this is not the goal of this patch, so this may be changed in the future. Signed-off-by: Wei Fang <wei.fang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20250829050615.1247468-14-wei.fang@nxp.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-09-02net: enetc: move sync packet modification before dma_map_single()Wei Fang
Move sync packet content modification before dma_map_single() to follow correct DMA usage process, even though the previous sequence worked due to hardware DMA-coherence support (LS1028A). But for the upcoming i.MX95, its ENETC (v4) does not support "dma-coherent", so this step is very necessary. Otherwise, the originTimestamp and correction fields of the sent packets will still be the values before the modification. Signed-off-by: Wei Fang <wei.fang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20250829050615.1247468-13-wei.fang@nxp.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-09-02net: enetc: remove unnecessary CONFIG_FSL_ENETC_PTP_CLOCK checkWei Fang
The ENETC_F_RX_TSTAMP flag of priv->active_offloads can only be set when CONFIG_FSL_ENETC_PTP_CLOCK is enabled. Similarly, rx_ring->ext_en can only be set when CONFIG_FSL_ENETC_PTP_CLOCK is enabled as well. So it is safe to remove unnecessary CONFIG_FSL_ENETC_PTP_CLOCK check. Signed-off-by: Wei Fang <wei.fang@nxp.com> Reviewed-by: Vadim Fedorenko <vadim.fedorenko@linux.dev> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20250829050615.1247468-12-wei.fang@nxp.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-09-02net: enetc: extract enetc_update_ptp_sync_msg() to handle PTP Sync packetsWei Fang
Move PTP Sync packet processing from enetc_map_tx_buffs() to a new helper function enetc_update_ptp_sync_msg() to simplify the original function. Prepare for upcoming ENETC v4 one-step support. There is no functional change. It is worth mentioning that ENETC_TXBD_TSTAMP is added to replace 0x3fffffff. Prepare for upcoming ENETC v4 one-step support. Signed-off-by: Wei Fang <wei.fang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20250829050615.1247468-11-wei.fang@nxp.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-09-02net: enetc: save the parsed information of PTP packet to skb->cbWei Fang
Currently, the Tx PTP packets are parsed twice in the enetc driver, once in enetc_xmit() and once in enetc_map_tx_buffs(). The latter is duplicate and is unnecessary, since the parsed information can be saved to skb->cb so that enetc_map_tx_buffs() can get the previously parsed data from skb->cb. Therefore, add struct enetc_skb_cb as the format of the data in the skb->cb buffer to save the parsed information of PTP packet. Use saved information in enetc_map_tx_buffs() to avoid parsing data again. In addition, rename variables offset1 and offset2 in enetc_map_tx_buffs() to corr_off and tstamp_off for better readability. Signed-off-by: Wei Fang <wei.fang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20250829050615.1247468-10-wei.fang@nxp.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-09-02ptp: netc: add external trigger stamp supportF.S. Peng
The NETC Timer is capable of recording the timestamp on receipt of an external pulse on a GPIO pin. It supports two such external triggers. The recorded value is saved in a 16 entry FIFO accessed by TMR_ETTSa_H/L. An interrupt can be generated when the trigger occurs, when the FIFO reaches a threshold or overflows. Signed-off-by: F.S. Peng <fushi.peng@nxp.com> Signed-off-by: Wei Fang <wei.fang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20250829050615.1247468-8-wei.fang@nxp.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-09-02ptp: netc: add periodic pulse output supportWei Fang
NETC Timer has three pulse channels, all of which support periodic pulse output. Bind the channel to a ALARM register and then sets a future time into the ALARM register. When the current time is greater than the ALARM value, the FIPER register will be triggered to count down, and when the count reaches 0, the pulse will be triggered. The PPS signal is also implemented in this way. i.MX95 only has ALARM1 can be used as an indication to the FIPER start down counting, but i.MX943 has ALARM1 and ALARM2 can be used. Therefore, only one channel can work for i.MX95, two channels for i.MX943 as most. In addition, change the PPS channel to be dynamically selected from fixed number (0) because add PTP_CLK_REQ_PEROUT support. Signed-off-by: Wei Fang <wei.fang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20250829050615.1247468-7-wei.fang@nxp.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-09-02ptp: netc: add PTP_CLK_REQ_PPS supportWei Fang
The NETC Timer is capable of generating a PPS interrupt to the host. To support this feature, a 64-bit alarm time (which is a integral second of PHC in the future) is set to TMR_ALARM, and the period is set to TMR_FIPER. The alarm time is compared to the current time on each update, then the alarm trigger is used as an indication to the TMR_FIPER starts down counting. After the period has passed, the PPS event is generated. According to the NETC block guide, the Timer has three FIPERs, any of which can be used to generate the PPS events, but in the current implementation, we only need one of them to implement the PPS feature, so FIPER 0 is used as the default PPS generator. Also, the Timer has 2 ALARMs, currently, ALARM 0 is used as the default time comparator. However, if the time is adjusted or the integer of period is changed when PPS is enabled, the PPS event will not be generated at an integral second of PHC. The suggested steps from IP team if time drift happens: 1. Disable FIPER before adjusting the hardware time 2. Rearm ALARM after the time adjustment to make the next PPS event be generated at an integral second of PHC. 3. Re-enable FIPER. Signed-off-by: Wei Fang <wei.fang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20250829050615.1247468-6-wei.fang@nxp.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-09-02ptp: netc: add NETC V4 Timer PTP driver supportWei Fang
NETC V4 Timer provides current time with nanosecond resolution, precise periodic pulse, pulse on timeout (alarm), and time capture on external pulse support. And it supports time synchronization as required for IEEE 1588 and IEEE 802.1AS-2020. Inside NETC, ENETC can capture the timestamp of the sent/received packet through the PHC provided by the Timer and record it on the Tx/Rx BD. And through the relevant PHC interfaces provided by the driver, the enetc V4 driver can support PTP time synchronization. In addition, NETC V4 Timer is similar to the QorIQ 1588 timer, but it is not exactly the same. The current ptp-qoriq driver is not compatible with NETC V4 Timer, most of the code cannot be reused, see below reasons. 1. The architecture of ptp-qoriq driver makes the register offset fixed, however, the offsets of all the high registers and low registers of V4 are swapped, and V4 also adds some new registers. so extending ptp-qoriq to make it compatible with V4 Timer is tantamount to completely rewriting ptp-qoriq driver. 2. The usage of some functions is somewhat different from QorIQ timer, such as the setting of TCLK_PERIOD and TMR_ADD, the logic of configuring PPS, etc., so making the driver compatible with V4 Timer will undoubtedly increase the complexity of the code and reduce readability. 3. QorIQ is an expired brand. It is difficult for us to verify whether it works stably on the QorIQ platforms if we refactor the driver, and this will make maintenance difficult, so refactoring the driver obviously does not bring any benefits. Therefore, add this new driver for NETC V4 Timer. Note that the missing features like PEROUT, PPS and EXTTS will be added in subsequent patches. Signed-off-by: Wei Fang <wei.fang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20250829050615.1247468-5-wei.fang@nxp.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-09-02ptp: add helpers to get the phc_index by of_node or devWei Fang
Some Ethernet controllers do not have an integrated PTP timer function. Instead, the PTP timer is a separated device and provides PTP hardware clock to the Ethernet controller to use. Therefore, the Ethernet controller driver needs to obtain the PTP clock's phc_index in its ethtool_ops::get_ts_info(). Currently, most drivers implement this in the following ways. 1. The PTP device driver adds a custom API and exports it to the Ethernet controller driver. 2. The PTP device driver adds private data to its device structure. So the private data structure needs to be exposed to the Ethernet controller driver. When registering the ptp clock, ptp_clock_register() always saves the ptp_clock pointer to the private data of ptp_clock::dev. Therefore, as long as ptp_clock::dev is obtained, the phc_index can be obtained. So the following generic APIs can be added to the ptp driver to obtain the phc_index. 1. ptp_clock_index_by_dev(): Obtain the phc_index by the device pointer of the PTP device. 2.ptp_clock_index_by_of_node(): Obtain the phc_index by the of_node pointer of the PTP device. Also, we can add another API like ptp_clock_index_by_fwnode() to get the phc_index by fwnode of PTP device. However, this API is not used in this patch set, so it is better to add it when needed. Suggested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Wei Fang <wei.fang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20250829050615.1247468-4-wei.fang@nxp.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-09-02drm/sched: Fix racy access to drm_sched_entity.dependencyPierre-Eric Pelloux-Prayer
The drm_sched_job_unschedulable trace point can access entity->dependency after it was cleared by the callback installed in drm_sched_entity_add_dependency_cb, causing: BUG: kernel NULL pointer dereference, address: 0000000000000020 [...] Workqueue: comp_1.1.0 drm_sched_run_job_work [gpu_sched] RIP: 0010:trace_event_raw_event_drm_sched_job_unschedulable+0x70/0xd0 [gpu_sched] To fix this we either need to keep a reference to the fence before setting up the callbacks, or move the trace_drm_sched_job_unschedulable calls into drm_sched_entity_add_dependency_cb where they can be done earlier. Fixes: 76d97c870f29 ("drm/sched: Trace dependencies for GPU jobs") Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Signed-off-by: Philipp Stanner <phasta@kernel.org> Link: https://lore.kernel.org/r/20250901124032.1955-1-pierre-eric.pelloux-prayer@amd.com (cherry picked from commit b2b8af21fec35be417a3199b5a6c354605dd222a) Signed-off-by: Maxime Ripard <mripard@kernel.org>
2025-09-02drm/i915: compute pipe bpp from link bandwidth managementLee Shawn C
Since intel_fdi_compute_pipe_bpp() is no longer FDI-specific and now applies to all connectors. Move it to intel_link_bw.c, and rename to intel_link_bw_compute_pipe_bpp(). v2: Remove unused header file. Cc: Shankar Uma <uma.shankar@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Vidya Srinivas <vidya.srinivas@intel.com> Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com> [Imre: Remove unused intel_fdi.h include from intel_hdmi.c] Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/20250901055721.219995-3-shawn.c.lee@intel.com
2025-09-02drm/i915/hdmi: add debugfs to contorl HDMI bpcLee Shawn C
While performing HDMI compliance testing, test equipment may request different bpc output for signal measurement. However, display driver typically determines the maximum available bpc based on HW bandwidth. This change leverages the existing debugfs (intel_force_link_bpp) to manage HDMI bpc, and making it easier to pass HDMI CTS. v2: Using exist variable max_requested_bpc. v3: Extend intel_force_link_bpp to support HDMI as suggested by Imre. v4: Update commit message suggested by Jani. v5: Remove unused header file. Cc: Shankar Uma <uma.shankar@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Vidya Srinivas <vidya.srinivas@intel.com> Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/20250901055721.219995-2-shawn.c.lee@intel.com
2025-09-02backlight: mp3309c: Initialize backlight properties without memsetUwe Kleine-König
Assigning values to a struct using a compound literal (since C99) also guarantees that all unspecified struct members are empty-initialized, so it properly replaces the memset to zero. The code looks a bit nicer and more idiomatic (though that might be subjective?). The resulting binary is a bit smaller. On ARCH=arm with an allnoconfig + minimal changes to enable the mp3309c driver the difference is 12 bytes. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Tested-by: Flavio Suligoi <f.suligoi@asem.it> Reviewed-by: Daniel Thompson (RISCstar) <danielt@kernel.org> Link: https://lore.kernel.org/r/14514a1b0d3df6438aa10bb74f1c4fc2367d9987.1751361465.git.u.kleine-koenig@baylibre.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-09-02backlight: mp3309c: Drop pwm_apply_args()Uwe Kleine-König
pwm_apply_args() sole purpose is to initialize all parameters specified in the device tree for consumers that rely on pwm_config() and pwm_enable(). The mp3309c backlight driver uses pwm_apply_might_sleep() which gets passed the full configuration and so doesn't rely on the default being explicitly applied. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Tested-by: Flavio Suligoi <f.suligoi@asem.it> Reviewed-by: Daniel Thompson (RISCstar) <danielt@kernel.org> Link: https://lore.kernel.org/r/2d1075f5dd45c7c135e4326e279468de699f9d17.1751361465.git.u.kleine-koenig@baylibre.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-09-02pinctrl: samsung: Drop unused S3C24xx driver dataKrzysztof Kozlowski
Drop unused declarations after S3C24xx SoC family removal in the commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support"). Fixes: 1ea35b355722 ("ARM: s3c: remove s3c24xx specific hacks") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20250830111657.126190-3-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-09-02firmware: arm_scmi: quirk: Prevent writes to string constantsJohan Hovold
The quirk version range is typically a string constant and must not be modified (e.g. as it may be stored in read-only memory). Attempting to do so can trigger faults such as: | Unable to handle kernel write to read-only memory at virtual | address ffffc036d998a947 Update the range parsing so that it operates on a copy of the version range string, and mark all the quirk strings as const to reduce the risk of introducing similar future issues. Closes: https://bugzilla.kernel.org/show_bug.cgi?id=220437 Fixes: 487c407d57d6 ("firmware: arm_scmi: Add common framework to handle firmware quirks") Cc: stable@vger.kernel.org # 6.16 Cc: Cristian Marussi <cristian.marussi@arm.com> Reported-by: Jan Palus <jpalus@fastmail.com> Signed-off-by: Johan Hovold <johan@kernel.org> Message-Id: <20250829132152.28218-1-johan@kernel.org> [sudeep.holla: minor commit message rewording; switch to cleanup helpers] Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2025-09-02drm/display: bridge_connector: use drm_bridge_is_last()Luca Ceresoli
Simplify code to know whether a bridge is the last in the chain by using drm_bridge_is_last(). Reviewed-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250801-drm-bridge-alloc-getput-drm_bridge_get_next_bridge-v2-6-888912b0be13@bootlin.com Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
2025-09-02drm/omapdrm: use drm_bridge_chain_get_last_bridge()Luca Ceresoli
Use drm_bridge_chain_get_last_bridge() instead of open coding a loop with two invocations of drm_bridge_get_next_bridge() per iteration. Besides being cleaner and more efficient, this change is necessary in preparation for drm_bridge_get_next_bridge() to get a reference to the returned bridge. Reviewed-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250801-drm-bridge-alloc-getput-drm_bridge_get_next_bridge-v2-4-888912b0be13@bootlin.com Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
2025-09-02drm/bridge: imx93-mipi-dsi: use drm_bridge_chain_get_last_bridge()Luca Ceresoli
Use drm_bridge_chain_get_last_bridge() instead of open coding a loop with two invocations of drm_bridge_get_next_bridge() per iteration. Besides being cleaner and more efficient, this change is necessary in preparation for drm_bridge_get_next_bridge() to get a reference to the returned bridge. Reviewed-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Liu Ying <victor.liu@nxp.com> Link: https://lore.kernel.org/r/20250801-drm-bridge-alloc-getput-drm_bridge_get_next_bridge-v2-3-888912b0be13@bootlin.com Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
2025-09-02dmaengine: dw: dmamux: Fix device reference leak in rzn1_dmamux_route_allocateMiaoqian Lin
The reference taken by of_find_device_by_node() must be released when not needed anymore. Add missing put_device() call to fix device reference leaks. Fixes: 134d9c52fca2 ("dmaengine: dw: dmamux: Introduce RZN1 DMA router support") Cc: stable@vger.kernel.org Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20250902090358.2423285-1-linmq006@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-09-02gpio: fix GPIO submenu in KconfigBartosz Golaszewski
Commit a86240a37d43 ("gpiolib: enable CONFIG_GPIOLIB_LEGACY even for !GPIOLIB") accidentally pulled all items from within the GPIOLIB submenu into the main driver menu. Put them back under the top-level GPIO entry. Suggested-by: Rob Herring <robh@kernel.org> Fixes: a86240a37d43 ("gpiolib: enable CONFIG_GPIOLIB_LEGACY even for !GPIOLIB") Reported-by: Rob Herring <robh@kernel.org> Closes: https://lore.kernel.org/all/20250813222649.GA965895-robh@kernel.org/ Reviewed-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20250901125513.108691-1-brgl@bgdev.pl Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-02dm-pcache: use int type to store negative error codesQianfeng Rong
Change the 'ret' variable from u32 to int to store negative error codes or zero returned by cache_kset_close(). Storing the negative error codes in unsigned type, doesn't cause an issue at runtime but it's ugly. Additionally, assigning negative error codes to unsigned type may trigger a GCC warning when the -Wsign-conversion flag is enabled. No effect on runtime. Signed-off-by: Qianfeng Rong <rongqianfeng@vivo.com> Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
2025-09-02drm/debugfs: bridges_show: show refcountLuca Ceresoli
Now that bridges are refcounted, exposing the refcount in debugfs can be useful. Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250819-drm-bridge-debugfs-removed-v7-1-970702579978@bootlin.com Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
2025-09-02mtd: rawnand: s3c2410: Drop driver (no actual S3C64xx user)Krzysztof Kozlowski
The s3c2410 NAND driver still supports S3C64xx platform, which in general is supported in the kernel. There are however no references of "s3c6400-nand" platform device ID or "s3c24xx-nand" driver, thus this driver cannot be instantiated for S3C64xx platform and is basically unused. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-09-02coresight: add coresight Trace Network On Chip driverYuanfang Zhang
Add a driver to support Coresight device Trace Network On Chip (TNOC), which is an integration hierarchy integrating functionalities of TPDA and funnels. It aggregates the trace and transports to coresight trace bus. Compared to current configuration, it has the following advantages: 1. Reduce wires between subsystems. 2. Continue cleaning the infrastructure. 3. Reduce Data overhead by transporting raw data from source to target. +------------------------+ +-------------------------+ | Video Subsystem | |Video Subsystem | | +-------------+ | | +------------+ | | | Video TPDM | | | | Video TPDM | | | +-------------+ | | +------------+ | | | | | | | | v | | v | | +---------------+ | | +-----------+ | | | Video funnel | | | |Video TNOC | | | +---------------+ | | +-----------+ | +------------|-----------+ +------------|------------+ | | v-----+ | +--------------------|---------+ | | Multimedia v | | | Subsystem +--------+ | | | | TPDA | | v | +----|---+ | +---------------------+ | | | | Aggregator TNOC | | | | +----------|----------+ | +-- | | | | | | | | | | | +------v-----+ | | | | Funnel | | | | +------------+ | | +----------------|-------------+ | | | v v +--------------------+ +------------------+ | Coresight Sink | | Coresight Sink | +--------------------+ +------------------+ Current Configuration TNOC Reviewed-by: Leo Yan <leo.yan@arm.com> Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com> Reviewed-by: Mike Leach <mike.leach@linaro.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20250710-trace-noc-v11-2-f849075c40b8@quicinc.com
2025-09-02coresight: perf: Use %px for printing pointersLeo Yan
Use "%px" to print a pointer, which is better than casting the pointer to unsigned long and printing it with the "%lx" specifier. Note, the printing format will be updated as 64-bit value: # cat /sys/devices/cs_etm/sinks/trbe0 0x000000003744496a This commit dismisses the following smatch warnings: coresight-etm-perf.c:854 etm_perf_sink_name_show() warn: argument 4 to %lx specifier is cast from pointer coresight-etm-perf.c:946 etm_perf_cscfg_event_show() warn: argument 4 to %lx specifier is cast from pointer Signed-off-by: Leo Yan <leo.yan@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20250611-arm_cs_fix_smatch_warning_v1-v1-2-02a66c69b604@arm.com
2025-09-02coresight: stm: Remove redundant NULL checksLeo Yan
container_of() cannot return NULL, so the checks for NULL pointers are unnecessary and can be safely removed. As a result, this commit silences the following smatch warnings: coresight-stm.c:345 stm_generic_link() warn: can 'drvdata' even be NULL? coresight-stm.c:356 stm_generic_unlink() warn: can 'drvdata' even be NULL? coresight-stm.c:387 stm_generic_set_options() warn: can 'drvdata' even be NULL? coresight-stm.c:422 stm_generic_packet() warn: can 'drvdata' even be NULL? Signed-off-by: Leo Yan <leo.yan@arm.com> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20250611-arm_cs_fix_smatch_warning_v1-v1-1-02a66c69b604@arm.com
2025-09-02hwtracing: coresight: Use of_reserved_mem_region_to_resource() for ↵Rob Herring (Arm)
"memory-region" Use the newly added of_reserved_mem_region_to_resource() function to handle "memory-region" properties. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20250703183534.2075569-1-robh@kernel.org
2025-09-02coresight: Only register perf symlink for sinks with alloc_bufferYuanfang Zhang
Ensure that etm_perf_add_symlink_sink() is only called for devices that implement the alloc_buffer operation. This prevents invalid symlink creation for dummy sinks that do not implement alloc_buffer. Without this check, perf may attempt to use a dummy sink that lacks alloc_buffer operationsu to initialise perf's ring buffer, leading to runtime failures. Fixes: 9d3ba0b6c0569 ("Coresight: Add coresight dummy driver") Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20250630-etm_perf_sink-v1-1-e4a7211f9ad7@quicinc.com
2025-09-02coresight: Fix missing include for FIELD_GETJames Clark
Include the header for FIELD_GET which is only sometimes transitively included on some configs and kernel releases. Reported-by: Linux Kernel Functional Testing <lkft@linaro.org> Closes: https://lists.linaro.org/archives/list/lkft-triage@lists.linaro.org/thread/6GKMK52PPRJVEYMEUHJP6BXF4CJAXOFL/ Fixes: a4e65842e114 ("coresight: Only check bottom two claim bits") Signed-off-by: James Clark <james.clark@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20250707-james-coresight-bitfield-include-v1-1-aa0f4220ecfd@linaro.org
2025-09-02coresight: trbe: Add ISB after TRBLIMITR writeJames Clark
DEN0154 states that hardware will be allowed to ignore writes to TRB* registers while the trace buffer is enabled. Add an ISB to ensure that it's disabled before clearing the other registers. This is purely defensive because it's expected that arm_trbe_disable() would be called before teardown which has the required ISB. Fixes: a2b579c41fe9 ("coresight: trbe: Remove redundant disable call") Signed-off-by: James Clark <james.clark@linaro.org> Reviewed-by: Yeoreum Yun <yeoreum.yun@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20250609-james-cs-trblimitr-isb-v1-1-3a2aa4ee6770@linaro.org
2025-09-02leds: qnap-mcu: Add support for the red and green status LEDsHeiko Stuebner
There is one more set of two LEDs on the qnap devices to indicate status. One LED is green, the other is red and while they occupy the same space on the front panel, they cannot be enabled at the same time. But they can interact via blink functions, the MCU can flash them alternately, going red -> green -> red -> ... either in 500ms or 1s intervals. They can of course also blink individually. Add specific LED functions for them and register them on probe. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250804114949.3127417-3-heiko@sntech.de Signed-off-by: Lee Jones <lee@kernel.org>
2025-09-02leds: qnap-mcu: Fix state numbering for USB LEDHeiko Stuebner
The "@Cx" commands span a number of different functions, from the status and USB LEDs to the buzzer and power button. So change the USB-LED enum to start at 0 and adapt the offset accordingly to not suggest @CD would relate to the USB-LED - while in fact "@CD" is a state of the status LED. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250804114949.3127417-2-heiko@sntech.de Signed-off-by: Lee Jones <lee@kernel.org>
2025-09-02drm/sched: Fix racy access to drm_sched_entity.dependencyPierre-Eric Pelloux-Prayer
The drm_sched_job_unschedulable trace point can access entity->dependency after it was cleared by the callback installed in drm_sched_entity_add_dependency_cb, causing: BUG: kernel NULL pointer dereference, address: 0000000000000020 [...] Workqueue: comp_1.1.0 drm_sched_run_job_work [gpu_sched] RIP: 0010:trace_event_raw_event_drm_sched_job_unschedulable+0x70/0xd0 [gpu_sched] To fix this we either need to keep a reference to the fence before setting up the callbacks, or move the trace_drm_sched_job_unschedulable calls into drm_sched_entity_add_dependency_cb where they can be done earlier. Fixes: 76d97c870f29 ("drm/sched: Trace dependencies for GPU jobs") Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Signed-off-by: Philipp Stanner <phasta@kernel.org> Link: https://lore.kernel.org/r/20250901124032.1955-1-pierre-eric.pelloux-prayer@amd.com
2025-09-02dmaengine: dw-edma: Set status for callback_resultDevendra K Verma
DMA Engine has support for the callback_result which provides the status of the request and the residue. This helps in determining the correct status of the request and in efficient resource management of the request. The 'callback_result' method is preferred over the deprecated 'callback' method. Signed-off-by: Devendra K Verma <devverma@amd.com> Link: https://lore.kernel.org/r/20250821121505.318179-1-devverma@amd.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-09-02dmaengine: mv_xor: match alloc_wc and free_wcRosen Penev
dma_alloc_wc is used but not dma_free_wc. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20250821220942.10578-1-rosenp@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-09-02dmaengine: mmp_pdma: Add SpacemiT K1 PDMA support with 64-bit addressingGuodong Xu
Add support for SpacemiT K1 PDMA controller which features 64-bit addressing capabilities. The SpacemiT K1 PDMA extends the descriptor format with additional 32-bit words for high address bits, enabling access to memory beyond 4GB boundaries. The new spacemit_k1_pdma_ops provides necessary 64-bit address handling functions and k1 specific controller configurations. Key changes: - Add ARCH_SPACEMIT dependency to Kconfig - Define new high 32-bit address registers (DDADRH, DSADRH, DTADRH) - Add DCSR_LPAEEN bit for Long Physical Address Extension Enable - Implement 64-bit operations for SpacemiT K1 PDMA Signed-off-by: Guodong Xu <guodong@riscstar.com> Link: https://lore.kernel.org/r/20250822-working_dma_0701_v2-v5-5-f5c0eda734cc@riscstar.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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