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2026-07-31drm/msm: fbdev: Use a DRM client bufferThomas Zimmermann
Replace the internal DRM framebuffer with a DRM client buffer. The client buffer allocates the DRM framebuffer on a file and also uses GEM object handles via the regular ADDFB2 interfaces. Using client-buffer interfaces unifies framebuffer allocation for DRM clients in user space and msm's internal fbdev emulation. It also simplifies the clean-up side of the fbdev emulation. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/733891/ Link: https://lore.kernel.org/r/20260618141249.151338-6-tzimmermann@suse.de [DB: fixed error handling in msm_fbdev_driver_fbdev_probe] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-07-31drm/msm: fbdev: Calculate buffer geometry with format helpersThomas Zimmermann
Replace the geometry and size calculation in msm's fbdev emulation with DRM format helpers. This consists of a 4CC lookup from the fbdev parameters, format lookup, pitch calculation and size calculation. Then allocate the GEM buffer object for the framebuffer memory from the calculated size. Explicitly align the size of the allocated GEM buffer object to full pages. The contained memory is the framebuffer memory as seen by fbdev. The page alignment is required for mmap. v2: - clarify the page alignment of the buffer size (Dmitry) Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/733885/ Link: https://lore.kernel.org/r/20260618141249.151338-5-tzimmermann@suse.de Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-07-31drm/msm: fbdev: Fix error reportingThomas Zimmermann
Replace deprecated error reporting in msm_fbdev_driver_fbdev_probe(). Use drm_warn() and drm_err() instead. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/733887/ Link: https://lore.kernel.org/r/20260618141249.151338-4-tzimmermann@suse.de Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-07-31drm/msm: fbdev: Inline msm_alloc_stolen_fb()Thomas Zimmermann
Inline msm_alloc_stolen_fb() into its only caller. This is necessary for converting fbdev emulation to use client buffers. There are some minor changes: - Handle errors for the non-stolen BO in the respective branch. - Fill mode_cmd right before using it with msm_framebuffer_init(). Both will later be replaced with client-buffer interfaces. - Set the modifier[0] to DRM_FORMAT_MOD_LINEAR. No functional change. - Integrate the error handling with the existing clean-up. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/733884/ Link: https://lore.kernel.org/r/20260618141249.151338-3-tzimmermann@suse.de Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-07-31drm/msm: Do not declare msm_framebuffer_init() as staticThomas Zimmermann
Declare msm_framebuffer_init() in msm_drv.h and remove the static qualifier. The function will be required in msm_fbdev.c after inlining msm_alloc_stolen_fb(). Also move msm_framebuffer_init() before msm_framebuffer_create(), so that it can later be made static again. Prepares msm's fbdev emulation for using client buffers. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/733883/ Link: https://lore.kernel.org/r/20260618141249.151338-2-tzimmermann@suse.de Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-07-31drm/msm/dp: return 0 from audio_prepare when cable is disconnectedKumar Anurag
PipeWire treats a non-zero return from prepare as fatal, marking the DP audio device as a dummy sink when the cable is unplugged. The active_stream_cnt guard already prevents any unclocked hardware access, so return success instead of -EINVAL when the link is not active. Signed-off-by: Kumar Anurag <kumar.singh@oss.qualcomm.com> Suggested-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> # same behaviour Patchwork: https://patchwork.freedesktop.org/patch/733663/ Link: https://lore.kernel.org/r/20260616151252.3599089-2-kumar.singh@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-07-31drm/tyr: add Microcontroller Unit (MCU) bootingDeborah Brouwer
Add a firmware module to load, parse, and map the MCU firmware sections into shared GEM memory at the required virtual addresses accessible by the GPU. Create a firmware instance during probe and store it inside the TyrDrmRegistrationData to keep it alive after probe. Use the firmware instance to boot the MCU. Remove the dead-code annotations from the MMU, VM, slot manager, and kernel BO code now that these paths are used by the firmware module. Update Kconfig to add the RUST_FW_LOADER_ABSTRACTIONS dependency required by this module. Co-developed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Deborah Brouwer <deborah.brouwer@collabora.com> Link: https://patch.msgid.link/20260728-fw-boot-b4-v10-7-9187aefa3f2f@collabora.com Signed-off-by: Alice Ryhl <aliceryhl@google.com>
2026-07-31drm/tyr: add parser for firmware binaryDaniel Almeida
Add a parser for the Mali CSF GPU firmware binary format. The firmware consists of a header followed by entries describing how to load firmware sections into the MCU's memory. The parser extracts section metadata including virtual address ranges, data byte offsets within the binary, and section flags controlling permissions and cache modes. It validates the basic firmware structure and alignment and ignores protected-mode sections for now. Signed-off-by: Daniel Almeida <daniel.almeida@collabora.com> Co-developed-by: Beata Michalska <beata.michalska@arm.com> Signed-off-by: Beata Michalska <beata.michalska@arm.com> Co-developed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Co-developed-by: Deborah Brouwer <deborah.brouwer@collabora.com> Signed-off-by: Deborah Brouwer <deborah.brouwer@collabora.com> Link: https://patch.msgid.link/20260728-fw-boot-b4-v10-6-9187aefa3f2f@collabora.com Signed-off-by: Alice Ryhl <aliceryhl@google.com>
2026-07-31drm/tyr: add a kernel buffer objectDeborah Brouwer
Introduce a buffer object type (KernelBo) for internal driver allocations that are managed by the kernel rather than userspace. KernelBo wraps a GEM shmem object and automatically handles GPU virtual address space mapping during creation and unmapping on drop. This provides a safe and convenient way for the driver to both allocate and clean up internal buffers for kernel-managed resources. Co-developed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Deborah Brouwer <deborah.brouwer@collabora.com> Link: https://patch.msgid.link/20260728-fw-boot-b4-v10-5-9187aefa3f2f@collabora.com Signed-off-by: Alice Ryhl <aliceryhl@google.com>
2026-07-31drm/tyr: add GPU virtual memory (VM) supportBoris Brezillon
Add GPU virtual address space management using the DRM GPUVM framework. Each virtual memory (VM) space is backed by ARM64 LPAE Stage 1 page tables and can be mapped into hardware address space (AS) slots for GPU execution. The implementation provides memory isolation and virtual address allocation. VMs support mapping GEM buffer objects with configurable protection flags (readonly, noexec, uncached) and handle both 4KB and 2MB page sizes. A new_dummy_object() helper is provided to create a dummy GEM object for use as a GPUVM root. The vm module integrates with the MMU for address space activation and provides map/unmap/remap operations with page table synchronization. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Co-developed-by: Daniel Almeida <daniel.almeida@collabora.com> Signed-off-by: Daniel Almeida <daniel.almeida@collabora.com> Co-developed-by: Deborah Brouwer <deborah.brouwer@collabora.com> Signed-off-by: Deborah Brouwer <deborah.brouwer@collabora.com> Link: https://patch.msgid.link/20260728-fw-boot-b4-v10-4-9187aefa3f2f@collabora.com [aliceryhl: fix integer cast on 32-bit arm] Signed-off-by: Alice Ryhl <aliceryhl@google.com>
2026-07-31drm/imagination: Reorder some fields in struct pvr_device_featuresAlexandru Dadu
Reorder the fields of struct pvr_device_features so they match the order of the device info enum found in pvr_rogue_fwif_dev_info.h. Signed-off-by: Alexandru Dadu <alexandru.dadu@imgtec.com> Reviewed-by: Alessio Belle <alessio.belle@imgtec.com> Link: https://patch.msgid.link/20260729-b4-pvr-device-features-members-reorder-v1-1-d2e18ed8cd5f@imgtec.com Signed-off-by: Alessio Belle <alessio.belle@imgtec.com>
2026-07-31drm/imagination: Set scheduler timeout period higher than Firmware timeoutBrajesh Gupta
Firmware schedules workloads on the GPU and tracks progress. It is also responsible for detecting any lockup and triggering recovery. Update the GPU scheduler timeout to a reasonably high value to avoid premature timeout at the GPU scheduler end. Signed-off-by: Brajesh Gupta <brajesh.gupta@imgtec.com> Reviewed-by: Alessio Belle <alessio.belle@imgtec.com> Link: https://patch.msgid.link/20260729-sched_timeout-v1-1-4adc801b1997@imgtec.com Signed-off-by: Alessio Belle <alessio.belle@imgtec.com>
2026-07-31drm/panthor: fix firmware control interface bounds checksOsama Abdelkader
panthor_init_cs_iface() and panthor_init_csg_iface() validate firmware control interface offsets with 32-bit arithmetic and the size of the host wrapper structures. The offsets are derived from firmware-provided strides, so the arithmetic can wrap before the bounds check, and the host wrapper size is not the size of the firmware control interface being mapped. Use 64-bit arithmetic for the computed offsets and validate against the actual firmware control interface structure sizes with subtraction-based bounds checks. Also validate that the shared section is large enough for the global control interface before using it. Fixes: 2718d91816ee ("drm/panthor: Add the FW logical block") Cc: stable@vger.kernel.org Signed-off-by: Osama Abdelkader <osama.abdelkader@gmail.com> Reviewed-by: Steven Price <steven.price@arm.com> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com> Link: https://patch.msgid.link/20260720134435.13377-1-osama.abdelkader@gmail.com Signed-off-by: Steven Price <steven.price@arm.com>
2026-07-31Merge tag 'amd-drm-next-7.3-2026-07-29' of ↵Dave Airlie
https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-7.3-2026-07-29: amdgpu: - VCN 5.3 fix - UserQ fixes - GEM close optimization - HDMI AV mute fix - UML build fixes - GFXOFF residency metrics fixes - SMU 15 fixes - debug_vm fix - PSP 15 fixes - NBIO 7.11.5 fix - pptable use after free fix - gpu metrics fetch fix - DC viewport fix - DML2.1 fix - i2c retimer spam fix - UMD profile pstate fix - Power metrics format cleanup - GTT size fix on APUs - DC context logging fix - Misc fixes - IB pool clean up and fixes - DCN 4.2 updates - Old BUG() and BUG_ON() removal - RAS updates - PASID management updates - DC MCIF ARB updates - More DC KUNIT tests - Refactor dc_validation_set - Introduce dc_state_get_status unified status accessor - Apple Studio Display fixes - DML updates - DC writeback fixes - MES updates - PTL updates - DC code restructuring - DC FRL fixes - Add modifiers for GFX6-8 - Resume fix for MacBookPro15,1 amdkfd: - Various bounds checking fixes - Mutex locking fix - Clean up debug runlist printing - SR-IOV fixes - Avoid topology_lock in kfd_mmap - Fix signal reset event - SVM eviction fixes radeon: - Fix for unset CONFIG_ACPI Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patch.msgid.link/20260729201801.4073097-1-alexander.deucher@amd.com
2026-07-31Merge tag 'drm-intel-fixes-2026-07-30' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/i915/kernel into drm-fixes One DP DSC fix and one HDMI 2.0 fix. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patch.msgid.link/amvIvqJehP7uaUgx@intel.com
2026-07-31Merge tag 'amd-drm-fixes-7.2-2026-07-30' of ↵Dave Airlie
https://gitlab.freedesktop.org/agd5f/linux into drm-fixes amd-drm-fixes-7.2-2026-07-30: amdgpu: - PM sysfs fix for APUs - Follow on pageflip timeout fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patch.msgid.link/20260730150018.801791-1-alexander.deucher@amd.com
2026-07-31Merge tag 'drm-xe-fixes-2026-07-30' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/xe/kernel into drm-fixes - Check no-DMA huge-pte cases before DMA segment test (Himal) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patch.msgid.link/amtk7ZddR12dgg-A@intel.com
2026-07-31Merge tag 'drm-misc-fixes-2026-07-30' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/misc/kernel into drm-fixes drm-misc-fies for v7.2-rc6: - vmwgfx: - Improve various size checks and limit checks. - Fix oops when submitting invalid execbuf ioctl. - Correctly lock in vmfwgx fence signaling path. - More validation of execbuf ioctl. - Fix oops in vmwgfx vkms init failure path. - Overflow handling in shader path. - Improve firmware validation in panthor. - Fix small leak in bridge/display-connector - Improve imagination trace points. - Fix QAIC transaction length check. - Restrict some DP bandwidth calculations to HDMI DFP. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patch.msgid.link/178a513f-2d7f-4e3a-811b-cd0d9dc309eb@linux.intel.com
2026-07-31Merge tag 'amd-drm-fixes-7.2-2026-07-29' of ↵Dave Airlie
https://gitlab.freedesktop.org/agd5f/linux into drm-fixes amd-drm-fixes-7.2-2026-07-29: amdgpu: - VCN 5.3 fix - UserQ fixes - GEM close optimization - HDMI AV mute fix - UML build fixes - GFXOFF residency metrics fixes - SMU 15 fixes - debug_vm fix - PSP 15 fixes - NBIO 7.11.5 fix - pptable use after free fix - gpu metrics fetch fix - DC viewport fix - DML2.1 fix - i2c retimer spam fix - UMD profile pstate fix - Power metrics format cleanup - GTT size fix on APUs - DC context logging fix amdkfd: - Various bounds checking fixes - Mutex locking fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patch.msgid.link/20260729182209.4072227-1-alexander.deucher@amd.com
2026-07-31Merge tag 'mediatek-drm-fixes-20260729' of ↵Dave Airlie
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-fixes Mediatek DRM Fixes - 20260729 1. Check CRTC state before freeing 2. mtk_hdmi: Fix DDC adapter double put in v2 3. mtk_hdmi_common: take i2c adapter module reference 4. mtk_dsi: Enable HS clock only at pre-enable 5. ovl_adaptor: balance component registrations Signed-off-by: Dave Airlie <airlied@redhat.com> From: Chun-Kuang Hu <chunkuang.hu@kernel.org> Link: https://patch.msgid.link/20260729131701.4158-1-chunkuang.hu@kernel.org
2026-07-30drm/bridge: ps8640: propagate AUX transfer register errorsPengpeng Hou
ps8640_aux_transfer_msg() programs the AUX address registers, starts the AUX transfer, waits for SWAUX_SEND to clear, and reads the AUX status register. Several of those regmap operations have return values, but the function only checks a stale ret after the status read. Propagate failures from the address write, transfer start, completion poll, and status read. This avoids returning a transfer length when the bridge register transaction or AUX completion wait failed. Fixes: 13afcdd7277e ("drm/bridge: parade-ps8640: Add support for AUX channel") Signed-off-by: Pengpeng Hou <pengpeng@iscas.ac.cn> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patch.msgid.link/20260723103509.2-ps8640-v2-pengpeng@iscas.ac.cn
2026-07-30drm/bridge: ti-sn65dsi86: Remove redundant dev_err_probe()Pan Chuang
Since commit 55b48e23f5c4 ("genirq/devres: Add error handling in devm_request_*_irq()"), devm_request_threaded_irq() automatically logs detailed error messages on failure. Remove the now-redundant driver-specific dev_err_probe() call. Signed-off-by: Pan Chuang <panchuang@vivo.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patch.msgid.link/20260723131649.134127-11-panchuang@vivo.com
2026-07-30rust: driver: remove `$module_table_name` from `module_device_table`Gary Guo
Wrap the generated code in a `const _: ()` block to avoid symbol conflict. This removes the need of creating a new identifier. Signed-off-by: Gary Guo <gary@garyguo.net> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://patch.msgid.link/20260629-id_info-v2-7-56fccbe9c5ef@garyguo.net [ Consider the serdev code merged in the meantime. - Danilo ] Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-07-30drm/i915/hdmi: Poll for 200 msec for TMDS_Scrambler_StatusJerome Tollet
HDMI 2.0 section 6.1.3.1 specifies that after enabling Scrambling_Enable and starting scrambled video transmission, the source should poll Scrambling_Status until it reads 1 or until a timeout of 200 ms expires. Add a polling step after enabling the HDMI port to check the scrambling status when HDMI scrambling is enabled. On some HDMI 2.0 sinks, omitting this check can result in 4K@60Hz (594 MHz) failing to come up correctly because the sink has not yet finished its scrambling setup. In practice, waiting for the scrambling status here fixes such sinks. While this synchronous polling is not itself explicitly required for correct modeset sequencing, HDMI 2.0 section 6.1.3.1 does recommend it as the way for the source to verify that the TMDS link is functioning correctly with scrambling enabled. v3: - Add explicit HDMI 2.0 section reference in code comment - Clarify commit message around the observed sink fix v2: - Poll TMDS_Scrambler_Status for up to 200 ms instead of using a fixed delay Reported-by: Jerome Tollet <jtollet@cisco.com> Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/6868 Link: https://lore.kernel.org/dri-devel/20251230091037.5603-1-jerome.tollet@gmail.com/ Signed-off-by: Jerome Tollet <jerome.tollet@gmail.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Link: https://patch.msgid.link/20260520022544.3097252-1-ankit.k.nautiyal@intel.com (cherry picked from commit b7d51d65e4f12a48392d260613108ec262bc7774) Fixes: 15953637886d ("drm/i915: enable scrambling") Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-07-30rust: pci: use `Option<&IdInfo>` for device ID infoGary Guo
It is possible that `pci_device_id_any` will be passed to the driver, e.g. `driver_override` is used on the device. Therefore, the driver must be able to handle the case where `driver_data` is 0. Thus, update the `probe` functions to get `Option`. The current code cannot tell if the info does not exist or is the first entry; however this will be achievable once the code is updated to use a `&'static IdInfo` pointer instead of indices. Signed-off-by: Gary Guo <gary@garyguo.net> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://patch.msgid.link/20260629-id_info-v2-3-56fccbe9c5ef@garyguo.net Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-07-30drm/tyr: add Memory Management Unit (MMU) supportBoris Brezillon
Add Memory Management Unit (MMU) support in Tyr. The MMU module wraps a SlotManager instance to allocate MMU address-space slots for use by virtual memory (VM) address spaces. The MMU's SlotManager uses an AddressSpaceManager to handle the hardware-specific callbacks. For example, the AddressSpaceManager activates and evicts VMs from slots by writing commands to the MMU registers. Add an implementation block for the MMU's MEMATTR register to provide a method for translating the Memory Attribute Indirection Register (MAIR) format from the pagetable configuration to a format understood by the MMU. Create an mmu instance during probe, it will be used by subsequent patches in this series. Wrap the iomem stored in TyrDrmRegistrationData in an Arc. The iomem is stored in the mmu through its AddressSpaceManager. In anticipation of the iomem also being stored in the firmware object, set up shared ownership of the iomem now. Update Kconfig to add the new MMU and IOMMU dependencies required by this MMU module. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Co-developed-by: Deborah Brouwer <deborah.brouwer@collabora.com> Signed-off-by: Deborah Brouwer <deborah.brouwer@collabora.com> Link: https://patch.msgid.link/20260728-fw-boot-b4-v10-3-9187aefa3f2f@collabora.com Signed-off-by: Alice Ryhl <aliceryhl@google.com>
2026-07-30drm/tyr: add a generic slot managerBoris Brezillon
Introduce a generic slot manager to dynamically allocate limited hardware slots to software "seats". It can be used for both address space (AS) and command stream group (CSG) slots. The slot manager initially assigns seats to its free slots. It will continue to reuse the same slot for a seat, as long as another seat does not start to use the slot in the interim. When contention arises because all of the slots are allocated, the slot manager will lazily evict and reuse slots that have become idle (if any). The seat state is protected using the LockedBy pattern with the same lock that guards the SlotManager. This ensures the seat state stays consistent across slot operations. Hardware specific behaviour is controlled through the SlotManager's specific manager type that implements the `SlotOperations` trait. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Co-developed-by: Deborah Brouwer <deborah.brouwer@collabora.com> Signed-off-by: Deborah Brouwer <deborah.brouwer@collabora.com> Link: https://patch.msgid.link/20260728-fw-boot-b4-v10-2-9187aefa3f2f@collabora.com Signed-off-by: Alice Ryhl <aliceryhl@google.com>
2026-07-30drm/tyr: add resources to RegistrationDataDeborah Brouwer
Currently Tyr is not storing any resources in its drm::Driver RegistrationData. Move Tyr's device-private resources and gpu information from drm::Driver::Data to drm::Driver::RegistrationData. This allows Tyr to access this data safely within the lifetime of its binding to its parent platform device and while registered with userspace. Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Signed-off-by: Deborah Brouwer <deborah.brouwer@collabora.com> Link: https://patch.msgid.link/20260728-fw-boot-b4-v10-1-9187aefa3f2f@collabora.com Signed-off-by: Alice Ryhl <aliceryhl@google.com>
2026-07-30drm/panthor: skip zero-sized firmware sectionsOsama Abdelkader
panthor_fw_load_section_entry() skips BO creation when the firmware section VA range is empty. If such a section is added to the firmware section list, section->mem is left as NULL. Later reload and unplug paths iterate over all firmware sections and dereference section->mem, which can lead to a NULL pointer dereference. Zero-sized firmware sections are valid, so accept them as no-op entries but skip adding them to the section list. Fixes: 2718d91816ee ("drm/panthor: Add the FW logical block") Cc: stable@vger.kernel.org Signed-off-by: Osama Abdelkader <osama.abdelkader@gmail.com> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com> Reviewed-by: Steven Price <steven.price@arm.com> Link: https://patch.msgid.link/20260724172621.63046-1-osama.abdelkader@gmail.com Signed-off-by: Steven Price <steven.price@arm.com>
2026-07-30gpu: nova-core: Move one PBUS register definitionAntonin Malzieu Ridolfi
Move NV_PBUS_SW_SCRATCH_0E_FRTS_ERR register definition into gsp module and update registers visibility. Suggested-by: Alexandre Courbot <acourbot@nvidia.com> Suggested-by: Danilo Krummrich <dakr@kernel.org> Signed-off-by: Antonin Malzieu Ridolfi <dev@nanonej.com> Link: https://patch.msgid.link/20260727-nova-core-regs-split-v2-3-21b5e6e32ea5@nanonej.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-07-30gpu: nova-core: Move PFB registers definitionsAntonin Malzieu Ridolfi
Move PFB registers definitions into fb module and update registers visibility. Suggested-by: Alexandre Courbot <acourbot@nvidia.com> Suggested-by: Danilo Krummrich <dakr@kernel.org> Signed-off-by: Antonin Malzieu Ridolfi <dev@nanonej.com> Link: https://patch.msgid.link/20260727-nova-core-regs-split-v2-2-21b5e6e32ea5@nanonej.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-07-30gpu: nova-core: Add function to query WPR2 rangeAntonin Malzieu Ridolfi
Create new function abstracting WPR2 region range query. Refactor gsp hal tu102 to query the WPR2 region range using this new function. Suggested-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Antonin Malzieu Ridolfi <dev@nanonej.com> Link: https://patch.msgid.link/20260727-nova-core-regs-split-v2-1-21b5e6e32ea5@nanonej.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-07-30drm/xe/tests: add live KUnit coverage for BO page-size allocation modesNareshkumar Gollakoti
Add live KUnit coverage for the debug-controlled BO page-size allocation modes. The new tests cover forced 2M mode, forced 1G mode, and mixed mode. They verify that user BO creation applies the expected NEEDS_* flags, that no unexpected page-size flags are added in the forced modes, that BO size is rounded as expected, and that page_alignment matches the selected leaf size. The mixed-mode test does not assume a strict per-allocation rotation sequence, since the device-global mixed-mode index may be perturbed by concurrent BO creation on a live system. Instead, it validates that each allocation results in one valid mixed-mode page-size outcome. Treat transient VRAM allocation failures as skipped test cases so the tests can run in varying live environments without producing false failures. v3 - address review comments - rework mixed-mode test to avoid assuming strict rotation order - reword commit message v4 - skip VRAM-targeted live tests on non-dGFX devices v5 - advance the mixed-mode index in the test v6 - Gaurd kunit tests under CONFIG_DRM_XE_DEBUG_PAGE_SIZE v9 - consider XE_VRAM_FLAGS_NEED64K in mixed mode for certain platoform min alignment expectations. Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com> Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Link: https://patch.msgid.link/20260729121843.1255891-7-naresh.kumar.g@intel.com Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
2026-07-30drm/xe/pt: allow selecting the bind leaf PTE levelNareshkumar Gollakoti
Add a target_leaf_level field to the page-table bind walk and use it to control the level at which leaf entries are emitted. By default, the bind walk emits level-0 leaf PTEs and relies on xe_pt_hugepte_possible() to select huge mappings when possible. Add an explicit target leaf level so the walk can stop earlier when the VMA requests a larger mapping size. Use level 1 for 2M PDE mappings and level 2 for 1G PDP mappings, while keeping level 0 for normal mappings. The existing huge-page heuristic is preserved for the default level-0 path. This allows the bind path to emit 2M and 1G leaf entries when requested by the VMA, while still validating alignment and size requirements. v2 - avoid using max_level to control walk depth - use target_leaf_level to preserve the normal walk behavior - keep the default huge-page heuristic only for the level-0 path - refine commit message v3 - reword commit message v4 - allow fallback to smaller huge-page levels for non-zero target_leaf_level - avoid constraining clear_pt walks by target_leaf_level v5(Himal) - Restrict only intended level in debug page size policy mode - Allow the normal path to proceed smoothly when no debug page-size mode is selected. v8 (Himal) - Drop https://patchwork.freedesktop.org/patch/740059/?series=168905&rev=5 patch and populate target_leaf_level from bo flags - populate target_leaf_level if it is in debug page size mode otherwise fill with 0 which is having no effect on the normal flow v10 (Himal) - use xe_bo_is_vram() instead of raw VRAM flag checks so huge-page selection is based on BO VRAM placement. Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com> Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Link: https://patch.msgid.link/20260729121843.1255891-6-naresh.kumar.g@intel.com Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
2026-07-30drm/xe: apply debug page-size allocation policy to user BOsNareshkumar Gollakoti
Apply the debug page-size allocation policy during user BO creation. When page-size allocation control is enabled, override the user BO page-size selection flags based on the selected debug mode and round the requested size up to the corresponding granularity: - 2M mode selects 2M handling - 1G mode selects 1G handling - mixed mode selects the page size from the current mixed-mode index This is intended for internal debug and validation flows. When the control mode is left at the default setting, the normal user BO creation path is unchanged. v2 - ensure debug page-size allocation does not affect the default path (sashiko) - rework synchronization for concurrent access (sashiko) - refactor commit message for readability v3 - update user BO size alignment based on debug policy mode - reword commit message - ensure normal user flow is unchanged when debug policy is disabled v4(sashiko) - limit debug page-size policy application to VRAM BOs - do not override preexisting page-size requirement flags - advance mixed-mode index only after successful BO create ioctl completion - add overflow checks before ALIGN() in debug page-size handling - ensure CONFIG_DRM_XE_DEBUG_PAGE_SIZE enabled and it is dgfx v5(Himal) v5: - Guard debug page-size policy paths with CONFIG_DRM_XE_DEBUG_PAGE_SIZE - Leave the normal BO creation path unchanged when no debug mode is selected v8(Himal) - Avoid current index increment for system BO's - Simplify mixed mode align logic by changing array to struct array - Have a inline check if it is on debug mode or not - Avoid condition compiled debug in function code blocks Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com> Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Link: https://patch.msgid.link/20260729121843.1255891-5-naresh.kumar.g@intel.com Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
2026-07-30drm/xe: add XE_BO_FLAG_NEEDS_1G for minimum page-size sizingNareshkumar Gollakoti
Add XE_BO_FLAG_NEEDS_1G to mark BOs that require 1G minimum page-size sizing. Update xe_bo_init_locked() to honor the new flag in the existing VRAM/stolen-memory minimum page-size sizing path. When XE_BO_FLAG_NEEDS_1G is set, the BO size is rounded up to 1G. Otherwise, the existing 2M and 64K sizing behavior is preserved. If multiple minimum page-size flags are set, the largest requirement takes precedence: 1G over 2M over 64K. v3 - commit message reworded Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com> Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Link: https://patch.msgid.link/20260729121843.1255891-4-naresh.kumar.g@intel.com Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
2026-07-30drm/xe/debugfs: add page-size allocation mode knobNareshkumar Gollakoti
Expose a debugfs control to override the page-size allocation mode used for user BOs. The interface allows switching between the default allocation policy, forced 2M, forced 1G, and mixed allocation modes at runtime. This provides a simple way to validate behavior and debug page-size-dependent allocation flows. The debugfs entry is built only when CONFIG_DRM_XE_DEBUG_PAGE_SIZE is enabled. v2 - update changelog to match mutex-based cur_index handling - reset cur_index when switching to mixed mode (sashiko) v3 - add CONFIG guard for page-size allocation debugfs support (Himal) - create debugfs entry under CONFIG_DRM_XE_DEBUG_PAGE_SIZE v4 - reorderd this patch with kconfig patch to ensure patch builds - Gurding this debug knob for only discrete graphics v5(Himal) - Guard all page size calls with CONFIG_DRM_XE_DEBUG_PAGE_SIZE v8(Himal) - For read/show used READ_ONCE instead lock - to match Reader used WRITE_ONCE under lock protection - change modes to string format to read/writer for debugfs v9(Himal) - Add an OOB guard for mode in page_size_alloc_mode_show(). This check makes the function display "unknown" if mode has been maliciously altered by KMD, preventing out-of-bounds access. Under normal operation, values set through debugfs are validated, so OOB values should not occur. - simplify mode-to-string lookup using page_size_alloc_mode_names[] - use sysfs_match_string() to parse page_size_alloc_mode writes Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com> Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Link: https://patch.msgid.link/20260729121843.1255891-3-naresh.kumar.g@intel.com Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
2026-07-30drm/xe: add page size allocation control state to xe_deviceNareshkumar Gollakoti
Introduce xe_page_size_alloc_ctrl_mode and add page_size_alloc_ctrl state to struct xe_device along with mutex lock. The new control supports forcing user BO allocations to 2M pages, forcing them to 1G pages, or using a mixed round-robin mode across 4K, 64K, 2M, and 1G page sizes. Track the current mixed-mode index in xe_device so allocation policy can be applied consistently. v2 - make cur_index to atomic as update need in later patch to avoid race/concurency (sashiko) v3 - reworded comments - protect mode/index updates with a mutex for proper concurrency handling v4(sashiko) - move xe_debug_page_size_alloc_ctrl_init() before drm_dev_register(), so mutex and control states are initialized before any userspace visibility v5(Himal) - Guard all the debug page size policy code under CONFIG - Squash Kconfig patch to have Kconfig entry for DEBUG_PAGE_SIZE - Add inline to check debug page size support and exact mode configured if it is supported. v6 (fix CI build) v8 (Himal) - use drmm_mutex_init to avoid leak with mutex_init - call xe_debug_page_size_alloc_ctrl_init unconditionally - Add missed mixed mode check on xe_debug_page_size_mode_not_none check - Add xe_debug_page_size_mode_is_mixed() function v9 - make xe_debug_page_size_alloc_ctrl_init() return int - fail probe if drmm_mutex_init() for page_size_alloc_ctrl.lock fails Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com> Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Link: https://patch.msgid.link/20260729121843.1255891-2-naresh.kumar.g@intel.com Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
2026-07-29drm/panel-edp: Add CMN N116BCP-EA2 (HW: C3)Terry Hsiao
The raw EDID: 00 ff ff ff ff ff ff 00 0d ae 6c 11 00 00 00 00 02 24 01 04 95 1a 0e 78 03 67 75 98 59 53 90 27 1c 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 da 1d 56 e2 50 00 20 30 30 20 a6 00 00 90 10 00 00 1a e7 13 56 e2 50 00 20 30 30 20 a6 00 00 90 10 00 00 1a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 0c 47 ff 08 3c 7d 0d 0a 15 7d 00 00 00 00 05 Signed-off-by: Terry Hsiao <terry_hsiao@compal.corp-partner.google.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patch.msgid.link/20260728035931.10342-1-terry_hsiao@compal.corp-partner.google.com
2026-07-29drm/panel-edp: Add BOE NE140QDM-NX2Weiji Wang
Add timing from datasheet for BOE NE140QDM-NX2. edid-decode (hex): 00 ff ff ff ff ff ff 00 09 e5 f2 0a 00 00 00 00 20 1f 01 04 a5 1e 13 78 03 ee 96 a3 54 4c 99 26 0f 4e 51 00 00 00 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 60 d2 00 a0 a0 40 32 60 30 20 35 00 2e bd 10 00 00 18 c8 9d 00 a0 a0 40 32 60 30 20 35 00 2e bd 10 00 00 18 00 00 00 fd 00 30 78 c6 c6 36 01 0a 20 20 20 20 20 20 00 00 00 fe 00 4e 45 31 34 30 51 44 4d 2d 4e 58 32 20 01 f8 70 13 79 00 00 03 01 14 30 69 00 05 ff 09 9f 00 2f 00 1f 00 3f 06 31 00 02 00 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 4d 90 Signed-off-by: Weiji Wang <nebclllo0444@gmail.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patch.msgid.link/82fc6395-3425-4f71-ba58-813856cee61d@gmail.com
2026-07-29drm/panel: ilitek-ili9805: make cleanup funcs voidMichail Tatas
Make cleanup functions return void since no one is checking their return values Signed-off-by: Michail Tatas <michail.tatas@gmail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patch.msgid.link/20260723203601.806697-4-michail.tatas@gmail.com
2026-07-29drm/panel: ilitek-ili9805: Use dsi_multi in initMichail Tatas
Drop the struct ili9805_instr and the init table and use init functions. Signed-off-by: Michail Tatas <michail.tatas@gmail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patch.msgid.link/20260723203601.806697-3-michail.tatas@gmail.com
2026-07-29drm/panel: ilitek-ili9805: Use _multi variantsMichail Tatas
Convert functions mipi_dsi_* to mipi_dsi_*_multi as per the gpu/todo file. The multi variant of these functions include improved error handling. Signed-off-by: Michail Tatas <michail.tatas@gmail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patch.msgid.link/20260723203601.806697-2-michail.tatas@gmail.com
2026-07-29drm/amd/display: Exit idle optimizations before programmingLeo Li
[Why] We need to exit PSR/IPS before programming. Before calling DC for programming in amdgpu_dm_commit_planes(), there's a vblank_control_workqueue flush. This waits for IPS and PSR exit. (See drm_vblank_on/off() > amdgpu_dm_crtc_set_vblank() --queue_work()-> amdgpu_dm_crtc_vblank_control_worker()) Prior to the tagged "Fixes:" change, drm_vblank_get() was called before the workqueue flush. This ordering ensures that PSR exit occurred before programming. After the "Fixes:" change, drm_vblank_get() is called after the workqueue flush, leading to programming while idle optimizations are still active. This can lead to incorrect flip_pending detection used by vblank event delivery. [How] Split the vblank_get() component of `dm_arm_vblank_event()` into `dm_arm_vblank_event_pre_programming()`, which is called before programming. Call it before the vblank_control_workqueue flush. Includes a drive-by cleanup of prepare_flip_isr(): the only caller is dm_arm_vblank_event() and it's simple enough to roll-in. v2: Fix checkpatch formatting warning on drm_arm_vblank_event_pre_programming() arg alignment. Fixes: 48ab86360af1 ("drm/amd/display: check GRPH_FLIP status before sending event") Cc: stable@vger.kernel.org Link: https://gitlab.freedesktop.org/drm/amd/-/work_items/4141#note_3583205 Link: https://gitlab.freedesktop.org/drm/amd/-/work_items/5527 Assisted-by: Codex:gpt-5.6-sol Assisted-by: Claude:opus-5 Suggested-by: David Weber <weber.aulendorf@gmail.com> Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 05984e29520a28c27f5a2388742c957a6a87ee7a)
2026-07-29drm/amd/pm: hide pp_table sysfs on APUsYang Wang
APUs use firmware-owned DPM tables and do not support replacement through pp_table. Generic callbacks can nevertheless expose the sysfs file and accept an upload before resetting the power management stack. Treat pp_table as unsupported on APUs. Use the same platform check in the get and set paths to hide the file and reject uploads. Fixes: 289921b03fe5 ("drm/amd/powerplay: implement sysfs of pp_table for smu11 (v2)") Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 74f28db2db69777cd2f059d50fe34e365ddd5add) Cc: stable@vger.kernel.org
2026-07-29drm/amd/amdgpu: remove duplicated code in gfx_v11 and gfx_v12Ulisses Paixao
The functions gfx_v11_0_handle_priv_fault and gfx_v12_0_handle_priv_fault share the same logic for searching and triggering a scheduler fault on a ring. This patch moves the shared ring-searching logic to a common function, amdgpu_gfx_handle_priv_fault, in amdgpu_gfx.c. The hardware-specific decoding of ring IDs remains in the version-specific files to maintain proper architectural separation. Signed-off-by: Ulisses Paixao <ulissespaixao@usp.br> Co-developed-by: Felipe Sousa <felipesousa@usp.br> Signed-off-by: Felipe Sousa <felipesousa@usp.br> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-29drm/amdgpu/gfx7: Enable IP block soft reset as a GPU recovery methodTimur Kristóf
Enable IP block soft reset as a GPU recovery method for GFX7 graphics and compute rings. This improves current user experience on all GFX7 chips: * On Kaveri and Kabini there is currently no working GPU recovery method so those chips currently require the user to manually reset the computer when there was a hang. * On Hawaii and Bonaire, the current GPU recovery method always clears the contents of VRAM, which means that a buggy (hanging) app can crash the whole graphical session, which is less than ideal. Using GFX IP block soft reset means that we can now have a working recovery on GFX7 APUs and we can also move on from GFX hangs on dGPUs without crashing the whole system. Tested with the "hard_reset_cp_wait" test case from the Hang Test Suite created by Natalie Vock and Konstantin Seurer. This Vulkan testcase waits for an event that never occurs, effectively a WAIT_REG_MEM packet that intentionally hangs. IP block soft reset can resolve that hang and allow the rest of the system to move on and keep functioning without needing a full ASIC reset. Tested on the following chips: Bonaire (Radeon HD 7790) Hawaii (Radeon R9 390X) Kaveri (A10-7850K) Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-29drm/amdgpu/gfx7: Fixup IP block soft resetTimur Kristóf
Use basically the same implementation as GFX8, except for the GFX7 specific MQD functions. Reset every block using the GRBM, then proceed to reset the GRBM and SEM blocks using the SRBM. Remove the redundant gfx_v7_0_update_cg() function. The soft reset now calls the clock and powergating functions of the IP block instead. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-29drm/amdgpu/gfx7: Use COND_EXECTimur Kristóf
COND_EXEC tells the CP to discard the dwords following it when its condition is zero (false). This is useful for GPU recovery because it can help reduce collateral damage during GFX IP block soft reset, meaning that it reduces the likelyhood that we fail some jobs which are not guilty of the hang as the IP block soft reset mechanism clears the condition before doing the reset. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-29drm/amdgpu/gfx7: Clean up gfx ring during resetTimur Kristóf
Clear the WPTR and RPTR at ring initialization. Additionally clear the ring contents during reset. After a reset, the ring contents could be "dirty" and contain packets emitted before the reset. and thus need to be cleared to prevent the command processor from executing packets left over in the ring from before the reset. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.25.1) at 2026-09-07 02:25:55 +0000