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path: root/drivers/gpu/drm/amd/pm
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2026-01-08drm/amd: Enable SMU 15_0_0 firmware headersPratik Vishwakarma
Add SMU 15_0_0 firmware headers v2: squash in updates (Alex) Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08drm/amd/pm: Use driver table for board temperatureLijo Lazar
GPU board and Baseboard temperatures come from system metrics table. Driver keeps separate metrics table for both. Use the new driver table structure to represent them. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08drm/amd/pm: Use cached gpu metrics tableLijo Lazar
If cached gpu metrics table is available, return it directly. Also, deprecate gpu_metrics_table variables as they are no longer used. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08drm/amd/pm: Use driver table structure in smuv14Lijo Lazar
Use driver table structure for gpu metrics in smuv14. The default cache interval is set at 5ms. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08drm/amd/pm: Use driver table structure in smuv13Lijo Lazar
Use driver table structure for gpu metrics in smuv13. The default cache interval is set at 5ms. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08drm/amd/pm: Use driver table structure in smuv12Lijo Lazar
Use driver table structure for gpu metrics in smuv12. The default cache interval is set at 5ms. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-08drm/amd/pm: Use driver table structure in smuv11Lijo Lazar
Use driver table structure for gpu metrics in smuv11. The default cache interval is set at 5ms. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/pm: Add smu driver table structureLijo Lazar
For interfaces like gpu metrics, driver returns a formatted structure based on IP version. Add a separate data structure for such tables which also tracks the cache intervals. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/pm: fix pp_dpm_pcie wrong state issue for smu v13.0.0Yang Wang
put wrong value into incorrect data into following function, which caused it to fail to match the correct item on smu v13.0.0: smu_cmn_print_pcie_levels() Fixes: a95f01edd80b ("drm/amd/pm: Use common helper for smuv13.0.0 dpm") Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/pm: fix pp_dpm_pcie wrong state issue for smu v13.0.7Yang Wang
put wrong value into incorrect data into following function, which caused it to fail to match the correct item on smu v13.0.7: smu_cmn_print_pcie_levels() Fixes: b2debbbb60f1 ("drm/amd/pm: Use common helper for smuv13.0.7 dpm") Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/pm: fix pp_dpm_pcie wrong state issue for smu v14.0.2Yang Wang
put wrong value into incorrect data into following function, which caused it to fail to match the correct item on smu v14.0.2: smu_cmn_print_pcie_levels() Fixes: 03d11f8564ca ("drm/amd/pm: Use common helper for smuv14.0.2 dpm") Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/pm: add smu pcie dpm cap & width convert helperYang Wang
define following heler to convert pmfw pcie dpm index to smu index. - SMU_DPM_PCIE_GEN_IDX(gen) - SMU_DPM_PCIE_WIDTH_IDX(width) Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/pm: Disable MMIO access during SMU Mode 1 resetPerry Yuan
During Mode 1 reset, the ASIC undergoes a reset cycle and becomes temporarily inaccessible via PCIe. Any attempt to access MMIO registers during this window (e.g., from interrupt handlers or other driver threads) can result in uncompleted PCIe transactions, leading to NMI panics or system hangs. To prevent this, set the `no_hw_access` flag to true immediately after triggering the reset. This signals other driver components to skip register accesses while the device is offline. A memory barrier `smp_mb()` is added to ensure the flag update is globally visible to all cores before the driver enters the sleep/wait state. Signed-off-by: Perry Yuan <perry.yuan@amd.com> Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/pm: force send pcie parmater on navi1xYang Wang
v1: the PMFW didn't initialize the PCIe DPM parameters and requires the KMD to actively provide these parameters. v2: clean & remove unused code logic (lijo) Fixes: 1a18607c07bb ("drm/amd/pm: override pcie dpm parameters only if it is necessary") Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4671 Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd: Convert DRM_*() to drm_*()Mario Limonciello (AMD)
The drm_*() macros include the device which is helpful for debugging issues in multi-GPU systems. Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/pm: fix wrong pcie parameter on navi1xYang Wang
fix wrong pcie dpm parameter on navi1x Fixes: 1a18607c07bb ("drm/amd/pm: override pcie dpm parameters only if it is necessary") Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4671 Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Co-developed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-16drm/amd/pm: restore SCLK settings after S0ix resumemythilam
User-configured SCLK(GPU core clock)frequencies were not persisting across S0ix suspend/resume cycles on smu v14 hardware. The issue occurred because of the code resetting clock frequency to zero during resume. This patch addresses the problem by: - Preserving user-configured values in driver and sets the clock frequency across resume - Preserved settings are sent to the hardware during resume Signed-off-by: mythilam <mythilam@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use common helper for smuv14.0.2 dpmLijo Lazar
Use helper function to print smuv14.0.2 dpm tables to sysfs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use common helper for smuv13.0.7 dpmLijo Lazar
Use helper function to print smuv13.0.7 dpm tables to sysfs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use common helper for smuv13.0.6 dpmLijo Lazar
Use helper function to print navi10 dpm tables to sysfs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use common helper for smuv13.0.0 dpmLijo Lazar
Use helper function to print smuv13.0.0 dpm tables to sysfs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use common helper for aldebaran dpm tableLijo Lazar
Use helper function to print aldebaran dpm tables to sysfs. Remove unused functions. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use common helper for sienna dpm tableLijo Lazar
Use helper function to print sienna cichlid dpm tables to sysfs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use common helper for navi10 dpm tableLijo Lazar
Use helper function to print navi10 dpm tables to sysfs. Also, remove FCLK table as it is not supported in navi10. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use common helper for arcturus dpmLijo Lazar
Use the helper function to print DPM clock levels to sysfs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Add a helper to show dpm tableLijo Lazar
Add a helper function to print clock and pcie dpm levels through sysfs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use generic pcie dpm table for SMUv14Lijo Lazar
Use smu_pcie_table for SMUv14 SOCs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use generic pcie dpm table for SMUv13Lijo Lazar
Use smu_pcie_table for SMUv13 SOCs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use generic pcie dpm table for SMUv11Lijo Lazar
Use smu_pcie_table for SMUv11 SOCs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Add generic pcie dpm tableLijo Lazar
Add a generic pcie dpm table which contains the number of link clock levels and link clock, pcie gen speed/width corresponding to each level. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use generic dpm table for SMUv14 SOCsLijo Lazar
Use the generic dpm table structure instead of SMUv14 specific table. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use generic dpm table for SMUv13 SOCsLijo Lazar
Use the generic dpm table structure instead of SMUv13 specific table. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use generic dpm table for SMUv11 SOCsLijo Lazar
Remove SMUv11 specific DPM table and use the generic dpm table structure. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Add clock table structureLijo Lazar
Add a common clock table structure to represent dpm levels for different clocks. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Deprecate print_clock_levels interfaceLijo Lazar
Use emit_clock_levels instead of print_clock_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clock_levels in vega20Lijo Lazar
Move to emit_clock_levels from print_clock_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clock_levels in vega12Lijo Lazar
Move to emit_clock_levels from print_clock_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clock_levels in vega10Lijo Lazar
Keep only emit_clock_levels, and remove print_clock_levels. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clock_levels in SMUv10.0Lijo Lazar
Move to emit_clock_levels from print_clock_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clock_levels in SMUv8.0Lijo Lazar
Move to emit_clock_levels from print_clock_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clock_levels in SMUv7.0Lijo Lazar
Move to emit_clock_levels from print_clock_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clk_levels in SMUv14.0.2Lijo Lazar
Move to emit_clk_levels from print_clk_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clk_levels in SMUv14.0.0Lijo Lazar
Move to emit_clk_levels from print_clk_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clk_levels in yellow carpLijo Lazar
Move to emit_clk_levels from print_clk_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clk_levels in SMUv13.0.7Lijo Lazar
Move to emit_clk_levels from print_clk_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clk_levels in SMUv13.0.6Lijo Lazar
Move to emit_clk_levels from print_clk_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clk_levels in SMUv13.0.5Lijo Lazar
Move to emit_clk_levels from print_clk_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clk_levels in SMUv13.0.4Lijo Lazar
Move to emit_clk_levels from print_clk_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clk_levels in SMUv13.0.0Lijo Lazar
Move to emit_clk_levels from print_clk_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clk_levels in renoirLijo Lazar
Move to emit_clk_levels from print_clk_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.25.1) at 2026-06-06 01:25:18 +0000