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2026-04-20ARM: dts: bcm4709: fix bus range assignmentArnd Bergmann
The netgear r8000 dts file limits the bus range for the first host bridge to exclude bus 0, but the two devices on the first bus are explicitly assigned to bus 0, causing a build time warning: /home/arnd/arm-soc/arch/arm/boot/dts/broadcom/bcm4709-netgear-r8000.dts:142.3-27: Warning (pci_device_bus_num): /axi@18000000/pcie@13000/pcie@0/pcie@0,0/pcie@1,0:bus-range: PCI bus number 0 out of range, expected (1 - 255) /home/arnd/arm-soc/arch/arm/boot/dts/broadcom/bcm4709-netgear-r8000.dts:142.3-27: Warning (pci_device_bus_num): /axi@18000000/pcie@13000/pcie@0/pcie@0,0/pcie@2,0:bus-range: PCI bus number 0 out of range, expected (1 - 255) As Rosen mentioned, the bus-range property was a mistake, so just remove it and keep the reg values pointing to bus 0, which is allowed by the default bus range of the SoC. Fixes: 893faf67438c ("ARM: dts: BCM5301X: add root pcie bridges") Suggested-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20260414064754.3129667-1-arnd@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-03-20ARM: dts: BCM5301X: EA9200: specify partitionsRosen Penev
Some are needed to be specified so that linksys,ns-firmware works properly. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20260319035324.269905-6-rosenp@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: BCM5301X: EA9200: add LEDsRosen Penev
Allows control and configuration of device LEDs. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20260319035324.269905-4-rosenp@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: BCM5301X: EA9200: add USB GPIOsRosen Penev
Allows at least halt to turn the USB ports off. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20260319035324.269905-3-rosenp@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: BCM5301X: EA9200: add WiFi buttonRosen Penev
Adds ability to configure the WiFi button. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20260319035324.269905-2-rosenp@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: broadcom: bcm2835-rpi: Move non simple-bus nodes to root levelRob Herring (Arm)
The 'gpu' and 'firmware' nodes are not MMIO devices, so they should not be under a 'simple-bus'. Additionally, the "raspberrypi,bcm2835-power" node is part of the firmware, so move it under the 'rpi-firmware' node. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260320154809.1246064-1-robh@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: bcm63148: Add I2C blockLinus Walleij
The BCM63148 has a brcmper I2C block. The peripheral range needs to be extended to accommodate it. The Boot LUT is at offset + 0x10000 so extend it to cover at least that too, 128 KB. INTERRUPT_ID_I2C is at (ISR_TABLE3_OFFSET + 19) = 96+19 = 115, convert back to SPI IRQ 115-32 = 83. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20260218-bcmbca-i2c-dts-v2-7-5373ef82c50c@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: bcm63138: Add I2C blockLinus Walleij
The BCM63138 has a brcmper I2C block. The interrupt is at INTERRUPT_ID_I2C whic is (ISR_TABLE3_OFFSET + 19) = 96+115, convert back to SPI interrupt 115-32 = 83. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20260218-bcmbca-i2c-dts-v2-6-5373ef82c50c@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: bcm6878: Add I2C bus blockLinus Walleij
The BCM6878 has an brcmper I2C block. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20260218-bcmbca-i2c-dts-v2-5-5373ef82c50c@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: bcm6855: Add I2C bus blocksLinus Walleij
The BCM6855 has two brcmper I2C blocks, the second one in the PERF1 area at 0xff85a800, this is covered by the current bus range. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20260218-bcmbca-i2c-dts-v2-4-5373ef82c50c@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: bcm6846: Add I2C bus blockLinus Walleij
The BCM6846 has a brcmper I2C block. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20260218-bcmbca-i2c-dts-v2-3-5373ef82c50c@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: bcm63138: Fix DMA IRQLinus Walleij
INTERRUPT_ID_PL081 is (ISR_TABLE_3_OFFSET + 23) which is 96+3 = 119, convert back to SPI interrupt 119-32 = 87. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20260218-bcmbca-i2c-dts-v2-2-5373ef82c50c@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: bcm6878: Fix PL081 DMA block IRQLinus Walleij
SPI_TABLE_OFFSET_2 is 96 in 6878. 96+30 = 126. Convert back dtsi SPI interrupt 126 - 32 = 94 Reviewed-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20260218-bcmbca-i2c-dts-v2-1-5373ef82c50c@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: BCM5301X: AC5300: set WAN MAC from nvramRosen Penev
The WAN MAC is offset by 1. Set in dts to avoid having to handle this in userspace. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20260225230827.21715-5-rosenp@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: BCM5301X: AC3100: set WAN MAC from nvramRosen Penev
The WAN MAC is offset by 1. Set it to avoid having to do so in userspace. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20260225230827.21715-4-rosenp@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: BCM5301X: panamera: set WAN MAC from nvramRosen Penev
The MAC address from the stock firmware is offset by 1. Define it properly to avoid having to override it in userspace. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20260225230827.21715-3-rosenp@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: BCM5301X: EA9200: set WAN MAC from nvramRosen Penev
The MAC address from the stock firmware is offset by 1. Define it properly to avoid having to override it in userspace. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20260225230827.21715-2-rosenp@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-16ARM: dts: BCM5301X: add root pcie bridgesRosen Penev
They are always required and instead of duplicating a definition in each dts file, place it in dtsi with labels and work based on that. Also changed each bridge@ to pcie@ to get extra dtc static analysis. Fixed bridge numbers as a result. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20260302000736.592422-1-rosenp@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-16ARM: dts: BCM5301X: Drop extra NAND controller compatibleMiquel Raynal
Fix the dtbs_check warning introduced when the brcm,brcmnand fallback compatible got removed for iProc machines. Fixes: 4db35366d6dc ("dt-bindings: mtd: brcm,brcmnand: Drop "brcm,brcmnand" compatible for iProc") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20260204091530.624230-1-miquel.raynal@bootlin.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-16ARM: dts: BCM5301X: Describe PCIe controllers fullyRafał Miłecki
Tested successfully on BCM47094 SoC using Linux's pcie-iproc-platform driver. This fixes: arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dtb: pcie@12000: 'device_type' is a required property from schema $id: http://devicetree.org/schemas/pci/pci-bus.yaml# arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dtb: pcie@12000: 'ranges' is a required property from schema $id: http://devicetree.org/schemas/pci/pci-bus.yaml# arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dtb: pcie@13000: 'device_type' is a required property from schema $id: http://devicetree.org/schemas/pci/pci-bus.yaml# arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dtb: pcie@13000: 'ranges' is a required property from schema $id: http://devicetree.org/schemas/pci/pci-bus.yaml# arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dtb: pcie@14000: 'device_type' is a required property from schema $id: http://devicetree.org/schemas/pci/pci-bus.yaml# arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dtb: pcie@14000: 'ranges' is a required property from schema $id: http://devicetree.org/schemas/pci/pci-bus.yaml# Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20260108224026.3550-1-zajec5@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-01-08ARM: dts: broadcom: bcm2711: Fix 'simple-bus' node namesRob Herring (Arm)
Fix 'simple-bus' node names to follow the defined pattern. Nodes with 'reg' or 'ranges' addresses should also have a unit-address. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260106-dt-dtbs-broadcom-fixes-v1-1-ba45874e4553@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-11-04ARM: dts: BCM53573: Fix address of Luxul XAP-1440's Ethernet PHYRafał Miłecki
Luxul XAP-1440 has BCM54210E PHY at address 25. Fixes: 44ad82078069 ("ARM: dts: BCM53573: Fix Ethernet info for Luxul devices") Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20251002194852.13929-1-zajec5@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-10-13ARM: dts: broadcom: rpi: Switch to V3D firmware clockStefan Wahren
Until commit 919d6924ae9b ("clk: bcm: rpi: Turn firmware clock on/off when preparing/unpreparing") the clk-raspberrypi driver wasn't able to change the state of the V3D clock. Only the clk-bcm2835 was able to do this before. After this commit both drivers were able to work against each other, which could result in a system freeze. One step to avoid this conflict is to switch all V3D consumer to the firmware clock. Reported-by: Marek Szyprowski <m.szyprowski@samsung.com> Closes: https://lore.kernel.org/linux-arm-kernel/727aa0c8-2981-4662-adf3-69cac2da956d@samsung.com/ Fixes: 919d6924ae9b ("clk: bcm: rpi: Turn firmware clock on/off when preparing/unpreparing") Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Co-developed-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Melissa Wen <mwen@igalia.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20251005113816.6721-1-wahrenst@gmx.net Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-09-03ARM: dts: BCM5301X: Add support for Buffalo WXR-1750DHPTaishi Shimizu
Add initial device tree support for the Buffalo WXR-1750DHP, a consumer Wi-Fi router based on the Broadcom BCM4708A0 SoC. Hardware specifications: * Processor: Broadcom BCM4708A0 dual-core @ 800 MHz * RAM: DDR3 256 MB * Ethernet Switch: Broadcom BCM53011 integrated via SRAB * NAND Flash: 128 MB (8-bit ECC) * SPI Flash: None * Ports: 4 LAN Ports, 1 WAN Port * USB: 1x USB 3.0 Type-A port Signed-off-by: Taishi Shimizu <s.taishi14142@gmail.com> Link: https://lore.kernel.org/r/20250713071826.726682-3-s.taishi14142@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-08-09Merge tag 'soc-fixes-6.17-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC fixes from Arnd Bergmann: "These are a few patches to fix up bits that went missing during the merge window: The tegra and s3c patches address trivial regressions from conflicts, the bcm7445 makes the dt conform to the binding that was made stricter" * tag 'soc-fixes-6.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: arm64: tegra: Remove numa-node-id properties ARM: s3c/gpio: complete the conversion to new GPIO value setters ARM: dts: broadcom: Fix bcm7445 memory controller compatible
2025-07-15ARM: dts: broadcom: Fix bcm7445 memory controller compatibleFlorian Fainelli
The memory controller node compatible string was incompletely specified and used the fallback compatible. After commit 501be7cecec9 ("dt-bindings: memory-controller: Define fallback compatible") however, we need to fully specify the compatible string. Fixes: 501be7cecec9 ("dt-bindings: memory-controller: Define fallback compatible") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202507011302.ZqNlBKWX-lkp@intel.com/ Link: https://lore.kernel.org/r/20250701175538.1633435-1-florian.fainelli@broadcom.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-06-09ARM: dts: bcm958625-meraki-mx6x: Use #pwm-cells = <3>Uwe Kleine-König
bcm-nsp.dtsi has #pwm-cells = <3> as is specified in the binding. So to also use that correct value for bcm958625-meraki-mx6x the property overriding that value just has to be dropped. This fixes a few warnings like: arch/arm/boot/dts/broadcom/bcm958625-meraki-mx65.dtb: pwm@31000: #pwm-cells: 3 was expected from schema $id: http://devicetree.org/schemas/pwm/brcm,iproc-pwm.yaml# Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://lore.kernel.org/r/20250527181320.373572-2-u.kleine-koenig@baylibre.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-06-09ARM: dts: bcm63178: Add BCMBCA peripheralsLinus Walleij
All the BCMBCA SoCs share a set of peripherals at 0xff800000, albeit at slightly varying memory locations on the bus and with varying IRQ assignments. Add the watchdog, GPIO, RNG, LED and DMA blocks for the BCM63178 based on the vendor files 63178_map_part.h and 63178_intr.h from the "bcmopen-consumer" code drop. This SoC has up to 256 possible GPIOs due to having 8 registers with 32 GPIOs in each available. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20250512-bcmbca-peripherals-arm-v3-8-86f97ab4326f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-06-09ARM: dts: bcm63148: Add BCMBCA peripheralsLinus Walleij
All the BCMBCA SoCs share a set of peripherals at 0xff800000, albeit at slightly varying memory locations on the bus and with varying IRQ assignments. Add the GPIO, RNG and LED and DMA blocks for the BCM63148 based on the vendor files 63148_map_part.h and 63148_intr.h from the "bcmopen-consumer" code drop. This SoC has up to 160 possible GPIOs due to having 5 registers with 32 GPIOs in each available. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20250512-bcmbca-peripherals-arm-v3-7-86f97ab4326f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-06-09ARM: dts: bcm63138: Add BCMBCA peripheralsLinus Walleij
All the BCMBCA SoCs share a set of peripherals at 0xff800000, albeit at slightly varying memory locations on the bus and with varying IRQ assignments. Extend the peripheral interrupt window to 0x10000 as it need to fit the DMA block. Add the GPIO, RNG and LED and DMA blocks for the BCM63138 based on the vendor files 63138_map_part.h and 63138_intr.h from the "bcmopen-consumer" code drop. This SoC has up to 160 possible GPIOs due to having 5 registers with 32 GPIOs in each available. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20250512-bcmbca-peripherals-arm-v3-6-86f97ab4326f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-06-09ARM: dts: bcm6878: Add BCMBCA peripheralsLinus Walleij
All the BCMBCA SoCs share a set of peripherals at 0xff800000, albeit at slightly varying memory locations on the bus and with varying IRQ assignments. Add the first and second watchdog, GPIO, RNG, LED and DMA blocks for the BCM6878 based on the vendor files 6878_map_part.h and 6878_intr.h from the "bcmopen-consumer" code drop. This SoC has up to 256 possible GPIOs due to having 8 registers with 32 GPIOs in each available. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20250512-bcmbca-peripherals-arm-v3-5-86f97ab4326f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-06-09ARM: dts: bcm6855: Add BCMBCA peripheralsLinus Walleij
All the BCMBCA SoCs share a set of peripherals at 0xff800000, albeit at slightly varying memory locations on the bus and with varying IRQ assignments. Add the first and second watchdog, GPIO, RNG, LED, DMA and second PL011 UART blocks for the BCM6855 based on the vendor files 6855_map_part.h and 6855_intr.h from the "bcmopen-consumer" code drop. This SoC has up to 256 possible GPIOs due to having 8 registers with 32 GPIOs in each available. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20250512-bcmbca-peripherals-arm-v3-4-86f97ab4326f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-06-09ARM: dts: bcm6846: Add interrupt to RNGLinus Walleij
The r200 RNG has an interrupt so let's add it. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20250512-bcmbca-peripherals-arm-v3-3-86f97ab4326f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-06-09ARM: dts: bcm6878: Correct UART0 IRQ numberLinus Walleij
According to the vendor file 6878_intr.h the UART0 has IRQ 92, not 32. Assuming this is a copy-and-paste error. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20250512-bcmbca-peripherals-arm-v3-1-86f97ab4326f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-05-05ARM: dts: bcm: Add support for Raspberry Pi 2 (2nd rev)Stefan Wahren
The Raspberry Pi 2 (2nd rev) has the BCM2837 SoC instead of the BCM2836. Except of this the configuration of the board is same as the predecessor (no WLAN, no BT). Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Link: https://lore.kernel.org/r/20250418143307.59235-3-wahrenst@gmx.net Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-04-07ARM: dts: Drop DTS for BCM59056 PMUArtur Weber
The BCM59056 PMU has its own separate DTSI, meant to be included in a DTS file after defining the pmu node on some I2C bus. This seems rather unintuitive; drop the DTS in favor of adding the BCM59056 PMU node directly into the device DTS files. If the amount of subdevices supported by the BCM590xx grows, and a common device tree turns out to be beneficial, it can be reintroduced in the future. Signed-off-by: Artur Weber <aweber.kernel@gmail.com> Link: https://lore.kernel.org/r/20250304-bcm59054-v6-3-ae8302358443@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-04-07ARM: dts: bcm2166x: Add bcm2166x-pinctrl DTSIArtur Weber
Add common DTSI with common pin control configs for BCM21664/BCM23550 and include it in bcm2166x-common.dtsi. The configs are kept in a separate DTSI to keep things cleaner (pin config definitions take up quite a lot of space). Currently contains pins for BSC buses and SD/MMC; more pins can be added in the future. Signed-off-by: Artur Weber <aweber.kernel@gmail.com> Link: https://lore.kernel.org/r/20250303-bcm21664-pinctrl-v3-6-5f8b80e4ab51@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-04-07ARM: dts: bcm2166x-common: Add pinctrl nodeArtur Weber
Now that the pinctrl driver supports the BCM21664, add a node for pinctrl in the DTS to allow for controlling pinmux pins. Signed-off-by: Artur Weber <aweber.kernel@gmail.com> Link: https://lore.kernel.org/r/20250303-bcm21664-pinctrl-v3-5-5f8b80e4ab51@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-03-14Merge tag 'arm-soc/for-6.14/devicetree-fixes-part2' of ↵Arnd Bergmann
https://github.com/Broadcom/stblinux into arm/fixes This pull request contains Broadcom ARM-based SoCs Device Tree fixes for 6.14, please pull the following: - Chester fixes the switch port assignments on the ASUS RT-AC3200 and RT-AC5300 routers - Phil removes a Device Tree property flagging the BCM2711 ARM timers as not being configured which would have prevented the use of vDSO on the Pi 4 running a 32-bit kernel * tag 'arm-soc/for-6.14/devicetree-fixes-part2' of https://github.com/Broadcom/stblinux: ARM: dts: BCM5301X: Fix switch port labels of ASUS RT-AC3200 ARM: dts: BCM5301X: Fix switch port labels of ASUS RT-AC5300 ARM: dts: bcm2711: Don't mark timer regs unconfigured Link: https://lore.kernel.org/r/20250308150528.1900822-1-florian.fainelli@broadcom.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-03-08ARM: dts: BCM5301X: Fix switch port labels of ASUS RT-AC3200Chester A. Unal
After using the device for a while, Tom reports that he initially described the switch port labels incorrectly. Apparently, ASUS's own firmware also describes them incorrectly. Correct them to what is seen on the chassis. Reported-by: Tom Brautaset <tbrautaset@gmail.com> Fixes: b116239094d8 ("ARM: dts: BCM5301X: Add DT for ASUS RT-AC3200") Signed-off-by: Chester A. Unal <chester.a.unal@arinc9.com> Link: https://lore.kernel.org/r/20250304-for-broadcom-fix-rt-ac3200-switch-ports-v1-1-7e249a19a13e@arinc9.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-03-08ARM: dts: BCM5301X: Fix switch port labels of ASUS RT-AC5300Chester A. Unal
After using the device for a while, Tom reports that he initially described the switch port labels incorrectly. Correct them. Reported-by: Tom Brautaset <tbrautaset@gmail.com> Fixes: 961dedc6b4e4 ("ARM: dts: BCM5301X: Add DT for ASUS RT-AC5300") Signed-off-by: Chester A. Unal <chester.a.unal@arinc9.com> Link: https://lore.kernel.org/r/20250303-for-broadcom-fix-rt-ac5300-switch-ports-v1-1-e058856ef4d3@arinc9.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-03-08ARM: dts: bcm2711: Don't mark timer regs unconfiguredPhil Elwell
During upstream process of Raspberry Pi 4 back in 2019 the ARMv7 stubs didn't configured the ARM architectural timer. This firmware issue has been fixed in 2020, which gave users enough time to update their system. So drop this property to allow the use of the vDSO version of clock_gettime. Link: https://github.com/raspberrypi/tools/pull/113 Fixes: 7dbe8c62ceeb ("ARM: dts: Add minimal Raspberry Pi 4 support") Signed-off-by: Phil Elwell <phil@raspberrypi.com> Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250222094113.48198-1-wahrenst@gmx.net Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-02-25ARM: dts: bcm2711: PL011 UARTs are actually r1p5Phil Elwell
The ARM PL011 UART instances in BCM2711 are r1p5 spec, which means they have 32-entry FIFOs. The correct periphid value for this is 0x00341011. Thanks to N Buchwitz for pointing this out. Signed-off-by: Phil Elwell <phil@raspberrypi.com> Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Link: https://lore.kernel.org/r/20250223125614.3592-2-wahrenst@gmx.net Fixes: 7dbe8c62ceeb ("ARM: dts: Add minimal Raspberry Pi 4 support") Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-02-25ARM: dts: bcm2711: Fix xHCI power-domainStefan Wahren
During s2idle tests on the Raspberry CM4 the VPU firmware always crashes on xHCI power-domain resume: root@raspberrypi:/sys/power# echo freeze > state [ 70.724347] xhci_suspend finished [ 70.727730] xhci_plat_suspend finished [ 70.755624] bcm2835-power bcm2835-power: Power grafx off [ 70.761127] USB: Set power to 0 [ 74.653040] USB: Failed to set power to 1 (-110) This seems to be caused because of the mixed usage of raspberrypi-power and bcm2835-power at the same time. So avoid the usage of the VPU firmware power-domain driver, which prevents the VPU crash. Fixes: 522c35e08b53 ("ARM: dts: bcm2711: Add BCM2711 xHCI support") Link: https://github.com/raspberrypi/linux/issues/6537 Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Link: https://lore.kernel.org/r/20250201112729.31509-1-wahrenst@gmx.net Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-12-17ARM: dts: meraki-mr26: set mac address for gmac0Rosen Penev
Currently this needs to be done in userspace. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20241021015147.172700-1-rosenp@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-12-17ARM: dts: broadcom: Add Genexis XG6846B DTS fileLinus Walleij
This adds a device tree for the Genexis XG6846B router. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20241019-genexis-xg6846b-base-v3-9-8375a0e1f89f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-12-17ARM: dts: bcm6846: Add ARM PL081 DMA blockLinus Walleij
The ARM PL081 DMA controller can be found in the BCM6846 memory map, and it turns out to work. The block may be used as DMA engine for some of the peripherals (maybe the EMMC controller found in the same group of peripherals?) but it can always be used as a memcpy engine, which is a generic "blitter". I tested it with the dmatest module, and it copies lots of data very fast and fires hundreds of thousands of interrupts so it works just fine. Add it to the BCM6846 DTSI file. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20241019-genexis-xg6846b-base-v3-6-8375a0e1f89f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-12-17ARM: dts: bcm6846: Add LED controllerLinus Walleij
Add the BCMBCA LED controller to the BCM6846 DTSI. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20241019-genexis-xg6846b-base-v3-5-8375a0e1f89f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-12-17ARM: dts: bcm6846: Add MDIO control blockLinus Walleij
This adds the MDIO block found in the BCM6846. Use the new "brcm,bcm6846-mdio" compatible (merged to the networking tree) for this block. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20241019-genexis-xg6846b-base-v3-4-8375a0e1f89f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-12-17ARM: dts: bcm6846: Add GPIO blocksLinus Walleij
The BCM6846 has the same simplistic GPIOs as some other Broadcom SoCs: plain memory-mapped registers with up to 8 blocks of 32 GPIOs each totalling 256 GPIOs. Users of the SoC can selectively enable the GPIO blocks actually used with a certain design. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20241019-genexis-xg6846b-base-v3-3-8375a0e1f89f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
generated by cgit v1.2.3 (git 2.25.1) at 2026-06-09 09:58:52 +0000