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2025-10-21documentation: seqlock: fix the wrong documentation of ↵Oleg Nesterov
read_seqbegin_or_lock/need_seqretry The comments and pseudo code in Documentation/locking/seqlock.rst are wrong: int seq = 0; do { read_seqbegin_or_lock(&foo_seqlock, &seq); /* ... [[read-side critical section]] ... */ } while (need_seqretry(&foo_seqlock, seq)); read_seqbegin_or_lock() always returns with an even "seq" and need_seqretry() doesn't change this counter. This means that seq is always even and thus the locking pass is simply impossible. IOW, "_or_lock" has no effect and this code doesn't differ from do { seq = read_seqbegin(&foo_seqlock); /* ... [[read-side critical section]] ... */ } while (read_seqretry(&foo_seqlock, seq)); Signed-off-by: Oleg Nesterov <oleg@redhat.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
2025-10-21leds: lp55xx_common: Enable use without FW_LOADER_USER_HELPERSicelo A. Mhlongo
Many distributions disable FW_LOADER_USER_HELPER, and this configuration makes lp55xx LEDs completely unusable. Enable their use by only implying the user helper, since the basic LEDs and the hardware patterns can be used with only the sysfs interface. Tested on Nokia N900 with LP5523. Additionally do not refer to the sysfs interface as legacy anymore, since it might be the only one available to users. Signed-off-by: Sicelo A. Mhlongo <absicsz@gmail.com> Signed-off-by: Lee Jones <lee@kernel.org>
2025-10-21dt-bindings: leds: Add default-brightness property to common.yamlJean-François Lessard
Add default-brightness property to leds/common.yaml to establish a single canonical definition for LED brightness initialization. The property is currently defined locally in leds/leds-pwm.yaml and is needed by auxdisplay/titanmec,tm16xx.yaml. Properties should be defined in only one location to avoid type inconsistencies across bindings. Signed-off-by: Jean-François Lessard <jefflessard3@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Lee Jones <lee@kernel.org>
2025-10-21dt-bindings: leds: arc,arc2c0608: Convert to DT SchemaHarrison Carter
Convert the ArcticSand arc2c0608 LED driver to the dt-schema. Signed-off-by: Harrison Carter <hcarter@thegoodpenguin.co.uk> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Lee Jones <lee@kernel.org>
2025-10-21net: 6pack: Demote "How to turn on 6pack support" section headingBagas Sanjaya
"How to turn on 6pack support" is a subsection of "Building and installing the 6pack driver". Yet, the former is in the same heading level as the latter as sections, making it listed in networking docs toctree. Demote it to subsection. Signed-off-by: Bagas Sanjaya <bagasdotme@gmail.com> Link: https://patch.msgid.link/20251017064525.28836-4-bagasdotme@gmail.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-10-21net: nfc: Format userspace interface subsection headingsBagas Sanjaya
Subsection headings of "Userspace interface" is written in normal paragraph, all-capped. Properly format them as reST section headings. Signed-off-by: Bagas Sanjaya <bagasdotme@gmail.com> Link: https://patch.msgid.link/20251017064525.28836-3-bagasdotme@gmail.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-10-21Merge tag 'drm-misc-next-2025-10-02' of ↵Simona Vetter
https://gitlab.freedesktop.org/drm/misc/kernel into drm-next drm-misc-next for v6.19: UAPI Changes: Cross-subsystem Changes: - fbcon cleanups. - Make drivers depend on FB_TILEBLITTING instead of selecting it, and hide FB_MODE_HELPERS. Core Changes: - More preparations for rust. - Throttle dirty worker with vblank - Use drm_for_each_bridge_in_chain_scoped in drm's bridge code and assorted fixes. - Ensure drm_client_modeset tests are enabled in UML. - Rename ttm_bo_put to ttm_bo_fini, as a further step in removing the TTM bo refcount. - Add POST_LT_ADJ_REQ training sequence. - Show list of removed but still allocated bridges. - Add a simulated vblank interrupt for hardware without it, and add some helpers to use them in vkms and hypervdrm. Driver Changes: - Assorted small fixes, cleanups and updates to host1x, tegra, panthor, amdxdna, gud, vc4, ssd130x, ivpu, panfrost, panthor, sysfb, bridge/sn65dsi86, solomon, ast, tidss. - Convert drivers from using .round_rate() to .determine_rate() - Add support for KD116N3730A07/A12, chromebook mt8189, JT101TM023, LQ079L1SX01, raspberrypi 5" panels. - Improve reclocking on tegra186+ with nouveau. - Improve runtime pm in amdxdna. - Add support for HTX_PAI in imx. - Use a helper to calculate dumb buffer sizes in most drivers. Signed-off-by: Simona Vetter <simona.vetter@ffwll.ch> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://lore.kernel.org/r/b412fb91-8545-466a-8102-d89c0f2758a7@linux.intel.com
2025-10-21dt-bindings: embedded-controller: add Traverse Ten64 board controllerMathew McBride
Add device tree binding for the board (micro)controller on Ten64 family boards[1]. The schema is simple and is (presently) only consumed by U-Boot, but it is possible nvmem, watchdog and other features could be described in the future, as well as extension to future Traverse boards. [1] https://ten64doc.traverse.com.au/hardware/microcontroller/ Signed-off-by: Mathew McBride <matt@traverse.com.au> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-21docs: trusted-encrypted: fix htmldocs build errorGopi Krishna Menon
Running "make htmldocs" generates the following build error and warning in trusted-encrypted.rst: Documentation/security/keys/trusted-encrypted.rst:18: ERROR: Unexpected indentation. Documentation/security/keys/trusted-encrypted.rst:19: WARNING: Block quote ends without a blank line; unexpected unindent. Add a blank line before bullet list and fix the indentation of text to fix the build error and resolve the warning. Fixes: 38f6880759fd ("docs: trusted-encrypted: trusted-keys as protected keys") Signed-off-by: Gopi Krishna Menon <krishnagopi487@gmail.com> Reviewed-by: Randy Dunlap <rdunlap@infradead.org> Tested-by: Randy Dunlap <rdunlap@infradead.org> Reviewed-by: Jarkko Sakkinen <jarkko@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-10-21dt-bindings: PCI: mediatek: Add support for Airoha AN7583Christian Marangi
Introduce Airoha AN7583 SoC compatible in mediatek PCIe controller binding. Similar to GEN3, the Airoha AN7583 GEN2 PCIe controller require the PBUS csr property to permit the correct functionality of the PCIe controller. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251020111121.31779-3-ansuelsmth@gmail.com
2025-10-21dt-bindings: PCI: mediatek: Convert to YAML schemaChristian Marangi
Convert the PCI mediatek Documentation to YAML schema to enable validation of the supported GEN1/2 Mediatek PCIe controller. While converting, lots of cleanup were done from the .txt with better specifying what is supported by the various PCIe controller variant and drop of redundant info that are part of the standard PCIe Host Bridge schema. To reduce schema complexity the .txt is split in 2 YAML, one for mt7623/mt2701 and the other for every other compatible. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251020111121.31779-2-ansuelsmth@gmail.com
2025-10-20Merge tag 'linux-can-next-for-6.19-20251017' of ↵Jakub Kicinski
git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next Marc Kleine-Budde says: ==================== pull-request: can-next 2025-10-17 The first patch is by me and adds support for an optional reset to the m_can drivers. Vincent Mailhol's patch targets all drivers and removes the can_change_mtu() function, since the netdev's min and max MTU are populated. Markus Schneider-Pargmann contributes 4 patches to the m_can driver to add am62 wakeup support. The last 7 patches are by me and provide various cleanups to the m_can driver. * tag 'linux-can-next-for-6.19-20251017' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next: can: m_can: m_can_get_berr_counter(): don't wake up controller if interface is down can: m_can: m_can_tx_submit(): remove unneeded sanity checks can: m_can: m_can_class_register(): remove error message in case devm_kzalloc() fails can: m_can: m_can_interrupt_enable(): use m_can_write() instead of open coding it net: m_can: convert dev_{dbg,info,err} -> netdev_{dbg,info,err} can: m_can: hrtimer_callback(): rename to m_can_polling_timer() can: m_can: m_can_init_ram(): make static can: m_can: Support pinctrl wakeup state can: m_can: Return ERR_PTR on error in allocation can: m_can: Map WoL to device_set_wakeup_enable dt-bindings: can: m_can: Add wakeup properties can: treewide: remove can_change_mtu() can: m_can: add support for optional reset ==================== Link: https://patch.msgid.link/20251017150819.1415685-1-mkl@pengutronix.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-10-20net: docs: add missing features that can have statsJesse Brandeburg
While trying to figure out ethtool -I | --include-statistics, I noticed some docs got missed when implementing commit 0e9c127729be ("ethtool: add interface to read Tx hardware timestamping statistics"). Fix up the docs to match the kernel code, and while there, sort them in alphabetical order. Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Reviewed-by: Rahul Rameshbabu <rrameshbabu@nvidia.com> Reviewed-by: Jakub Kicinski <kuba@kernel.org> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com> Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Link: https://patch.msgid.link/20251016-jk-iwl-next-2025-10-15-v2-8-ff3a390d9fc6@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-10-21Merge tag 'drm-xe-next-2025-10-20' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/xe/kernel into drm-next Highlights: UAPI Changes: Loosen used tracking restriction (Matthew Auld) New SR-IOV debugfs structure and debugfs updates (Michal Wajdeczko) Hide the GPU madvise flag behind a VM_BIND flag (Thomas Hellström) Always expose VRAM provisioning data on discrete GPUs (Lukasz Laguna) Cross-subsystem Changes: Allow VRAM mappings for userptr when used with SVM (Matthew Brost) Driver Changes: Allow pinning of p2p dma-buf (Thomas Hellstrom) Use per-tile debugfs where appropriate (Michal Wajdeczko) Add documentation for Execution Queues (Niranjana Vishwanathapura) PF improvements (Michal Wajdeczko) VF migration recovery redesign work (Matthew Brost) User / Kernel VRAM partitioning (Piotr Piórkowski) Update Tile-based messages (Michal Wajdeczko) Allow configfs to disable specific GT types (Matt Roper) VF provisioning improvements (Michal Wajdeczko) Initial Xe3P support (Various people) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Thomas Hellstrom <thomas.hellstrom@linux.intel.com> Link: https://lore.kernel.org/r/aPXzbOb7eGbkgMrr@fedora
2025-10-20Manual conversion to use ->i_state accessors of all places not covered by ↵Mateusz Guzik
coccinelle Nothing to look at apart from iput_final(). Signed-off-by: Mateusz Guzik <mjguzik@gmail.com> Signed-off-by: Christian Brauner <brauner@kernel.org>
2025-10-20dt-bindings: iio: imu: smi330: Add bindingJianping Shen
Add devicetree binding for Bosch imu smi330. The smi330 is a combined three axis angular rate and three axis acceleration sensor module. Signed-off-by: Jianping Shen <Jianping.Shen@de.bosch.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-10-20dt-bindings: iio: adc: add max14001Marilene Andrade Garcia
Add device-tree documentation for MAX14001/MAX14002 ADCs. The MAX14001/MAX14002 are isolated, single-channel analog-to-digital converters with programmable voltage comparators and inrush current control optimized for configurable binary input applications. They share the same features, but in the MAX14001 the inrush trigger threshold, current magnitude, and current duration are all programmable, whereas in the MAX14002 these parameters are fixed. Co-developed-by: Kim Seer Paller <kimseer.paller@analog.com> Signed-off-by: Kim Seer Paller <kimseer.paller@analog.com> Signed-off-by: Marilene Andrade Garcia <marilene.agarcia@gmail.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-10-20dt-bindings: altera: removal of generic PE1 dtsLothar Rubusch
Remove the binding for the generic Mercury+ AA1 on PE1 carrier board. The removed Mercury+ AA1 on PE1 carrier board is just a particular setup case, which is actually replaced by the set of generic Mercury+ AA1 combinations patch. In other words a combination of a Mercury+ AA1 on a PE1 base board, with boot mode SD card is already covered by the generic AA1 combinations. There is no further reason to keep this particular case now in a redundantly. Thus the redundant DT setup is removed. Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2025-10-20dt-bindings: altera: add Mercury AA1 variantsLothar Rubusch
Update binding with combined .dts for the Mercury+ PE1, PE3 and ST1 carrier boards with the Mercury+ AA1 SoM. Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2025-10-20dt-bindings: altera: add binding for Mercury+ SA2Lothar Rubusch
Update the device-tree binding for the Enclustra Mercury+ SA2 SoM. Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2025-10-20dt-bindings: altera: add Enclustra Mercury SA1Lothar Rubusch
Update the DT binding for the Enclustra Mercury+ SA1 SoM Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2025-10-20scsi: ufs: dt-bindings: exynos: Add power-domainsAndré Draszik
The UFS controller can be part of a power domain, so we need to allow the relevant property 'power-domains'. Signed-off-by: André Draszik <andre.draszik@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://patch.msgid.link/20251007-power-domains-scsi-ufs-dt-bindings-exynos-v1-1-1acfa81a887a@linaro.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2025-10-20dt-bindings: dma: snps,dw-axi-dmac: Add iommu propertyKhairul Anuar Romli
Agilex5 integrates an ARM SMMU v3 (System Memory Management Unit) with dedicated Translation Buffer Units (TBUs) assigned to various peripherals, including the Synopsys DesignWare AXI DMA controller. Each TBU handles address translation for its associated device by mapping stream IDs to memory access permissions and virtual-to-physical address mappings via the SMMU core. The DesignWare AXI DMAC instances on Agilex5 are connected to their respective TBUs. These TBUs forward DMA transactions from the controller through the SMMU, enabling IOMMU-based features such as: - Address translation for DMA operations - Isolation and protection of memory regions accessed by the DMA controller - Support for secure and virtualized environments through enforced access control To support this configuration, the `iommus` property must be added to the binding schema for `snps,dw-axi-dmac`. This allows the device tree to associate each DMA controller with the correct SMMU stream ID, enabling the Linux IOMMU framework to configure translation contexts at runtime. This change documents the IOMMU support for the DMA controller on Agilex5 and allows proper integration with the SMMUv3 hardware. Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com> Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2025-10-20dt-bindings: mtd: cdns,hp-nfc: Add iommu propertyKhairul Anuar Romli
Agilex5 integrates an ARM SMMU (System Memory Management Unit) with Translation Buffer Units (TBUs) assigned to various peripherals, including the NAND controller. The Cadence HP NAND controller ("cdns,hp-nfc") on Agilex5 is behind a TBU connected to the system's SMMUv3. To support this, the controller requires an `iommus` property in the device tree to properly configure address translation through the IOMMU framework. Adding the `iommus` property to the binding schema allows the OS to associate the NAND controller with its corresponding SMMU stream ID. This enables: - DMA address translation between the controller and system memory - Memory protection for NAND operations - Proper functioning of the IOMMU framework in secure or virtualized environments This change documents the IOMMU integration for the NAND controller on platforms like Agilex5 where such hardware is present. Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com> Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2025-10-20dt-bindings: arm: rockchip: Add 100ASK DShanPi A1Hsun Lai
This documents 100ASK DShanPi A1 which is a SBC based on RK3576 SoC. Link: https://wiki.dshanpi.org/en/docs/DshanPi-A1/intro/ Signed-off-by: Hsun Lai <i@chainsx.cn> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/0601AB836AE5F348+20251014021623.286121-2-i@chainsx.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-10-20dt-bindings: arm: rockchip: Add LinkEase EasePi R1Liangbin Lian
LinkEase EasePi R1 is a high-performance mini router based on RK3568. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Liangbin Lian <jjm2473@gmail.com> Link: https://patch.msgid.link/20251014051226.64255-3-jjm2473@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-10-20dt-bindings: vendor-prefixes: Document LinkEaseLiangbin Lian
LinkEase is a company focusing on the research and development of network equipment and related software and hardware from Shenzhen. Add vendor prefix for it. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Liangbin Lian <jjm2473@gmail.com> Link: https://patch.msgid.link/20251014051226.64255-2-jjm2473@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-10-20Documentation: kvm: Fix orderingJanosch Frank
7.43 has been assigned twice, make KVM_CAP_ARM_CACHEABLE_PFNMAP_SUPPORTED 7.44. Fixes: f55ce5a6cd33 ("KVM: arm64: Expose new KVM cap for cacheable PFNMAP") Reviewed-by: Ankit Agrawal <ankita@nvidia.com> Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
2025-10-20dt-bindings: soc: imx-iomuxc-gpr: Document the CSI muxFabio Estevam
On i.MX6Q/6DL the following subnodes exist to describe the CSI port muxing: - ipu1_csi0_mux - ipu1_csi1_mux - ipu2_csi0_mux - ipu2_csi1_mux As they were not documented, dt-schema emits warnings like: 'ipu1_csi0_mux', 'ipu1_csi1_mux' do not match any of the regexes: '^pinctrl-[0-9]+$' Add a top-level patternProperties entry for these CSI mux subnodes and restrict it to i.MX6Q. Signed-off-by: Fabio Estevam <festevam@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-20dt-bindings: arm: fsl: add compatible for Skov i.MX8MP variantSteffen Trumtrar
In preparation for adding a new device tree variant with a different panel, describe the DT compatible in the binding. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-20dt-bindings: firmware: google,gs101-acpm-ipc: add ACPM clocksTudor Ambarus
The firmware exposes clocks that can be controlled via the Alive Clock and Power Manager (ACPM) interface. Make the ACPM node a clock provider by adding the mandatory "#clock-cells" property, which allows devices to reference its clock outputs. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Tested-by: Peter Griffin <peter.griffin@linaro.org> # on gs101-oriole Link: https://patch.msgid.link/20251010-acpm-clk-v6-1-321ee8826fd4@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-10-20docs: trusted-encrypted: trusted-keys as protected keysMeenakshi Aggarwal
Add a section in trusted key document describing the protected-keys. - Detailing need for protected keys. - Detailing the usage for protected keys. Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-10-20ASoC: dt-bindings: Add bindings for SpacemiT K1Troy Mitchell
Add dt-binding for the i2s driver of SpacemiT's K1 SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com> Link: https://patch.msgid.link/20251017-k1-i2s-v5-1-401ae3775fcd@linux.spacemit.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-10-19dt-bindings: iio: health: max30100: Add LED pulse-width propertyShrikant Raskar
The LED pulse width on the MAX30100 sensor determines how long the IR/Red LEDs are driven during each sample, directly affecting the emitted optical energy and hence the received signal amplitude. This parameter is highly dependent on the mechanical and optical integration of the sensor, such as: - The type and thickness of the optical window or lens covering the sensor. - The distance between the LED and photodiode. - The reflectivity of the target surface. For example: - A smartwatch or wearable ring with a thin glass window can operate with shorter pulses (200-400 us) to save power. - A medical-grade pulse oximeter or sensor mounted behind a thicker protective layer may require longer pulses (800-1600 us) for reliable signal amplitude. Because this configuration is determined by hardware design rather than by runtime conditions, it is appropriate to describe it in the DT. If not specified, the driver defaults to 1600 us to maintain existing behavior. Tested on: Raspberry Pi 3B + MAX30100 breakout board. Signed-off-by: Shrikant Raskar <raskar.shree97@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-10-19dt-bindings: iio: accel: adxl345: document second interruptWolfram Sang
The pinout of all the supported chips in this binding have two interrupt pins. Document the second one, too, even though the Linux driver currently does not support the second interrupt. Boards may have it wired nonetheless. While here, drop the dependency of interrupt-names which is already described in the core. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-10-19dt-bindings: iio: adc: adi,ad4080: add support for AD4081Antoniu Miclaus
Add device tree binding support for the AD4081 20-bit SAR ADC. Add adi,ad4081 to the compatible enum. A fallback compatible string to adi,ad4080 is not appropriate as the AD4081 has a different LVDS CNV clock count maximum (2 vs 7), requiring different driver configuration. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-10-19dt-bindings: iio: adc: adi,ad4080: add support for AD4084Antoniu Miclaus
Add device tree binding support for the AD4084 16-bit SAR ADC. Add adi,ad4084 to the compatible enum. A fallback compatible string to adi,ad4080 is not appropriate as the AD4084 has different resolution (16-bit vs 20-bit) and LVDS CNV clock count maximum (2 vs 7), requiring different driver configuration. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-10-19dt-bindings: iio: imu: Add inv_icm45600Remi Buisson
Document the ICM-45600 devices devicetree bindings. Specific variants of the device are defined because of their differences in terms of FSR or advanced features like eDMP. Signed-off-by: Remi Buisson <remi.buisson@tdk.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-10-19dt-bindings: iio: Add Infineon DPS310 sensor documentationEddie James
The DPS310 is a barometric pressure and temperature sensor with an I2C interface. Remove it from trivial-devices.yaml and add its own documentation to allow for consumers of this device such as the iio/hwmon bridge. Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-10-19dt-bindings: iio: adc: document RZ/T2H and RZ/N2H ADCCosmin Tanislav
Document the A/D 12-Bit successive approximation converters found in the Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs. RZ/T2H has two ADCs with 4 channels and one with 6. RZ/N2H has two ADCs with 4 channels and one with 15. Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-10-19dt-bindings: iio: pressure: add binding for mpl3115Antoni Pokusinski
MPL3115 is an I2C pressure and temperature sensor. It features 2 interrupt lines which can be configured to indicate events such as data ready or pressure/temperature threshold reached. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Antoni Pokusinski <apokusinski01@gmail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-10-19Documentation: iio: ade9000, adis*, adx*: Convert IIO subsystem cross-referencesBagas Sanjaya
Cross-references to iio_tools.rst (IIO Interfacing Tools) and iio_devbuf.rst (Industrial IIO device buffers) are shown in inline code instead. Convert them to proper cross-references. Signed-off-by: Bagas Sanjaya <bagasdotme@gmail.com> Reviewed-by: Randy Dunlap <rdunlap@infradead.org> Tested-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-10-19iio: ABI: document accelerometer event attributesGustavo Silva
Add ABI documentation for accelerometer event-related sysfs attributes exposed by the bmi270 driver. These include threshold, period, and enable controls for adaptive magnitude (any-motion) and rate of change (no-motion) event detection. Signed-off-by: Gustavo Silva <gustavograzs@gmail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-10-19dt-bindings: PCI: qcom,pcie-sm8550: Add Kaanapali compatibleQiang Yu
On the Qualcomm Kaanapali platform the PCIe host is compatible with the DWC controller present on the SM8550 platform. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20251015-kaanapali-pcie-upstream-v2-1-84fa7ea638a1@oss.qualcomm.com
2025-10-19dt-bindings: PCI: dwc: rockchip: Add RK3528 variantYao Zi
RK3528 ships a PCIe Gen2x1 controller that operates in RC mode only. Since the SoC has no separate MSI controller, the one integrated in the DWC PCIe IP must be used, and thus its interrupt scheme is similar to variants found in RK3562 and RK3576. Older BSP code claimed its integrated MSI controller supports only 8 MSIs[1], but this has been changed in newer BSP[2] and testing proves the controller works correctly with more than 8 MSIs allocated, suggesting the controller should be compatible with the RK3568 variant. Hence, document its compatible string. Signed-off-by: Yao Zi <ziyao@disroot.org> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://github.com/rockchip-linux/kernel/blob/792a7d4273a5/drivers/pci/controller/dwc/pcie-dw-rockchip.c#L1610-L1613 # [1] Link: https://github.com/rockchip-linux/kernel/blob/1ba51b059f25/drivers/pci/controller/dwc/pcie-dw-rockchip.c#L904-L906 # [2] Link: https://patch.msgid.link/20250918153057.56023-2-ziyao@disroot.org
2025-10-18Merge tag 'rust-rustfmt' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/ojeda/linux Pull rustfmt fixes from Miguel Ojeda: "Rust 'rustfmt' cleanup 'rustfmt', by default, formats imports in a way that is prone to conflicts while merging and rebasing, since in some cases it condenses several items into the same line. Document in our guidelines that we will handle this for the moment with the trailing empty comment workaround and make the tree 'rustfmt'-clean again" * tag 'rust-rustfmt' of git://git.kernel.org/pub/scm/linux/kernel/git/ojeda/linux: rust: bitmap: fix formatting rust: cpufreq: fix formatting rust: alloc: employ a trailing comment to keep vertical layout docs: rust: add section on imports formatting
2025-10-18dt-bindings: interrupt-controller: Add Tenstorrent Blackhole compatibleDrew Fustini
Document compatible for the PLIC in the Tenstorrent Blackhole SoC. Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Joel Stanley <jms@oss.tenstorrent.com> Signed-off-by: Drew Fustini <dfustini@oss.tenstorrent.com>
2025-10-18dt-bindings: timers: Add Tenstorrent Blackhole compatibleDrew Fustini
Document clint compatible for the Tenstorrent Blackhole SoC. Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Joel Stanley <jms@oss.tenstorrent.com> Signed-off-by: Drew Fustini <dfustini@oss.tenstorrent.com>
2025-10-18dt-bindings: riscv: cpus: Add SiFive X280 compatibleDrew Fustini
Document compatible for the SiFive X280 RISC-V core. Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Joel Stanley <jms@oss.tenstorrent.com> Signed-off-by: Drew Fustini <dfustini@oss.tenstorrent.com>
2025-10-18dt-bindings: riscv: Add Tenstorrent Blackhole compatibleDrew Fustini
Add compatibles for the Tenstorrent Blackhole SoC PCIe card. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Joel Stanley <jms@oss.tenstorrent.com> Signed-off-by: Drew Fustini <dfustini@oss.tenstorrent.com>