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2026-03-27dt-bindings: clock: tegra124-dfll: Convert to json-schemaThierry Reding
Convert the Tegra124 (and later) DFLL bindings from the free-form text format to json-schema. Co-developed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-03-27dt-bindings: phy: tegra-xusb: Document Type C supportThierry Reding
Each XUSB PHY can be hooked up to a Type C controller via a port property, so document this in the bindings accordingly. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-03-27Merge tag 'juno-updates-7.1' of ↵Krzysztof Kozlowski
https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/dt Armv8 Juno/FVP/Vexpress updates for v7.1 1. The primary addition is initial support for Zena CSS that includes: a new binding compatibility, a shared `zena-css.dtsi` description, and an FVP device tree. 2. Extension of Corstone-1000 FVP platform support with binding updates to add the new `arm,corstone1000-a320-fvp` platform, and the `arm,corstone1000-ethos-u85` NPU integration. Overall, this combines new platform enablement with some DTS layout cleanup for Arm reference FVP based systems. * tag 'juno-updates-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: arm/corstone1000: Add corstone-1000-a320 arm64: dts: arm/corstone1000: Move FVP peripherals to separate .dtsi arm64: dts: arm/corstone1000: Move cpu nodes dt-bindings: npu: arm,ethos: Add "arm,corstone1000-ethos-u85" dt-bindings: arm,corstone1000: Add "arm,corstone1000-a320-fvp" arm64: dts: zena: Move SRAM into SoC and memory node out of SoC arm64: dts: zena: Add support for Zena CSS dt-bindings: arm: Add Zena CSS compatibility Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-03-27Merge tag 'mtk-dts64-for-v7.1' of ↵Krzysztof Kozlowski
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt MediaTek ARM64 DeviceTree updates This adds fixes and improvements for already supported devices. In particular: - The gpio-ranges pin could was fixed in MT6795, MT7981B, and MT7986A SoCs, as the very last GPIO was unusable; Even though anyway unused, this fixes the hardware description. - Model string fixes for Bananapi BPI-R4 Pro 4E/8X: now the correct model is shown. - The MT6359 PMIC gets disambiguation for two default regulator names, mainly fixing issues seen on U-Boot, but also making the regulators visually distinguishable in a summary...! - Aliases for eMMC/SD controllers added in MT8365 EVK board, MT8395 Radxa NIO-12L and Genio 1200 for consistency - Fixes to the MediaTek AUDSYS devicetree binding ....and honorable mention goes to: - MT8195 Cherry Chromebooks get their WiFi on PCI Express and Bluetooth on USB described with the proper power supplies now tied to the correct devices (USB VBUS and PCIE3v3): this is now described almost perfectly, or at least links the right resources in the right places. This is also done as a preparation for when the M.2 E-Key connector binding will be upstreamed. - MT8195 Cherry Dojo gets its M.2 M-Key slot correctly described with the new pcie-m2-m-connector binding. * tag 'mtk-dts64-for-v7.1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: arm64: dts: mediatek: mt7986a: Fix gpio-ranges pin count arm64: dts: mediatek: mt7981b: Fix gpio-ranges pin count arm64: dts: mediatek: mt6795: Fix gpio-ranges pin count dt-bindings: arm: mediatek: audsys: fix formatting issues arm64: dts: mediatek: mt8195-cherry-dojo: Describe M.2 M-key NVMe slot arm64: dts: mediatek: mt8195-cherry: add WiFi PCIe and BT USB power supplies arm64: dts: mediatek: mt7988a-bpi-r4pro: fix model string arm64: dts: mt8167: Reorder nodes according to mmio address arm64: dts: mediatek: mt6359: give regulators unique names arm64: dts: mediatek: mt8365: Describe infracfg-nao as a pure syscon arm64: dts: mediatek: mt8365-evk: add mmc aliases arm64: dts: mediatek: mt8395-radxa-nio-12l: add mmc aliases arm64: dts: mediatek: mt8395-genio-common: add mmc aliases arm64: dts: mediatek: mt8195-cherry: Disable xhci1 completely Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-03-27dt-bindings: thermal: qcom-tsens: Add Eliza SoC TSENSKrzysztof Kozlowski
Document the compatible for Qualcomm Eliza SoC TSENS module, fully compatible with TSENS v2 generation (e.g. SM8650). Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260327100733.365573-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Daniel Lezcano <daniel.lezcano@kernel.org>
2026-03-27Merge branch 'icc-msm8974' into icc-nextGeorgi Djakov
Commit d6edc31f3a68 ("clk: qcom: smd-rpm: Separate out interconnect bus clocks") moved control over several RPM resources from the clk-smd-rpm driver to the icc-rpm.c interconnect helpers. Most of the platforms were fixed before that commit or shortly after. However the MSM8974 was left as a foster child in broken state. Fix the loose ends and reenable interconnects on that platform. * icc-msm8974 dt-bindings: interconnect: qcom,msm8974: drop bus clocks dt-bindings: interconnect: qcom,msm8974: use qcom,rpm-common interconnect: qcom: drop unused is_on flag interconnect: qcom: icc-rpm: allow overwriting get_bw callback interconnect: qcom: define OCMEM bus resource interconnect: qcom: let platforms declare their bugginess interconnect: qcom: msm8974: switch to the main icc-rpm driver interconnect: qcom: msm8974: expand DEFINE_QNODE macros Link: https://msgid.link/20260324-msm8974-icc-v2-0-527280043ad8@oss.qualcomm.com Tested-by: Alexandre Messier <alex@me.ssier.org> Tested-by: Luca Weiss <luca.weiss@fairphone.com> # fairphone-fp2 Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-27Merge tag 'mediatek-drm-next-20260325' of ↵Dave Airlie
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-next Mediatek DRM Next - 20260325 1. mtk_dsi: enable hs clock during pre-enable 2. Remove all conflicting aperture devices during probe 3. Add support for mt8167 display blocks Signed-off-by: Dave Airlie <airlied@redhat.com> From: Chun-Kuang Hu <chunkuang.hu@kernel.org> Link: https://patch.msgid.link/20260325160721.4891-1-chunkuang.hu@kernel.org
2026-03-27dt-bindings: arm: ti: Add verdin am62/am62p zinnia boardFrancesco Dolcini
Add Toradex Verdin Zinnia carrier board mated with Verdin AM62 and AM62P. Link: https://www.toradex.com/products/carrier-board/zinnia-carrier-board Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://patch.msgid.link/20260324093705.26730-2-francesco@dolcini.it Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2026-03-26dt-bindings: remove unimplemented AXI snps,kbbe snps,mb and snps,rbRussell King (Oracle)
Remove the AXI snps,kbbe snps,mb and snps,rb properties as they have not been used, and although the driver parses these, the code hasn't ever used the parsed result. This parsing has now been removed. These were introduced by commit afea03656add ("stmmac: rework DMA bus setting and introduce new platform AXI structure"). Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/E1w4ydt-0000000Dlph-3WvI@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-03-27Merge tag 'drm-misc-next-2026-03-26' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/misc/kernel into drm-next drm-misc-next for v7.1: UAPI Changes: amdxdna: - support per-BO memory-usage queries docs: - Improve UAPI documentation panthor: - extend timestamp query with flags Core Changes: edid: - provide enum drm_output_color_format; mass-convert drivers gem-dma: - use drm_dev_dma_dev() for DMA mappings - set VM_DONTDUMP on mmap mipi-dbi: - drop simple-display; mass-convert drivers prime: - use drm_dev_dma_dev() for DMA mappings ttm: - improve handling of gfp_retry_mayfail Driver Changes: amdgpu: - use atomic_create_state for private_obj amdxdna: - refactor GEM implementation - fixes bridge: - provide clear-and-put helper for reliable cleanup - analogix_dp: Use DP helpers for link training - lontium-lt8713sx: Fix 64-bit division and Kconfig - samsung-dsim: Use clear-and-put imagination: - improve power-off sequence - support context-reset notification from firmware komeda: - support Arm China Linlon D6 plus DT bindings mediatek: - use drm_dev_dma_dev() for DMA mappings panel: - support Himax HX83121A plus DT bindings - support JuTouch JT070TM041 plus DT bindings - support Samsung S6E8FC0 plus DT bindings - himax-hx83102c: support Samsung S6E8FC0 plus DT bindings; support backlight - ili9806e: support Rocktech RK050HR345-CT106A plus DT bindings - simple: support Tianma TM050RDH03 plus DT bindings panthor: - support various sources for timestamp queries - fixes omapdrm: - use atomic_create_state for private_obj rcar-du: - fix suspend/resume wrt VSP interface - fix leak of device_link - clean up sun4i: - use drm_dev_dma_dev() for DMA mappings tegra: - use atomic_create_state for private_obj xe: - send 'none' recovery method for XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET Signed-off-by: Dave Airlie <airlied@redhat.com> From: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patch.msgid.link/20260326151812.GA76082@linux.fritz.box
2026-03-26dt-bindings: net: nuvoton: Add schema for Nuvoton MA35 family GMACJoey Lu
Create initial schema for Nuvoton MA35 family Gigabit MAC. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Joey Lu <a0987203069@gmail.com> Link: https://patch.msgid.link/20260323101756.81849-2-a0987203069@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-03-26dt-bindings: i2c: spacemit: k3: Add compatibleYixun Lan
Add a compatible string for the I2C controller found in SpacemiT K3 SoC which use same I2C IP as K1, so make it fallback to K1 compatible. Signed-off-by: Yixun Lan <dlan@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com> Link: https://lore.kernel.org/r/20260325-02-k3-i2c-v1-1-78f29c83d9ac@kernel.org Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2026-03-26dt-bindings: iio: amplifiers: ad8366: add adrf5702/3 supportRodrigo Alencar
Add compatible entries for ADRF5702 and ADRF5703 Digital Attenuators. ADRF5702 is an 8-bit DSA with a step of 0.125 dB and ADRF5703 is a 7-bit DSA with a step 0.25 dB. Then, each device ends up with its own gain range, hence no fallback compatibles are used. Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Rodrigo Alencar <rodrigo.alencar@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2026-03-26dt-bindings: display/msm: qcm2290-mdss: Fix missing ranges in exampleKrzysztof Kozlowski
Device node has children with MMIO addressing, so must have ranges: msm/qcom,qcm2290-mdss.example.dtb: display-subsystem@5e00000 (qcom,qcm2290-mdss): 'ranges' is a required property Fixes: 966a08c293cb ("dt-bindings: display: msm: qcm2290-mdss: Fix iommus property") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260325122209.147128-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26dt-bindings: iio: adc: amlogic,meson-saradc: add S4 compatibleNick Xie
Add the compatible string for the SARADC (Successive Approximation Register ADC) IP block found in the Amlogic Meson S4 SoC. There are no known differences between the SARADC on S4 and the one on G12A. Therefore, it uses "amlogic,meson-g12a-saradc" as a proper specific fallback. Also add a comment indicating that "amlogic,meson-saradc" must not be used for new devices. It's a made up compatible string that does not correspond to a specific hardware generation and is not used to match any driver. For old devices we keep it as it's part of the ABI. Signed-off-by: Nick Xie <nick@khadas.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2026-03-26dt-bindings: spmi: qcom,x1e80100-spmi-pmic-arb: Document Eliza compatibleAbel Vesa
The SPMI multi-master Arbiter found on Eliza is version 7.2.0, yet driver-wise, still compatible with the one featured on Hamoa (X1E80100), which is 7.0.1. So document the Eliza compatible and allow Hamoa one as fallback. Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260313-eliza-bindings-spmi-v3-1-b8ff1e0a6171@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-03-26Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski
Cross-merge networking fixes after downstream PR (net-7.0-rc6). No conflicts, or adjacent changes. Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-03-26dt-bindings: pinctrl: renesas,r9a09g077: Document pin configuration propertiesLad Prabhakar
Document the pin configuration properties supported by the RZ/T2H pinctrl driver. The RZ/T2H SoC allows configuring several electrical characteristics through the DRCTLm (I/O Buffer Function Switching) registers. These registers control drive strength, bias configuration, Schmitt trigger input, and output slew rate. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Linus Walleij <linusw@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260319141515.2053556-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-03-26dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3L SoCBiju Das
Document the device tree bindings for the Renesas RZ/G3L SoC Clock Pulse Generator (CPG). RZ/G3L CPG is similar to RZ/G2L CPG but has 5 clocks compared to 1 clock on other SoCs. Also define RZ/G3L (R9A08G046) Clock Pulse Generator Core Clocks, as listed in section 4.4.4.1 ("Block Diagram of the Clock System"), module clock outputs, as listed in section 4.4.2 ("Clock List r1.00") and add Reset definitions referring to registers CPG_RST_* in Section 4.4.3 ("Register") of the RZ/G3L Hardware User's Manual (Rev.1.00 Oct, 2025). Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260324114329.268249-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-03-26dt-bindings: interconnect: qcom,msm8974: use qcom,rpm-commonDmitry Baryshkov
Use qcom,rpm-common schema to declare interconnects property instead describing it again. In future this will allow the platform to switch to the two-cell interconnects, adding the tag to the specification. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://msgid.link/20260324-msm8974-icc-v2-2-527280043ad8@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-26dt-bindings: interconnect: qcom,msm8974: drop bus clocksDmitry Baryshkov
Remove the wrong internal RPM bus clock representation that we've been carrying for years. They are an internal part of the interconnect fabric. They are not exported by any device and are not supposed to be used. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://msgid.link/20260324-msm8974-icc-v2-1-527280043ad8@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-26dt-bindings: arm: fsl: add Verdin iMX95Ernest Van Hoecke
Add DT compatible strings for the Verdin i.MX95 SoM and its supported carrier boards: the Verdin Development Board, and the Dahlia, Ivy, Mallow and Yavia carrier boards. Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx95 Link: https://www.toradex.com/products/carrier-board/verdin-development-board-kit Link: https://www.toradex.com/products/carrier-board/dahlia-carrier-board-kit Link: https://www.toradex.com/products/carrier-board/ivy-carrier-board Link: https://www.toradex.com/products/carrier-board/mallow-carrier-board Link: https://www.toradex.com/products/carrier-board/yavia Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-03-26dt-bindings: arm: fsl: add MBa93xxLA-MINIMartin Schmiedel
Adds support for the MBa93xxLA-MINI SBC. https://www.tq-group.com/en/products/tq-embedded/arm-architecture/mba93xxla-mini/ Signed-off-by: Martin Schmiedel <Martin.Schmiedel@tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-03-26dt-bindings: arm: add bindings for TQMa95xxLAMarkus Niebel
TQMa95xxLA is a SOM using NXP i.MX95 CPU. MBa95xxCA is a carrier reference design / starter kit board. [1] https://www.tq-group.com/en/products/tq-embedded/arm-architecture/tqma95xxla/ Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-03-26dt-bindings: arm: lpc: add missed lpc43xx boardFrank Li
Add missed legancy lpc43xx board compatible string to fix below CHECK_DTB warnings: arch/arm/boot/dts/nxp/lpc/lpc4337-ciaa.dtb: /: failed to match any schema with compatible: ['ciaa,lpc4337', 'nxp,lpc4337', 'nxp,lpc4350'] Reviewed-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-03-26dt-bindings: arm: fsl: Add NXP S32N79 SoC and RDB boardCiprian Marian Costea
Add device tree binding documentation for the NXP S32N79 automotive SoC and the S32N79 Reference Design Board (S32N79-RDB). The S32N79 is an automotive-grade SoC featuring eight ARM Cortex-A78AE cores organized for high-performance networking and gateway applications in vehicles. Co-developed-by: Larisa Grigore <larisa.grigore@nxp.com> Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-03-26dt-bindings: interrupt-controller: fsl,irqsteer: add S32N79 supportCiprian Marian Costea
Add compatible string for the interrupt steering controller used in NXP S32N79 SoC. The S32N79 SoC differs from the i.MX version by not implementing the CHANCTRL register, but otherwise maintains the same programming model and register layout. Co-developed-by: Larisa Grigore <larisa.grigore@nxp.com> Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-03-26dt-bindings: arm: fsl: Add compatible for i.MX8MP audio board (version 2)Shengjiu Wang
Introduce a new DT compatible string for the NXP i.MX8MP audio board (version 2). i.MX Audio Board is a configurable and functional audio processing platform. Integrating a variety of audio input and output interfaces into the system, the i.MX Audio Board supports HDMI input, HDMI eARC, S/PDIF I/O, 2-ch ADC line-in, 24-ch DAC line-out and more. Based on these features, rich audio application cases can be realized. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-03-26dt-bindings: arm: fsl: Add various solidrun i.MX8M boardsJosua Mayer
Add bindings for various SolidRun boards: - i.MX8MP HummingBoard IIoT - based on the SolidRun i.MX8M Plus SoM - SolidSense N8 - single-board design with i.MX8M Nano - i.MX8M Mini System on Module - i.MX8M Mini HummingBoard Ripple Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Josua Mayer <josua@solid-run.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-03-26dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/G3L SoCBiju Das
Document RZ/G3L (R9A08G046) IRQC. The IRQC block on the RZ/G3L SoC is nearly identical to that found on the RZ/G3S SoC, with the following differences: it supports more external interrupts and GPT error interrupts, and adds registers for GPT/MTU interrupt selection and shared interrupt selection between external interrupt and TINT. A new compatible string "renesas,r9a08g046-irqc" is therefore introduced for the RZ/G3L SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260325192451.172562-3-biju.das.jz@bp.renesas.com
2026-03-26dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Use pattern for ↵Biju Das
interrupt-names Simplify the bindings by using pattern property for interrupt-names. It also allows to change the ordering of interrupts. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260325192451.172562-2-biju.das.jz@bp.renesas.com
2026-03-26dt-bindings: firmware: qcom,scm: Document ipq9650 SCMKathiravan Thirumoorthy
Document the scm compatible for ipq9650 SoC. Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260325-ipq9650_scm-v1-1-ad6a3fe53f38@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26dt-bindings: interrupt-controller: Add LS7A PCH LPCIcenowy Zheng
Loongson 7A series PCH contains an LPC controller with an interrupt controller. Add the device tree binding for the interrupt controller. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Huacai Chen <chenhuacai@loongson.cn> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260321092032.3502701-4-zhengxingda@iscas.ac.cn
2026-03-26dt-bindings: qcom: add ipq5210 boardsKathiravan Thirumoorthy
Document the new ipq5210 SoC/board device tree bindings. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260325-ipq5210_boot_to_shell-v3-1-9c7360d19d10@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26Merge branch ↵Bjorn Andersson
'20260318-ipq5210_boot_to_shell-v2-1-a87e27c37070@oss.qualcomm.com' into HEAD Merge the IPQ5210 global clock controller DeviceTree binding, in order to gain access to the constants.
2026-03-26dt-bindings: arm: qcom: Add Redmi 4A and GoBarnabás Czémán
Add Redmi 4A (rolex) and Redmi Go (tiare). Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/r/20260315-riva-common-v3-4-897f130786ed@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26dt-bindings: arm: qcom: document the Ayaneo Pocket S2Neil Armstrong
Document the Qualcomm SM8650 based Ayaneo Pocket S2 gaming console. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20260319-topic-sm8650-ayaneo-pocket-s2-base-v6-3-797bf96df771@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26dt-binding: vendor-prefixes: document the Ayaneo brandNeil Armstrong
Document the Ayaneo from the Anyun Intelligent Technology (Hong Kong) Co., Ltd company. Website: https://www.ayaneo.com/product/ayaneobrand.html Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20260319-topic-sm8650-ayaneo-pocket-s2-base-v6-2-797bf96df771@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26dt-bindings: arm: qcom: add Arduino Monza, VENTUNO QLoic Poulain
Document Arduino monza, VENTUNO Q codename. It combines Monaco based SoM with STMicroelectronics STM32H5 microcontroller. Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Co-developed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260313103824.2634519-6-srinivas.kandagatla@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26dt-bindings: arm: qcom: add wiko,chuppito compatible stringPaul Adam
Add a compatible for Wiko PULP 4G, a phone from 2015. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Paul Adam <adamp@posteo.de> Link: https://lore.kernel.org/r/20260311-wiko-chuppito-v5-2-0a8656cca1b3@posteo.de Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26dt-bindings: vendor-prefixes: add WIKO SASPaul Adam
Wiko is a french smartphone company: https://wiko.com Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Paul Adam <adamp@posteo.de> Link: https://lore.kernel.org/r/20260311-wiko-chuppito-v5-1-0a8656cca1b3@posteo.de Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26dt-bindings: arm: qcom: Document Eliza SoC and its MTP boardAbel Vesa
Qualcomm Eliza SoC comes with different flavors. There is SM7750 for mobiles and then QC7790S/M for IoT. One of the boards that comes with Eliza SoC is the MTP. So document both the SoC and MTP board compatibles. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260318-eliza-base-dt-v3-1-8a50bd2201ed@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26Merge branch 'icc-eliza' of ↵Bjorn Andersson
https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into HEAD Merge the Eliza interconnect DeviceTree bindings from topic branch, in order to introduce the interconnect constants used in the Eliza DeviceTree source.
2026-03-26Merge branch '20260311-eliza-clocks-v6-1-453c4cf657a2@oss.qualcomm.com' into ↵Bjorn Andersson
HEAD Merge Eliza Global, RPMH, and TCSR clock controller bindings from topic branch, in order to gain access to the clock defines.
2026-03-26dt-bindings: arm: qcom: Document Mahua SoC and boardGopikrishna Garmidi
Mahua is a derivative of Glymur SoC with the third CPU cluster disabled. Document the compatible strings for the Mahua SoC and the Compute Reference Device (CRD) board based on it. Signed-off-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260318124100.212992-2-gopikrishna.garmidi@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26media: dt-bindings: add NXP i.MX93 compatible stringFrank Li
The i.MX93 uses the DW CSI-2 RX controller, which is similar to the Rockchip RK3568 implementation. The i.MX93 variant provides one IRQ, two clocks, and no resets. Add the "fsl,imx93-mipi-csi2" compatible string and keep the same constraints for RK3568. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Michael Riesch <michael.riesch@collabora.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-03-26dt-bindings: media: i2c: document Omnivision OV08D10 CMOS image sensorMatthias Fend
Add bindings for the Omnivision OV08D10 CMOS image sensor. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Matthias Fend <matthias.fend@emfend.at> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-03-26regulator: dt-bindings: mps,mp8859: convert to DT schemaBhargav Joshi
Convert the Monolithic Power Systems MP8859 voltage regulator binding from legacy text format to DT schema. This patch does not change any functionality, the bindings remain the same. Signed-off-by: Bhargav Joshi <rougueprince47@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260325230559.73527-1-rougueprince47@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-03-26dt-bindings: media: i2c: Add ov2732 image sensorWalter Werner Schneider
Add bindings for OmniVision OV2732 image sensor. Signed-off-by: Walter Werner Schneider <contact@schnwalter.eu> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-03-26ASoC: adau1372: Fix error handling in adau1372_set_power()Mark Brown
Jihed Chaibi <jihed.chaibi.dev@gmail.com> says: adau1372_set_power() had two related error handling issues in its enable path: clk_prepare_enable() was called but its return value discarded, and adau1372_enable_pll() was a void function that silently swallowed lock failures, leaving mclk enabled and adau1372->enabled set to true despite the device being in a broken state. Patch 1 fixes the unchecked clk_prepare_enable() by making adau1372_set_power() return int and propagating the error. Patch 2 converts adau1372_enable_pll() to return int and adds a full unwind in adau1372_set_power() if PLL lock fails, reversing the regcache, GPIO power-down, and clock state.
generated by cgit v1.2.3 (git 2.25.1) at 2026-06-08 17:45:36 +0000