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Add missing supply properties for PCA945x input pin groups:
- inl1-supply (for LDOs)
- inb13-supply (for BUCK1/3)
- inb26-supply (for BUCK2/6)
- inb45-supply (for BUCK4/5)
These properties describe external power sources for each input group.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Link: https://patch.msgid.link/20251027124415.989301-2-o.rempel@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
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The i2c controller in the RK3506 is compatible to the variant first found
in the RK3399 SoC, so add the RK3506 to that variant list.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20251021222853.193224-1-heiko@sntech.de
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
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There are three iommu in total, namely MM_IOMMU, APU_IOMMU, INFRA_IOMMU,
Add bindings for them.
Signed-off-by: Zhengnan Chen <zhengnan.chen@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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The CS530x device family supports multiple control interfaces.
At present, only the I2C interface is implemented. Adding support
for the SPI control interface, operating at up to 24 MHz.
Signed-off-by: Vitaly Rodionov <vitalyr@opensource.cirrus.com>
Link: https://patch.msgid.link/20251023090327.58275-12-vitalyr@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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This patch adds additional cs530x family variants.
cirrus,cs4282 - high-performance, 32-bit resolution, stereo CODEC
cirrus,cs4302 - high performance stereo DAC, 2 channels
cirrus,cs4304 - high performance stereo DAC, 4 channels
cirrus,cs4308 - high performance stereo DAC, 8 channels
Signed-off-by: Vitaly Rodionov <vitalyr@opensource.cirrus.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20251023090327.58275-6-vitalyr@opensource.cirrus.com
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Add soundcard compatible for QRB2210 (QCM2290) SoCs, where the older
non-audioreach audio architecture is implemented.
Cc: Srinivas Kandagatla <srini@kernel.org>
Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
Link: https://patch.msgid.link/20251022-qrb2210-qcm2290-sndcard-v2-1-32e9e269a825@linaro.org
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into gpio/for-next
Linux 6.18-rc3
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We need the USB fixes in here as well to build on top of.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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We need the tty/serial fixes in here as well to build on top of.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Extend the list of accepted child nodes with the QIXIS FPGA based GPIO
controller and explicitly list its compatible string
fsl,ls1046aqds-fpga-gpio-stat-pres2 as the only one accepted.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Extend the list of supported compatible strings with fsl,lx2160ardb-fpga.
Since the register map exposed by the LX2160ARDB's FPGA also contains
two GPIO controllers, accept the necessary GPIO pattern property.
At the same time, add the #address-cells and #size-cells properties as
valid ones so that the child nodes of the fsl,lx2160ardb-fpga node are
addressable.
This is necessary because when defining child devices such as the GPIO
controller described in the added example, the child device needs a the
reg property to properly identify its register location in the parent
I2C device address space.
Impose this restriction for the new compatible through an if-statement.
The feature set exposed by these QIXIS FPGA devices is highly dependent
on the board type, meaning that even though the FPGA found on the
LX2160AQDS board (fsl,lx2160aqds-fpga) works in the same way in terms of
access over I2C as the one found on the LX2160ARDB (fsl,lx2160ardb-fpga
added here), the register map inside the device space is different since
there are different on-board devices to be controlled.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add DT compatible string for Protonic PRT8ML board.
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Jonas Rebmann <jre@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Document support for i.MX 95 Verdin Evaluation Kit (EVK), which
used to be the Titan EVK.
Note that the SoM used in this EVK is a derivative SoM from Verdin
line of SoMs, an actual i.MX95 Verdin SoM is under development.
[1] https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx95-evaluation-kit
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Pull tty/serial driver fixes from Greg KH:
"Here are some small tty and serial driver fixes for reported issues.
Included in here are:
- sh-sci serial driver fixes
- 8250_dw and _mtk driver fixes
- sc16is7xx driver bugfix
- new 8250_exar device ids added
All of these have been in linux-next this past week with no reported
issues"
* tag 'tty-6.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty:
serial: 8250_mtk: Enable baud clock and manage in runtime PM
serial: 8250_dw: handle reset control deassert error
dt-bindings: serial: sh-sci: Fix r8a78000 interrupts
serial: sc16is7xx: remove useless enable of enhanced features
serial: 8250_exar: add support for Advantech 2 port card with Device ID 0x0018
tty: serial: sh-sci: fix RSCI FIFO overrun handling
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git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB driver fixes from Greg KH:
"Here are some small USB driver fixes and new device ids for 6.18-rc3.
Included in here are:
- new option serial driver device ids added
- dt bindings fixes for numerous platforms
- xhci bugfixes for many reported regressions
- usbio dependency bugfix
- dwc3 driver fix
- raw-gadget bugfix
All of these have been in linux-next this week with no reported issues"
* tag 'usb-6.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb:
USB: serial: option: add Telit FN920C04 ECM compositions
USB: serial: option: add Quectel RG255C
tcpm: switch check for role_sw device with fw_node
usb/core/quirks: Add Huawei ME906S to wakeup quirk
usb: raw-gadget: do not limit transfer length
USB: serial: option: add UNISOC UIS7720
xhci: dbc: enable back DbC in resume if it was enabled before suspend
xhci: dbc: fix bogus 1024 byte prefix if ttyDBC read races with stall event
usb: xhci-pci: Fix USB2-only root hub registration
dt-bindings: usb: qcom,snps-dwc3: Fix bindings for X1E80100
usb: misc: Add x86 dependency for Intel USBIO driver
dt-bindings: usb: switch: split out ports definition
usb: dwc3: Don't call clk_bulk_disable_unprepare() twice
dt-bindings: usb: dwc3-imx8mp: dma-range is required only for imx8mp
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My linaro email id is no longer active. So switch to kernel.org one.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https://patch.msgid.link/20251010-pci-binding-v1-1-947c004b5699@oss.qualcomm.com
Acked-by: Rob Herring (Arm) <robh@kernel.org>
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The amlogic,axg-pcie binding was never enabled as the 'select' schema
expects a single compatible value, but the binding has a fallback
compatible. Fix the 'select' by adding a 'contains'. With this, several
errors in the clock and reset properties are exposed. Some of the names
aren't defined in the common DWC schema and the order of clocks entries
doesn't match .dts files.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20251024011122.26001-1-robh@kernel.org
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Rockchip RK3506 has two Ethernet controllers based on Synopsys DWC
Ethernet QoS IP.
Add compatible string for the RK3506 variant.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251023111213.298860-4-heiko@sntech.de
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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A number of dwmac variants from Rockchip SoCs have turned up in the
Rockchip-specific binding, but not in the main list in snps,dwmac.yaml
which as the comment indicates is needed for accurate matching.
So add the missing rk3528, rk3568 and rv1126 to the main list.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251023111213.298860-3-heiko@sntech.de
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Move the rk3399 compatible to its alphabetically correct position.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251023111213.298860-2-heiko@sntech.de
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Add a binding schema for Arm Ethos-U65/U85 NPU. The Arm Ethos-U NPUs are
designed for edge AI inference applications.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Acked-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Link: https://patch.msgid.link/20251020-ethos-v6-1-ecebc383c4b7@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
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Add compatible strings for the PLIC found in UltraRISC DP1000 SoC.
The PLIC is part of the UR-CP100 core and has a hardware bug requiring
a workaround.
Signed-off-by: Charles Mirabile <cmirabil@redhat.com>
Signed-off-by: Lucas Zampieri <lzampier@redhat.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20251024083647.475239-3-lzampier@redhat.com
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Add vendor prefix for UltraRISC Technology Co., Ltd.
Signed-off-by: Lucas Zampieri <lzampier@redhat.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20251024083647.475239-2-lzampier@redhat.com
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git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi fixes from Mark Brown:
"A moderately large collection of device specific changes here, mostly
fixes but also including a few new quirks and device IDs. This is all
fairly routine even for the affected devices"
* tag 'spi-fix-v6.18-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
spi: dt-bindings: spi-rockchip: Add RK3506 compatible
spi: intel-pci: Add support for Intel Wildcat Lake SPI serial flash
spi: intel-pci: Add support for Arrow Lake-H SPI serial flash
spi: intel: Add support for 128M component density
spi: airoha: fix reading/writing of flashes with more than one plane per lun
spi: airoha: switch back to non-dma mode in the case of error
spi: airoha: add support of dual/quad wires spi modes to exec_op() handler
spi: airoha: return an error for continuous mode dirmap creation cases
spi: amlogic: fix spifc build error
spi: cadence-quadspi: Fix pm_runtime unbalance on dma EPROBE_DEFER
spi: spi-nxp-fspi: limit the clock rate for different sample clock source selection
spi: spi-nxp-fspi: add extra delay after dll locked
spi: spi-nxp-fspi: re-config the clock rate when operation require new clock rate
spi: dw-mmio: add error handling for reset_control_deassert()
spi: rockchip-sfc: Fix DMA-API usage
spi: dt-bindings: cadence: add soc-specific compatible strings for zynqmp and versal-net
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On the MT8196 and MT6991 SoCs, the GPU power and frequency is controlled
by some integration logic, referred to as "MFlexGraphics" by MediaTek,
which comes in the form of an embedded controller running
special-purpose firmware.
This controller takes care of the regulators and PLL clock frequencies
to squeeze the maximum amount of power out of the silicon.
Add a binding which models it as a power domain.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Backmerging to get fixes and features of v6.18-rc2.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
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Add qcom,sm8750-dwc3 compatible to flattened implementation binding.
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20251021050954.3462613-1-krishna.kurapati@oss.qualcomm.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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https://gitlab.freedesktop.org/drm/misc/kernel into drm-next
drm-misc-next for v6.19:
UAPI Changes:
amdxdna:
- Support reading last hardware error
Cross-subsystem Changes:
dma-buf:
- heaps: Create heap per CMA reserved location; Improve user-space documentation
Core Changes:
atomic:
- Clean up and improve state-handling interfaces, update drivers
bridge:
- Improve ref counting
buddy:
- Optimize block management
Driver Changes:
amdxdna:
- Fix runtime power management
- Support firmware debug output
ast:
- Set quirks for each chip model
atmel-hlcdc:
- Set LCDC_ATTRE register in plane disable
- Set correct values for plane scaler
bochs:
- Use vblank timer
bridge:
- synopsis: Support CEC; Init timer with correct frequency
cirrus-qemu:
- Use vblank timer
imx:
- Clean up
ivu:
- Update JSM API to 3.33.0
- Reset engine on more job errors
- Return correct error codes for jobs
komeda:
- Use drm_ logging functions
panel:
- edp: Support AUO B116XAN02.0
panfrost:
- Embed struct drm_driver in Panfrost device
- Improve error handling
- Clean up job handling
panthor:
- Support custom ASN_HASH for mt8196
renesas:
- rz-du: Fix dependencies
rockchip:
- dsi: Add support for RK3368
- Fix LUT size for RK3386
sitronix:
- Fix output position when clearing screens
qaic:
- Support dma-buf exports
- Support new firmware's READ_DATA implementation
- Replace kcalloc with memdup
- Replace snprintf() with sysfs_emit()
- Avoid overflows in arithmetics
- Clean up
- Fixes
qxl:
- Use vblank timer
rockchip:
- Clean up mode-setting code
vgem:
- Fix fence timer deadlock
virtgpu:
- Use vblank timer
Signed-off-by: Simona Vetter <simona.vetter@ffwll.ch>
From: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://lore.kernel.org/r/20251021111837.GA40643@linux.fritz.box
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On Polarfire SoC, iomux0 is responsible for routing functions to either
Multiprocessor Subsystem (MSS) IOs or to the FPGA fabric, where they
can either interface with custom RTL or be routed to the FPGA fabric's
IOs. Document it.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The pic64gx has a second pinmux "downstream" of the iomux0 pinmux. The
documentation for the SoC provides no name for this device, but it is
used to swap pins between either GPIO controller #2 or select other
functions, hence the "gpio2" name. Currently there is no documentation
about what each bit actually does that is publicly available, nor (I
believe) what pins are affected. That info is as follows:
pin role (1/0)
--- ----------
E14 MAC_0_MDC/GPIO_2_0
E15 MAC_0_MDIO/GPIO_2_1
F16 MAC_1_MDC/GPIO_2_2
F17 MAC_1_MDIO/GPIO_2_3
D19 SPI_0_CLK/GPIO_2_4
B18 SPI_0_SS0/GPIO_2_5
B10 CAN_0_RXBUS/GPIO_2_6
C14 PCIE_PERST_2#/GPIO_2_7
E18 PCIE_WAKE#/GPIO_2_8
D18 PCIE_PERST_1#/GPIO_2_9
E19 SPI_0_DO/GPIO_2_10
C7 SPI_0_DI/GPIO_2_11
D6 QSPI_SS0/GPIO_2_12
D7 QSPI_CLK (B)/GPIO_2_13
C9 QSPI_DATA0/GPIO_2_14
C10 QSPI_DATA1/GPIO_2_15
A5 QSPI_DATA2/GPIO_2_16
A6 QSPI_DATA3/GPIO_2_17
D8 MMUART_3_RXD/GPIO_2_18
D9 MMUART_3_TXD/GPIO_2_19
B8 MMUART_4_RXD/GPIO_2_20
A8 MMUART_4_TXD/GPIO_2_21
C12 CAN_1_TXBUS/GPIO_2_22
B12 CAN_1_RXBUS/GPIO_2_23
A11 CAN_0_TX_EBL_N/GPIO_2_24
A10 CAN_1_TX_EBL_N/GPIO_2_25
D11 MMUART_2_RXD/GPIO_2_26
C11 MMUART_2_TXD/GPIO_2_27
B9 CAN_0_TXBUS/GPIO_2_28
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into devel
mpfs pinctrl binding base
The pinctrl binding patch for iomux0 mpfs adds a ref to itself to the
syscon/mfd mss-top-sysreg binding, and therefore needs that file to
exist.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Cross-merge networking fixes after downstream PR (net-6.18-rc3).
No conflicts or adjacent changes.
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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The "groups" property can hold multiple entries (e.g.
toshiba/tmpv7708-rm-mbrc.dts file), so allow that by dropping incorrect
type (pinmux-node.yaml schema already defines that as string-array) and
adding constraints for items. This fixes dtbs_check warnings like:
toshiba/tmpv7708-rm-mbrc.dtb: pinctrl@24190000 (toshiba,tmpv7708-pinctrl):
pwm-pins:groups: ['pwm0_gpio16_grp', 'pwm1_gpio17_grp', 'pwm2_gpio18_grp', 'pwm3_gpio19_grp'] is too long
Fixes: 1825c1fe0057 ("pinctrl: Add DT bindings for Toshiba Visconti TMPV7700 SoC")
Cc: stable@vger.kernel.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Referenced pinmux-node.yaml schema already defines type for "functions"
so $ref is redundant.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Node names are already and properly checked by the core schema. No need
to do it again.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20251020060951.30776-10-wsa+renesas@sang-engineering.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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Add support for PMR735D PMIC used on Kaanapali boards.
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20251023-pmr735d_regulator-v2-1-452e1b28cd38@oss.qualcomm.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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The AMD Seattle DWC AHCI is behind an IOMMU and has 1-3 entries, so add
the 'iommus' property. There's not a specific compatible, so we can't
limit it to Seattle.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Niklas Cassel <cassel@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
Pull SCSI fixes from James Bottomley:
"All driver fixes. The big change is the storvsc one to rejig the
hyper-v channel handling to be more efficient for SMP virtual
machines"
* tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi:
scsi: ufs: phy: dt-bindings: Add QMP UFS PHY compatible for Kaanapali
scsi: ufs: qcom: dt-bindings: Document the Kaanapali UFS controller
scsi: libfc: Prevent integer overflow in fc_fcp_recv_data()
scsi: qla4xxx: Fix typos in comments
scsi: storvsc: Prefer returning channel with the same CPU as on the I/O issuing CPU
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Document the Last Level Cache Controller on Kaanapali platform.
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250924-knp-llcc-v1-1-ae6a016e5138@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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into clk-for-6.19
Merge binding changes for IPQ5424 network subsystem clock controllers
through topic branch, to make them available for DeviceTree branch as
well.
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NSS clock controller provides the clocks and resets to the networking
blocks such as PPE (Packet Process Engine) and UNIPHY (PCS) on IPQ5424
devices.
Add support for the compatible string "qcom,ipq5424-nsscc" based on the
existing IPQ9574 NSS clock controller Device Tree binding. Additionally,
update the clock names for PPE and NSS for newer SoC additions like
IPQ5424 to use generic and reusable identifiers "nss" and "ppe" without
the clock rate suffix.
Also add master/slave ids for IPQ5424 networking interfaces, which is
used by nss-ipq5424 driver for providing interconnect services using
icc-clk framework.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
Link: https://lore.kernel.org/r/20251014-qcom_ipq5424_nsscc-v7-7-081f4956be02@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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The Networking Subsystem (NSS) clock controller acts as both a clock
provider and an interconnect provider. The #interconnect-cells property
is needed in the Device Tree Source (DTS) to ensure that client drivers
such as the PPE driver can correctly acquire ICC clocks from the NSS ICC
provider.
Add the #interconnect-cells property to the IPQ9574 Device Tree binding
example to complete it.
Fixes: 28300ecedce4 ("dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions")
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
Link: https://lore.kernel.org/r/20251014-qcom_ipq5424_nsscc-v7-2-081f4956be02@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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trivial-touch.yaml
Move azoteq,iqs5xx.yaml, himax,hx83112b.yaml, hynitron,cstxxx.yaml,
ilitek_ts_i2c.yaml, semtech,sx8654.yaml, ar1021.txt to trivial-touch.yaml
to consolidate simple touch yaml binding to one file.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20251021201924.2881098-2-Frank.Li@nxp.com
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
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Add optional reset-gpios and wakeup-source properties.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20251021201924.2881098-1-Frank.Li@nxp.com
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
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The SPI controller found in the RK3506 SoC is still compatible to the
original one introduced with the RK3066, so add the RK3506 compatible
to the list of its variants.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251022004200.204276-1-heiko@sntech.de
Signed-off-by: Mark Brown <broonie@kernel.org>
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Convert the bitmain,bm1880-pinctrl binding to DT schema format. It's a
straight-forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Convert the brcm,ns2-pinmux binding to DT schema format. It's a
straight-forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Convert the actions,s900-pinctrl binding to DT schema format. It's a
straight-forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Convert the actions,s700-pinctrl binding to DT schema format. It's a
straight-forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Add power domain IDs for RV1126B SoC.
Add a new compatible because register fields have changed.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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