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2025-02-03dt-bindings: interrupt-controller: Add risc-v,aplic hart indexesVladimir Kondratiev
Document optional property "riscv,hart-indexes" The RISC-V APLIC specification defines "hart index" in: https://github.com/riscv/riscv-aia Within a given interrupt domain, each of the domain’s harts has a unique index number in the range 0 to 2^14 − 1 (= 16,383). The index number a domain associates with a hart may or may not have any relationship to the unique hart identifier (“hart ID”) that the RISC-V Privileged Architecture assigns to the hart. Two different interrupt domains may employ entirely different index numbers for the same set of harts. Further, this document says in "4.5 Memory-mapped control region for an interrupt domain": The array of IDC structures may include some for potential hart index numbers that are not actual hart index numbers in the domain. For example, the first IDC structure is always for hart index 0, but 0 is not necessarily a valid index number for any hart in the domain. Support arbitrary hart indexes specified in a optional APLIC property "riscv,hart-indexes" which is specificed as an array of u32 elements, one per interrupt target. If this property is not specified, fallback to use the logical hart indices within the domain. Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/all/20250129091637.1667279-2-vladimir.kondratiev@mobileye.com
2025-01-24Merge tag 'devicetree-for-6.14' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DT Bindings: - Add Bindings for QCom QCS615 UFS, QCom IPQ5424 DWC3 USB, NXP imx7d MIPI DSI, QCom SM8750 PDC, QCom MSM8976 SRAM, QCom ipq6018 temp sensor, QCom QCS8300 Power Domain Controller, QCom QCS615 Power Domain Controller, QCom QCS615 APSS, QCom QCS615 qfprom, QCom QCS8300 remoteproc, Mediatek MT6328 PMIC, Allwinner A100 OPP, and NXP iMX35 GPT - Convert Altera socfpga-system, raspberrypi,bcm2835-power to DT schema - Add Siflower vendor prefix - Cleanup display, interrupt-controller, and UFS binding examples' indentation - Document preferred line wrapping (the same as the rest of the kernel) DT Core: - Add warning when of_property_read_bool() is used on non-boolean properties - Restore keeping bootloader DTB when booting with ACPI. Turns out some x86 platforms relied on that. Shrug. - Fix of_find_node_opts_by_path() handling of alias+path+options - Fix resource bounds checking for empty resources - A bunch of small fixes/cleanups all over from Zijun Hu - Cleanups in bin_attribute handling" * tag 'devicetree-for-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (50 commits) of: address: Fix empty resource handling in __of_address_resource_bounds() of/fdt: Restore possibility to use both ACPI and FDT from bootloader docs: dt-bindings: Document preferred line wrapping dt-bindings: ufs: Correct indentation and style in DTS example of: Correct element count for two arrays in API of_parse_phandle_with_args_map() of: reserved-memory: Warn for missing static reserved memory regions of: Do not expose of_alias_scan() and correct its comments dt-bindings: ufs: qcom: Add UFS Host Controller for QCS615 dt-bindings: usb: qcom,dwc3: Add IPQ5424 to USB DWC3 bindings dt-bindings: arm: coresight: Update the pattern of ete node name of: Warn when of_property_read_bool() is used on non-boolean properties device property: Split property reading bool and presence test ops of/fdt: Check fdt_get_mem_rsv() error in early_init_fdt_scan_reserved_mem() of: reserved-memory: Move an assignment to effective place in __reserved_mem_alloc_size() of: reserved-memory: Do not make kmemleak ignore freed address of: reserved-memory: Fix using wrong number of cells to get property 'alignment' of: Remove a duplicated code block of: property: Avoiding using uninitialized variable @imaplen in parse_interrupt_map() of: Correct child specifier used as input of the 2nd nexus node dt-bindings: interrupt-controller: ti,omap4-wugen-mpu: Add file extension ...
2025-01-23dt-bindings: interrupt-controller: microchip,lan966x-oic: Clarify endpoint useGeert Uytterhoeven
Reword the description, to make it clear that the LAN966x Outbound Interrupt Controller is used only in PCI endpoint mode. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Herve Codina <herve.codina@bootlin.com> Link: https://lore.kernel.org/all/247b1185c93610100f3f8c9e0ab2c1506e53e1f4.1737383314.git.geert+renesas@glider.be
2025-01-17dt-bindings: interrupt-controller: Add SpacemiT K1 PLICYangyu Chen
Add compatible string for SpacemiT K1 PLIC. Signed-off-by: Yangyu Chen <cyy@cyyself.name> Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-01-10dt-bindings: interrupt-controller: ti,omap4-wugen-mpu: Add file extensionKrzysztof Kozlowski
Add TXT file extension so the format of binding will be explicit (we have also bindins in YAML). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250107131111.246969-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-01-10dt-bindings: interrupt-controller: Correct indentation and style in DTS exampleKrzysztof Kozlowski
DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. No functional changes here, but saves some comments during reviews of new patches built on existing code. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Andrew Jeffery <andrew@codeconstruct.com.au> # aspeed,ast2400-vic.yaml Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://lore.kernel.org/r/20250107131108.246898-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-01-07dt-bindings: interrupt-controller: qcom,pdc: Document SM8750 PDCMelody Olvera
Document the PDC block on the SM8750 SoC. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> Link: https://lore.kernel.org/r/20241204-sm8750_master_pdc-v1-1-3a06cb62a28f@quicinc.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-01-07dt-bindings: qcom,pdc: document QCS8300 Power Domain ControllerJingyi Wang
Document Power Domain Controller for Qualcomm QCS8300. PDC is included in QCS8300 SoC. This controller acts as an interrupt controller, enabling the detection of interrupts when the GIC is non-operational. Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20240911-qcs8300_binding-v2-1-de8641b3eaa1@quicinc.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-01-07dt-bindings: qcom,pdc: document QCS615 Power Domain ControllerLijuan Gao
Add a compatible for the Power Domain Controller on QCS615 platform. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> Link: https://lore.kernel.org/r/20241104-add_initial_support_for_qcs615-v5-2-9dde8d7b80b0@quicinc.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-12-18dt-bindings: interrupt-controller: arm,gic: Correct VGIC interrupt descriptionKrzysztof Kozlowski
The description of VGIC interrupt referenced obsolete "see below" after converting TXT to DT Schema in commit 66ed144f147a ("dt-bindings: interrupt-controller: Convert ARM GIC to json-schema"), because there is no dedicated "VGIC" chapter anymore below. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Marc Zyngier <maz@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241217061226.14139-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-12-17dt-bindings: interrupt-controller: update imsic reg address to 0x24000000 in ↵Huang Borong
Example 1 Change the 'reg' property address from 0x28000000 to 0x24000000 to match the node label interrupt-controller@24000000. Signed-off-by: Huang Borong <huangborong@bosc.ac.cn> Link: https://lore.kernel.org/r/20241213090924.181249-1-huangborong@bosc.ac.cn Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-11-20Merge tag 'devicetree-for-6.13' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "Bindings: - Enable dtc "interrupt_provider" warnings for binding examples. Fix the warnings in fsl,mu-msi and ti,sci-inta due to this. - Convert zii,rave-sp-wdt, zii,rave-sp-pwrbutton, and altr,fpga-passive-serial to DT schema format - Add some documentation on the different forms of YAML text blocks which are a constant source of review comments - Fix some schema errors in constraints for arrays - Add compatibles for qcom,sar2130p-pdc and onnn,adt7462 DT core: - Allow overlay kunit tests to run CONFIG_OF_OVERLAY=n - Add some warnings on deprecated address handling - Rework early_init_dt_scan() so the arch can pass in the phys address of the DTB as __pa() is not always valid to use. This fixes a warning for arm64 with kexec. - Add and use some new DT graph iterators for iterating over ports and endpoints - Rework reserved-memory handling to be sized dynamically for fixed regions - Optimize of_modalias() to avoid a strlen() call - Constify struct device_node and property pointers where ever possible" * tag 'devicetree-for-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (36 commits) of: Allow overlay kunit tests to run CONFIG_OF_OVERLAY=n dt-bindings: interrupt-controller: qcom,pdc: Add SAR2130P compatible of/address: Rework bus matching to avoid warnings of: WARN on deprecated #address-cells/#size-cells handling of/fdt: Don't use default address cell sizes for address translation dt-bindings: Enable dtc "interrupt_provider" warnings of/fdt: add dt_phys arg to early_init_dt_scan and early_init_dt_verify dt-bindings: cache: qcom,llcc: Fix X1E80100 reg entries dt-bindings: watchdog: convert zii,rave-sp-wdt.txt to yaml format dt-bindings: input: convert zii,rave-sp-pwrbutton.txt to yaml media: xilinx-tpg: use new of_graph functions fbdev: omapfb: use new of_graph functions gpu: drm: omapdrm: use new of_graph functions ASoC: audio-graph-card2: use new of_graph functions ASoC: audio-graph-card: use new of_graph functions ASoC: test-component: use new of_graph functions of: property: use new of_graph functions of: property: add of_graph_get_next_port_endpoint() of: property: add of_graph_get_next_port() of: module: remove strlen() call in of_modalias() ...
2024-11-19Merge tag 'irq-core-2024-11-18' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull interrupt subsystem updates from Thomas Gleixner: "Tree wide: - Make nr_irqs static to the core code and provide accessor functions to remove existing and prevent future aliasing problems with local variables or function arguments of the same name. Core code: - Prevent freeing an interrupt in the devres code which is not managed by devres in the first place. - Use seq_put_decimal_ull_width() for decimal values output in /proc/interrupts which increases performance significantly as it avoids parsing the format strings over and over. - Optimize raising the timer and hrtimer soft interrupts by using the 'set bit only' variants instead of the combined version which checks whether ksoftirqd should be woken up. The latter is a pointless exercise as both soft interrupts are raised in the context of the timer interrupt and therefore never wake up ksoftirqd. - Delegate timer/hrtimer soft interrupt processing to a dedicated thread on RT. Timer and hrtimer soft interrupts are always processed in ksoftirqd on RT enabled kernels. This can lead to high latencies when other soft interrupts are delegated to ksoftirqd as well. The separate thread allows to run them seperately under a RT scheduling policy to reduce the latency overhead. Drivers: - New drivers or extensions of existing drivers to support Renesas RZ/V2H(P), Aspeed AST27XX, T-HEAD C900 and ATMEL sam9x7 interrupt chips - Support for multi-cluster GICs on MIPS. MIPS CPUs can come with multiple CPU clusters, where each CPU cluster has its own GIC (Generic Interrupt Controller). This requires to access the GIC of a remote cluster through a redirect register block. This is encapsulated into a set of helper functions to keep the complexity out of the actual code paths which handle the GIC details. - Support for encrypted guests in the ARM GICV3 ITS driver The ITS page needs to be shared with the hypervisor and therefore must be decrypted. - Small cleanups and fixes all over the place" * tag 'irq-core-2024-11-18' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (50 commits) irqchip/riscv-aplic: Prevent crash when MSI domain is missing genirq/proc: Use seq_put_decimal_ull_width() for decimal values softirq: Use a dedicated thread for timer wakeups on PREEMPT_RT. timers: Use __raise_softirq_irqoff() to raise the softirq. hrtimer: Use __raise_softirq_irqoff() to raise the softirq riscv: defconfig: Enable T-HEAD C900 ACLINT SSWI drivers irqchip: Add T-HEAD C900 ACLINT SSWI driver dt-bindings: interrupt-controller: Add T-HEAD C900 ACLINT SSWI device irqchip/stm32mp-exti: Use of_property_present() for non-boolean properties irqchip/mips-gic: Fix selection of GENERIC_IRQ_EFFECTIVE_AFF_MASK irqchip/mips-gic: Prevent indirect access to clusters without CPU cores irqchip/mips-gic: Multi-cluster support irqchip/mips-gic: Setup defaults in each cluster irqchip/mips-gic: Support multi-cluster in for_each_online_cpu_gic() irqchip/mips-gic: Replace open coded online CPU iterations genirq/irqdesc: Use str_enabled_disabled() helper in wakeup_show() genirq/devres: Don't free interrupt which is not managed by devres irqchip/gic-v3-its: Fix over allocation in itt_alloc_pool() irqchip/aspeed-intc: Add AST27XX INTC support dt-bindings: interrupt-controller: Add support for ASPEED AST27XX INTC ...
2024-11-15Merge branch 'dt/linus' into dt/nextRob Herring (Arm)
Pull-in kunit kconfig fix
2024-11-08dt-bindings: interrupt-controller: qcom,pdc: Add SAR2130P compatibleDmitry Baryshkov
Document compatible for PDC interrupt controller on SAR2130P platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241017-sar2130p-pdc-v1-1-cf9ccd9c37da@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-11-07dt-bindings: interrupt-controller: Add T-HEAD C900 ACLINT SSWI deviceInochi Amaoto
Sophgo SG2044 has a new version of T-HEAD C920, which implement a fully featured T-HEAD ACLINT device. This ACLINT device contains a SSWI device to support fast S-mode IPI. Add necessary compatible string for the T-HEAD ACLINT SSWI device. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/all/20241031060859.722258-2-inochiama@gmail.com Link: https://www.xrvm.com/product/xuantie/C920
2024-10-17dt-bindings: interrupt-controller: Add support for ASPEED AST27XX INTCKevin Chen
The ASPEED AST27XX interrupt controller(INTC) contains second level and third level interrupt controller. INTC0: The second level INTC, which used to assert GIC if interrupt in INTC1 asserted. INTC1_x: The third level INTC, which used to assert INTC0 if interrupt in modules of INTC asserted. The relationship is like the following: +-----+ +-------+ +---------+---module0 | GIC |---| INTC0 |--+--| INTC1_0 |---module1 | | | | | | |---... +-----+ +-------+ | +---------+---module31 | | +---------+---module0 +---| INTC1_1 |---module1 | | |---... | +---------+---module31 ... | +---------+---module0 +---| INTC1_5 |---module1 | |---... +---------+---module31 Signed-off-by: Kevin Chen <kevin_chen@aspeedtech.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/all/20241016022410.1154574-2-kevin_chen@aspeedtech.com
2024-10-16dt-bindings: interrupt-controller: Add Renesas RZ/V2H(P) Interrupt ControllerFabrizio Castro
Add DT bindings for the Renesas RZ/V2H(P) Interrupt Controller. Also add macros for the NMI and IRQ0-15 interrupts which map the SPI0-16 interrupts on the RZ/V2H(P) SoC so that they can be used in the first cell of the interrupt specifiers. For the second cell of the interrupt specifier, since NMI, IRQn and TINTn support different types of interrupts between themselves, add helper macros to make it easier for the user to work out what's available. Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/all/20241009230817.798582-2-fabrizio.castro.jz@renesas.com
2024-10-07dt-bindings: interrupt-controller: fsl,ls-extirq: workaround wrong ↵Frank Li
interrupt-map number The driver(drivers/irqchip/irq-ls-extirq.c) have not use standard DT function to parser interrupt-map. So it doesn't consider '#address-size' in parent interrupt controller, such as GIC. When dt-binding verify interrupt-map, item data matrix is spitted at incorrect position. So cause below warning: arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dtb: interrupt-controller@14: interrupt-map: [[0, 0, 1, 0, 0, 4, 1, 0], [1, 0, 1, 4, 2, 0, 1, 0], ... is too short Remove interrupt-map restriction to workaround this warning for 'fsl,ls1088a-extirq', 'fsl,ls2080a-extirq' and fsl,lx2160a-extirq. Other keep the same restriction. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20241007161823.811021-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-10-02dt-bindings: interrupt-controller: Add support for sam9x7 aicVarshini Rajendran
Document the support added for the Advanced interrupt controller(AIC) chip in the sam9x7 SoC family. New compatible is introduced to capture the differences like the number of interrupts supported in the integration of the IP to that of the previous designs. Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Dharma Balasubiramani <dharma.b@microchip.com> Link: https://lore.kernel.org/all/20240903064240.49415-1-varshini.rajendran@microchip.com
2024-10-01dt-bindings: Fix array property constraintsRob Herring (Arm)
Schemas for array properties should only have 1 level of array constraints (e.g. items, maxItems, minItems). Sometimes the old encoding of all properties into a matrix leaked into the schema, and didn't matter for validation. Now the inner constraints are just silently ignored as json-schema array keywords are ignored on scalar values. Generally, keep the inner constraints and drop the outer "items". With gicv3 "mbi-alias" property, it is more appropriately a uint32 or uint64 as it is an address and size depends on "#address-cells". Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240925232409.2208515-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-10-01dt-bindings: interrupt-controller: fsl,mu-msi: Drop "interrupt-controller" ↵Rob Herring (Arm)
property The Freescale MU-MSI is an MSI provider, not an interrupt provider, so drop the "interrupt-controller" property. This fixes dtc "interrupt_provider" warning. Reviewed-by: Frank Li <Frank.Li@nxp.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240925173438.1906339-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-10-01dt-bindings: interrupt-controller: ti,sci-inta: Add missing ↵Rob Herring (Arm)
"#interrupt-cells" to example Enabling dtc interrupt_provider check reveals the example is missing the "#interrupt-cells" property as it is a dependency of "interrupt-controller". Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240925173432.1906168-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-09-19Merge tag 'devicetree-for-6.12' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DT Bindings: - Drop duplicate devices in trivial-devices.yaml - Add a common serial peripheral device schema and reference it in serial device schemas. - Convert nxp,lpc1850-wdt, zii,rave-wdt, ti,davinci-wdt, snps,archs-pct, fsl,bcsr, fsl,fpga-qixis-i2c, fsl,fpga-qixis, fsl,cpm-enet, fsl,cpm-mdio, fsl,ucc-hdlc, maxim,ds26522, aspeed,ast2400-cvic, aspeed,ast2400-vic, fsl,ftm-timer, ti,davinci-timer, fsl,rcpm, and qcom,ebi2 to DT schema - Add support for rockchip,rk3576-wdt, qcom,apss-wdt-sa8255p, fsl,imx8qm-irqsteer, qcom,pm6150-vib, qcom,sa8255p-pdc, isil,isl69260, ti,tps546d24, and lpc32xx DMA mux - Drop duplicate nvidia,tegra186-ccplex-cluster.yaml and mediatek,mt6795-sys-clock.yaml - Add arm,gic ESPI and EPPI interrupt type specifiers - Add another batch of legacy compatible strings which we have no intention of documenting - Add dmas/dma-names properties to FSL lcdif - Fix wakeup-source reference to m8921-keypad.yaml - Treewide fixes of typos in bindings DT Core: - Update dtc/libfdt to upstream version v1.7.0-95-gbcd02b523429 - More conversions to scoped iterators and __free() initializer - Handle overflows in address resources on 32-bit systems - Extend extracting compatible strings in sources from function parameters - Use of_property_present() in DT unittest - Clean-up of_irq_to_resource() to use helpers - Support #msi-cells=<0> in of_msi_get_domain() - Improve the kerneldoc for of_property_match_string() - kselftest: Ignore nodes that have ancestors disabled" * tag 'devicetree-for-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (59 commits) dt-bindings: watchdog: Add rockchip,rk3576-wdt compatible dt-bindings: cpu: Drop duplicate nvidia,tegra186-ccplex-cluster.yaml dt-bindings: clock: mediatek: Drop duplicate mediatek,mt6795-sys-clock.yaml of/irq: Use helper to define resources of/irq: Make use of irq_get_trigger_type() dt-bindings: clk: vc5: Make SD/OE pin configuration properties not required drivers/of: Improve documentation for match_string of: property: Do some clean up with use of __free() dt-bindings: watchdog: qcom-wdt: document support on SA8255p dt-bindings: interrupt-controller: fsl,irqsteer: Document fsl,imx8qm-irqsteer dt-bindings: interrupt-controller: arm,gic: add ESPI and EPPI specifiers dt-bindings: dma: Add lpc32xx DMA mux binding dt-bindings: trivial-devices: Drop duplicate "maxim,max1237" dt-bindings: trivial-devices: Drop duplicate LM75 compatible devices dt-bindings: trivial-devices: Deprecate "ad,ad7414" dt-bindings: trivial-devices: Drop incorrect and duplicate at24 compatibles dt-bindings: wakeup-source: update reference to m8921-keypad.yaml dt-bindings: interrupt-controller: qcom-pdc: document support for SA8255p dt-bindings: Fix various typos of: address: Unify resource bounds overflow checking ...
2024-09-17Merge tag 'soc-dt-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull SoC devicetree updates from Arnd Bergmann: "New SoC support for Broadcom bcm2712 (Raspberry Pi 5) and Renesas R9A09G057 (RZ/V2H(P)) and Qualcomm Snapdragon 414 (MSM8929), all three of these are variants of already supported chips, in particular the last one is almost identical to MSM8939. Lots of updates to Mediatek, ASpeed, Rockchips, Amlogic, Qualcomm, STM32, NXP i.MX, Sophgo, TI K3, Renesas, Microchip at91, NVIDIA Tegra, and T-HEAD. The added Qualcomm platform support once again dominates the changes, with seven phones and three laptops getting added in addition to many new features on existing machines. The Snapdragon X1E support specifically keeps improving. The other new machines are: - eight new machines using various 64-bit Rockchips SoCs, both on the consumer/gaming side and developer boards - three industrial boards with 64-bit i.MX, which is a very low number for them. - four more servers using a 32-bit Speed BMC - three boards using STM32MP1 SoCs - one new machine each using allwinner, amlogic, broadcom and renesas chips" * tag 'soc-dt-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (672 commits) arm64: dts: allwinner: h5: NanoPi NEO Plus2: Use regulators for pio arm64: dts: mediatek: add audio support for mt8365-evk arm64: dts: mediatek: add afe support for mt8365 SoC arm64: dts: mediatek: mt8186-corsola: Disable DPI display interface arm64: dts: mediatek: mt8186: Add svs node arm64: dts: mediatek: mt8186: Add power domain for DPI arm64: dts: mediatek: mt8195: Correct clock order for dp_intf* arm64: dts: mt8183: add dpi node to mt8183 arm64: dts: allwinner: h5: NanoPi Neo Plus2: Fix regulators arm64: dts: rockchip: add CAN0 and CAN1 interfaces to mecsbc board arm64: dts: rockchip: add CAN-FD controller nodes to rk3568 arm64: dts: nuvoton: ma35d1: Add uart pinctrl settings arm64: dts: nuvoton: ma35d1: Add pinctrl and gpio nodes arm64: dts: nuvoton: Add syscon to the system-management node ARM: dts: Fix undocumented LM75 compatible nodes arm64: dts: toshiba: Fix pl011 and pl022 clocks ARM: dts: stm32: Use SAI to generate bit and frame clock on STM32MP15xx DHCOM PDK2 ARM: dts: stm32: Switch bitclock/frame-master to flag on STM32MP15xx DHCOM PDK2 ARM: dts: stm32: Sort properties in audio endpoints on STM32MP15xx DHCOM PDK2 ARM: dts: stm32: Add MECIO1 and MECT1S board variants ...
2024-09-13dt-bindings: interrupt-controller: fsl,irqsteer: Document fsl,imx8qm-irqsteerFabio Estevam
Add an entry to fsl,imx8qm-irqsteer. This fixes the following dt-schema warning: failed to match any schema with compatible: ['fsl,imx8qm-irqsteer', 'fsl,imx-irqsteer'] Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240701204106.160128-1-festevam@gmail.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-09-13dt-bindings: interrupt-controller: qcom-pdc: document support for SA8255pNikunj Kela
Add compatible for pdc interrupt controller representing support on SA8255p. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com> Link: https://lore.kernel.org/r/20240905191510.3775179-1-quic_nkela@quicinc.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-09-13dt-bindings: Fix various typosYu-Chun Lin
Corrected several typos in Documentation/devicetree/bindings files. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Kuan-Wei Chiu <visitorckw@gmail.com> Reviewed-by: Matti Vaittinen <mazziesaccount@gmail.com> Signed-off-by: Yu-Chun Lin <eleanor15x@gmail.com> Link: https://lore.kernel.org/r/20240905151943.2792056-1-eleanor15x@gmail.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-09-11Merge tag 'arm-soc/for-6.12/devicetree' of ↵Arnd Bergmann
https://github.com/Broadcom/stblinux into soc/dt This pull request contains Broadcom SoCs Device Tree changes for 6.12, please pull the following: - Krzysztof documents the AVS monitor binding present on 2711 (Raspberry Pi 4) - Rafal updates the Broadcom Northstar DTS files to use the recent NVMEM binding - Artur factors the nodes between the BCM21664 and BCM23550 SoCs since they are nearly identical - Stefan converts the bcm2835-system-timer and bcm2836-l1-intc to a YAML binding syntax * tag 'arm-soc/for-6.12/devicetree' of https://github.com/Broadcom/stblinux: dt-bindings: interrupt-controller: convert bcm2836-l1-intc to yaml dt-bindings: timer: convert bcm2835-system-timer bindings to YAML ARM: dts: bcm-mobile: Split out nodes used by both BCM21664 and BCM23550 ARM: dts: broadcom: bcm21664: Move chosen node into Garnet DTS ARM: dts: broadcom: convert NVMEM content to layout syntax dt-bindings: soc: bcm: document brcm,bcm2711-avs-monitor Link: https://lore.kernel.org/r/20240906180643.2275460-1-florian.fainelli@broadcom.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-04dt-bindings: apple,aic: Document A7-A11 compatiblesNick Chan
Document and describe the compatibles for Apple A7-A11 SoCs. There are three feature levels: - apple,aic: No fast IPI, for A7-A10 - apple,t8015-aic: fast IPI, global only, for A11 - apple,t8103-aic: fast IPI with local and global support, for M1 Each feature level is an extension of the previous, for example, M1 will also work with the A7 feature level. All of A7-M1 gets its own SoC-specific compatible, and the "apple,aic" compatible as a fallback. Signed-off-by: Nick Chan <towinchenmi@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Sven Peter <sven@svenpeter.dev> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/all/20240901034143.12731-2-towinchenmi@gmail.com
2024-09-02dt-bindings: interrupt-controller: Add SOPHGO SG2002 plicThomas Bonnefille
Add compatible string for SOPHGO SG2002 Platform-Level Interruter Controller. Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://wiki.sipeed.com/hardware/en/lichee/RV_Nano/1_intro.html [1] Reviewed-by: Inochi Amaoto <inochiama@outlook.com> Link: https://lore.kernel.org/r/20240711-sg2002-v4-1-d97ec2367095@bootlin.com Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-08-20dt-bindings: interrupt-controller: convert bcm2836-l1-intc to yamlStefan Wahren
Convert the DT binding document for BCM2836 per-CPU interrupt controller from .txt to YAML. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240812200358.4061-3-wahrenst@gmx.net Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-08-13dt-bindings: interrupt-controller: aspeed,ast2400-vic: Convert to DT schemaAndrew Jeffery
Squash warnings such as: arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: /ahb/interrupt-controller@1e6c0080: failed to match any schema with compatible: ['aspeed,ast2400-vic'] The YAML DT schema defines an optional property, valid-sources, which was not previously described in the prose binding. It is added to document existing practice in the Aspeed devicetrees. Unfortunately the property seems to predate the requirement that vendor-specific properties be prefixed. Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240808-dt-warnings-irq-aspeed-dt-schema-v2-1-c2531e02633d@codeconstruct.com.au Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-07-22Merge tag 'irq-core-2024-07-15' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull interrupt subsystem updates from Thomas Gleixner: "Core: - Provide a new mechanism to create interrupt domains. The existing interfaces have already too many parameters and it's a pain to expand any of this for new required functionality. The new function takes a pointer to a data structure as argument. The data structure combines all existing parameters and allows for easy extension. The first extension for this is to handle the instantiation of generic interrupt chips at the core level and to allow drivers to provide extra init/exit callbacks. This is necessary to do the full interrupt chip initialization before the new domain is published, so that concurrent usage sites won't see a half initialized interrupt domain. Similar problems exist on teardown. This has turned out to be a real problem due to the deferred and parallel probing which was added in recent years. Handling this at the core level allows to remove quite some accrued boilerplate code in existing drivers and avoids horrible workarounds at the driver level. - The usual small improvements all over the place Drivers: - Add support for LAN966x OIC and RZ/Five SoC - Split the STM ExtI driver into a microcontroller and a SMP version to allow building the latter as a module for multi-platform kernels - Enable MSI support for Armada 370XP on platforms which do not support IPIs - The usual small fixes and enhancements all over the place" * tag 'irq-core-2024-07-15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (59 commits) irqdomain: Fix the kernel-doc and plug it into Documentation genirq: Set IRQF_COND_ONESHOT in request_irq() irqchip/imx-irqsteer: Handle runtime power management correctly irqchip/gic-v3: Pass #redistributor-regions to gic_of_setup_kvm_info() irqchip/bcm2835: Enable SKIP_SET_WAKE and MASK_ON_SUSPEND irqchip/gic-v4: Make sure a VPE is locked when VMAPP is issued irqchip/gic-v4: Substitute vmovp_lock for a per-VM lock irqchip/gic-v4: Always configure affinity on VPE activation Revert "irqchip/dw-apb-ictl: Support building as module" Revert "Loongarch: Support loongarch avec" arm64: Kconfig: Allow build irq-stm32mp-exti driver as module ARM: stm32: Allow build irq-stm32mp-exti driver as module irqchip/stm32mp-exti: Allow building as module irqchip/stm32mp-exti: Rename internal symbols irqchip/stm32-exti: Split MCU and MPU code arm64: Kconfig: Select STM32MP_EXTI on STM32 platforms ARM: stm32: Use different EXTI driver on ARMv7m and ARMv7a irqchip/stm32-exti: Add CONFIG_STM32MP_EXTI irqchip/dw-apb-ictl: Support building as module irqchip/riscv-aplic: Simplify the initialization code ...
2024-07-20Merge tag 'riscv-for-linus-6.11-mw1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V updates from Palmer Dabbelt: - Support for various new ISA extensions: * The Zve32[xf] and Zve64[xfd] sub-extensios of the vector extension * Zimop and Zcmop for may-be-operations * The Zca, Zcf, Zcd and Zcb sub-extensions of the C extension * Zawrs - riscv,cpu-intc is now dtschema - A handful of performance improvements and cleanups to text patching - Support for memory hot{,un}plug - The highest user-allocatable virtual address is now visible in hwprobe * tag 'riscv-for-linus-6.11-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (58 commits) riscv: lib: relax assembly constraints in hweight riscv: set trap vector earlier KVM: riscv: selftests: Add Zawrs extension to get-reg-list test KVM: riscv: Support guest wrs.nto riscv: hwprobe: export Zawrs ISA extension riscv: Add Zawrs support for spinlocks dt-bindings: riscv: Add Zawrs ISA extension description riscv: Provide a definition for 'pause' riscv: hwprobe: export highest virtual userspace address riscv: Improve sbi_ecall() code generation by reordering arguments riscv: Add tracepoints for SBI calls and returns riscv: Optimize crc32 with Zbc extension riscv: Enable DAX VMEMMAP optimization riscv: mm: Add support for ZONE_DEVICE virtio-mem: Enable virtio-mem for RISC-V riscv: Enable memory hotplugging for RISC-V riscv: mm: Take memory hotplug read-lock during kernel page table dump riscv: mm: Add memory hotplugging support riscv: mm: Add pfn_to_kaddr() implementation riscv: mm: Refactor create_linear_mapping_range() for memory hot add ...
2024-07-20Merge tag 'mips_6.11' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS updates from Thomas Bogendoerfer: - add support for Realtek RTL9302C - add support for Mobileye EyeQ6H - add support for Mobileye EyeQ OLB system controller - improve r4k clocksource - add mode for emulating ieee754 NAN2008 - rework for BMIPS CBR address handling - fixes for Loongson 2K1000 - defconfig updates - cleanups and fixes * tag 'mips_6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (58 commits) MIPS: config: Add ip30_defconfig MIPS: config: lemote2f: Regenerate defconfig MIPS: config: generic: Add board-litex MIPS: config: Enable MSA and virtualization for MIPS64R6 MIPS: Fix fallback march for SB1 mips: dts: realtek: Add RTL9302C board mips: generic: add fdt fixup for Realtek reference board mips: select REALTEK_OTTO_TIMER for Realtek platforms dt-bindings: interrupt-controller: realtek,rtl-intc: Add rtl9300-intc dt-bindings: mips: realtek: Add rtl930x-soc compatible dt-bindings: vendor-prefixes: Add Cameo Communications mips: dts: realtek: add device_type property to cpu node mips: dts: realtek: use "serial" instead of "uart" in node name MIPS: Implement ieee754 NAN2008 emulation mode MIPS: lantiq: improve USB initialization MIPS: GIC: Generate redirect block accessors MIPS: CPS: Add a couple of multi-cluster utility functions MIPS: Octeron: remove source file executable bit MAINTAINERS: Mobileye: add OLB drivers and dt-bindings MIPS: mobileye: eyeq5: add OLB system-controller node ...
2024-07-17Merge tag 'devicetree-for-6.11' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DT Bindings: - Convert and add a bunch of IBM FSI related bindings - Add a new schema listing legacy compatibles which will (probably) never be documented. This will silence various checks warning about them. - Add bindings for Sierra Wireless mangOH Green SPI IoT interface, new Arm 2024 Cortex and Neoverse CPUs, QCom sc8180x PDC, QCom SDX75 GPI DMA, imx8mp/imx8qxp fsl,irqsteer, and Renesas RZ/G2UL CRU and CSI-2 blocks - Convert Spreadtrum sprd-timer, FSL cpm_qe, FSL fsl,ls-scfg-msi, FSL q(b)man-*, FSL qoriq-mc, and img,pdc-wdt bindings to DT schema - Drop obsolete stericsson,abx500.txt DT core: - Update dtc to upstream version v1.7.0-93-g1df7b047fe43 - Add support to run DT validation on DTs with applied overlays - Add helper for creating boolean properties in dynamic nodes and use that for dynamic PCI nodes - Clean-up early parsing of '#{address,size}-cells'" * tag 'devicetree-for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (39 commits) dt-bindings: timer: sprd-timer: convert to YAML dt-bindings: incomplete-devices: document devices without bindings dt-bindings: trivial-devices: document the Sierra Wireless mangOH Green SPI IoT interface scripts/dtc: Update to upstream version v1.7.0-93-g1df7b047fe43 dt-bindings: soc: fsl: Add fsl,ls1028a-reset for reset syscon node dt-bindings: soc: fsl: cpm_qe: convert to yaml format dt-bindings: i2c: i2c-fsi: Convert to json-schema dt-bindings: fsi: Document the FSI Hub Controller dt-bindings: fsi: Document the AST2700 FSI controller dt-bindings: fsi: ast2600-fsi-master: Convert to json-schema dt-bindings: fsi: ibm,i2cr-fsi-master: Reference common FSI controller dt-bindings: fsi: Document the FSI controller common properties dt-bindings: fsi: Document the IBM SBEFIFO engine dt-bindings: fsi: p9-occ: Convert to json-schema dt-bindings: fsi: Document the IBM SCOM engine dt-bindings: fsi: fsi2spi: Document SPI controller child nodes dt-bindings: interrupt-controller: convert fsl,ls-scfg-msi to yaml dt-bindings: soc: fsl: Convert q(b)man-* to yaml format dt-bindings: misc: fsl,qoriq-mc: convert to yaml format dt-bindings: drop stale Anson Huang from maintainers ...
2024-07-12dt-bindings: interrupt-controller: realtek,rtl-intc: Add rtl9300-intcChris Packham
Add a compatible string for the interrupt controller found on the rtl930x SoCs. The interrupt controller has registers for VPE1 so these are added as a second reg cell. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-07-09dt-bindings: interrupt-controller: convert fsl,ls-scfg-msi to yamlFrank Li
Convert device tree binding fsl,ls-scfg-msi to yaml format. Additional changes: - Include gic.h and use predefined macro in example. - Remove label in example. - Change node name to interrupt-controller in example. - Fix error in example. - ls1046a allow 4 irqs, other platform only 1 irq. - Add $ref: msi-controller.yaml - Add #msi-cells. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240627144207.4003708-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-07-08dt-bindings: interrupt-controller: qcom,pdc: Add sc8180x PDCBjorn Andersson
The SC8180X platform has a PDC block, add a compatible for this. Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20240525-sc8180x-pdc-binding-compatible-v1-1-17031c85ed69@quicinc.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-07-08dt-bindings: interrupt-controller: fsl,irqsteer: Add imx8mp/imx8qxp supportAlexander Stein
Some SoC like i.MX8MP or i.MX8QXP use a power-domain for this IP. Add SoC-specific compatibles, which also requires a power-domain. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240528071141.92003-2-alexander.stein@ew.tq-group.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-07-08Merge tag 'imx-bindings-6.11' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt i.MX DT bindings for 6.11: - Add compatible string for various new boards - Drop Li Yang as maintainer for bindings as his email bounces * tag 'imx-bindings-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: arm: fsl: document Kontron SMARC-sAMX6i boards dt-bindings: arm: add MBa8MP-RAS314 SBC dt-bindings: arm: fsl: add i.MX93 9x9 QSB board dt-bindings: arm: fsl: add i.MX95 19x19 EVK board dt-bindings: arm: fsl: Document Compulab IOT-GATE-iMX8 dt-bindings: Drop Li Yang as maintainer for all bindings Link: https://lore.kernel.org/r/20240702142153.413061-2-shawnguo2@yeah.net Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-06-28dt-bindings: interrupt-controller: convert marvell,mpic binding to YAMLMarek Behún
Convert the marvell,mpic device-tree binding to YAML. Add myself as maintainer. Signed-off-by: Marek Behún <kabel@kernel.org> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240624145355.8034-3-kabel@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-06-24dt-bindings: interrupt-controller: riscv,cpu-intc: convert to dtschemaKanak Shilledar
Convert the RISC-V Hart-Level Interrupt Controller (HLIC) to newer DT schema, Created DT schema based on the .txt file which had `compatible`, `#interrupt-cells` and `interrupt-controller` as required properties. Changes made with respect to original file: - Changed the example to just use interrupt-controller instead of using the whole cpu block - Changed the example compatible string. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Kanak Shilledar <kanakshilledar@gmail.com> Link: https://lore.kernel.org/r/20240615021507.122035-2-kanakshilledar@gmail.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2024-06-17dt-bindings: interrupt-controller: Add support for Microchip LAN966x OICHerve Codina
The Microchip LAN966x outband interrupt controller (OIC) maps the internal interrupt sources of the LAN966x device to an external interrupt. When the LAN966x device is used as a PCI device, the external interrupt is routed to the PCI interrupt. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240614173232.1184015-22-herve.codina@bootlin.com
2024-06-16dt-bindings: Drop Li Yang as maintainer for all bindingsMichael Walle
Remove Li Yang from all device tree bindings because mails to this address are bouncing. Commit fbdd90334a62 ("MAINTAINERS: Drop Li Yang as their email address stopped working") already removed the entry from the MAINTAINERS but didn't address all the in-file entries of the device tree bindings. Signed-off-by: Michael Walle <mwalle@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-06-05dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/Five SoCLad Prabhakar
Document RZ/Five (R9A07G043F) IRQC bindings. The IRQC block on the RZ/Five SoC is almost identical to the one found on the RZ/G2L SoC, with the only difference being that it has additional mask control registers for NMI/IRQ/TINT. Hence new compatible string "renesas,r9a07g043f-irqc" is added for RZ/Five SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240604173710.534132-2-prabhakar.mahadev-lad.rj@bp.renesas.com
2024-05-17Merge tag 'devicetree-for-6.10' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DT Bindings: - Convert samsung,exynos5-dp, atmel,lcdc, aspeed,ast2400-wdt bindings to schemas - Add bindings for Allwinner H616 NMI controller, Renesas r8a779g0 irqc, Renesas R-Car V4M TMU and CMT timers, Freescale S32G3 linflexuart, and Mediatek MT7988 XHCI - Add 'reg' constraints on DSI and SPI display panels - More dropping of unnecessary quotes in schemas - Use full paths rather than relative paths in schema $refs - Drop redundant storing of phandle for reserved memory DT Core: - Use scope based cleanups for kfree() and of_node_put() - Track interrupt-map and power-supplies for fw_devlink - Add buffer overflow check in of_modalias() - Add and use __of_prop_free() helper for freeing struct property" * tag 'devicetree-for-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (25 commits) of: property: Add fw_devlink support for interrupt-map property dt-bindings: display: panel: constrain 'reg' in DSI panels dt-bindings: display: panel: constrain 'reg' in SPI panels dt-bindings: display: samsung,ams495qa01: add missing SPI properties ref dt-bindings: Use full path to other schemas dt-bindings: PCI: qcom,pcie-sm8350: Drop redundant 'oneOf' sub-schema of: module: add buffer overflow check in of_modalias() dt-bindings: PCI: microchip: increase number of items in ranges property dt-bindings: Drop unnecessary quotes on keys dt-bindings: interrupt-controller: mediatek,mt6577-sysirq: Drop unnecessary quotes of: property: Use scope based cleanup on port_node of: reserved_mem: Remove the use of phandle from the reserved_mem APIs of: property: fw_devlink: Add support for "power-supplies" binding dt-bindings: watchdog: aspeed,ast2400-wdt: Convert to DT schema dt-bindings: irq: sun7i-nmi: Add binding for the H616 NMI controller dt-bindings: interrupt-controller: renesas,irqc: Add r8a779g0 support dt-bindings: timer: renesas,tmu: Add R-Car V4M support dt-bindings: timer: renesas,cmt: Add R-Car V4M support of: Use scope based of_node_put() cleanups of: Use scope based kfree() cleanups ...
2024-05-03dt-bindings: interrupt-controller: mediatek,mt6577-sysirq: Drop unnecessary ↵Rob Herring (Arm)
quotes Drop unnecessary quotes which aren't needed in yaml. This is checked by yamllint, but this case was excluded due to the comma and yamllint's mishandling of some cases with commas. That's now fixed in yamllint 1.34. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20240426195404.2771046-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-04-23dt-bindings: irq: sun7i-nmi: Add binding for the H616 NMI controllerChris Morgan
Add binding for the H616 NMI controller. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20240418181615.1370179-2-macroalpha82@gmail.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>