summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2026-03-17EVM: add comment describing why ino field is still unsigned longJeff Layton
Mimi pointed out that we didn't widen the inode number field in struct h_misc alongside the inode->i_ino widening. While we could make an equivalent change there, that would require EVM resigning on all 32-bit hosts. Instead, leave the field as an unsigned long. This should have no effect on 64-bit hosts, and allow things to continue working on 32-bit hosts in the cases where the i_ino fits in 32-bits. Add a comment explaining why it's being left as unsigned long. Reviewed-by: Mimi Zohar <zohar@linux.ibm.com> Signed-off-by: Jeff Layton <jlayton@kernel.org> Link: https://patch.msgid.link/20260316-iino-u64-v3-1-d1076b8f7a20@kernel.org Signed-off-by: Christian Brauner <brauner@kernel.org>
2026-03-17drm/amdgpu/discovery: Add braces to case statements in ↵Nathan Chancellor
amdgpu_discovery_table_check() When building with a version of clang that supports the narrower '-fms-anonymous-structs' (as opposed to the wider '-fms-extensions') along with the associated kernel support (such as in next-20260312 [1]), there are warnings (or errors with CONFIG_WERROR=y / W=e) from the switch statement added by commit 47ab777c16c7 ("drm/amdgpu/discovery: use common function to check discovery table"). drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:560:3: error: label followed by a declaration is a C23 extension [-Werror,-Wc23-extensions] 560 | struct ip_discovery_header *ihdr = | ^ drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:568:3: error: label followed by a declaration is a C23 extension [-Werror,-Wc23-extensions] 568 | struct gpu_info_header *ghdr = | ^ drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:576:3: error: label followed by a declaration is a C23 extension [-Werror,-Wc23-extensions] 576 | struct harvest_info_header *hhdr = | ^ drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:584:3: error: label followed by a declaration is a C23 extension [-Werror,-Wc23-extensions] 584 | struct vcn_info_header *vhdr = | ^ drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:592:3: error: label followed by a declaration is a C23 extension [-Werror,-Wc23-extensions] 592 | struct mall_info_header *mhdr = | ^ If '-fms-extensions' were not present, this would be a hard error in older clang versions. Add braces to the case statements that declare variables to clear up the warnings. Fixes: 47ab777c16c7 ("drm/amdgpu/discovery: use common function to check discovery table") Link: https://git.kernel.org/next/linux-next/c/0d3fccf68d9873a3c824fb70be0dbb2c4642aa90 [1] Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amd/ras: Pass ras poison consumption message to sriov hostYiPeng Chai
Pass ras poison consumption message to sriov host. Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17Documentation: printk: Add section about avoiding lockupsh3288824963
Add a section 'Avoiding lockups from excessive printk() use' to printk-basics.rst, explaining the risk of calling printk() in hot paths with legacy consoles and suggesting alternatives. The section covers: - Rate-limited and one-time printing variants - Log level filtering - printk_deferred() for legacy consoles - Porting to nbcon API (preferred solution) - Using tracepoints for permanent debugging This documentation is relevant only for legacy console drivers and !PREEMPT_RT kernels. Suggested-by: Petr Mladek <pmladek@suse.com> Suggested-by: John Ogness <john.ogness@linutronix.de> Signed-off-by: h3288824963 <3288824963@qq.com> Reviewed-by: John Ogness <john.ogness@linutronix.de> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <tencent_FB5B7DCFFB10BCDE325397D1202226779D09@qq.com>
2026-03-17drm/amdgpu/userq: Use kvfree instead of kfree in amdgpu_userq_wait_ioctlSunil Khatri
In function amdgpu_userq_wait_ioctl, drm_gem_objects_lookup allocates memory via kvmalloc and hence when that memory is freed the memory via kvfree. Fixes: 2de9353e193f ("drm/amdgpu/userq: Use drm_gem_objects_lookup in amdgpu_userq_wait_ioctl") Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amd/pm: Use common smu fw check function for smu15Asad Kamal
Use common smu fw check function for smu15 and remove dedicated ones v2: Remove dedicated functions and directly use common one Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amd/pm: Use common smu fw check function for smu13Asad Kamal
Use common smu fw check function for smu13 and remove deicated ones v2: Remove dedicated functions and directly use common one Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amd/display: Promote DC to 3.2.374Taimur Hassan
This version brings along the following updates: - Clamp dc_cursor_position x_hotspot to prevent integer overflow - Query DC for gfx handling when setting linear tiling - Add a buffer for boot time crc - Silence static analysis warnings - Plumb MRQ programming out of DML for dml2_1 - Add dcn_mrq_present Field - Fix number of opp - Add debugfs to disallow eDP Replay entry Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com> Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amd/display: Clamp dc_cursor_position x_hotspot to prevent integer overflowBenjamin Nwankwo
why: Workaround for duplicate cursor. Cursor offsetting via x_hotspot attempts to write a 32 bit unsigned integer to the 8 bit field CURSOR_HOT_SPOT_X. This wraps cursor position back into focus if x_hotspot exceeds 8 bits, making duplicate cursors visible how: Clamp x_hotspot before writing to hardware Reviewed-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Nevenko Stupar <nevenko.stupar@amd.com> Signed-off-by: Benjamin Nwankwo <Benjamin.Nwankwo@amd.com> Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17fs/mbcache: cancel shrink work before destroying the cacheHyungJung Joo
mb_cache_destroy() calls shrinker_free() and then frees all cache entries and the cache itself, but it does not cancel the pending c_shrink_work work item first. If mb_cache_entry_create() schedules c_shrink_work via schedule_work() and the work item is still pending or running when mb_cache_destroy() runs, mb_cache_shrink_worker() will access the cache after its memory has been freed, causing a use-after-free. This is only reachable by a privileged user (root or CAP_SYS_ADMIN) who can trigger the last put of a mounted ext2/ext4/ocfs2 filesystem. Cancel the work item with cancel_work_sync() before calling shrinker_free(), ensuring the worker has finished and will not be rescheduled before the cache is torn down. Fixes: c2f3140fe2ec ("mbcache2: limit cache size") Signed-off-by: Hyungjung Joo <jhj140711@gmail.com> Link: https://patch.msgid.link/20260317054556.1821600-1-jhj140711@gmail.com Signed-off-by: Christian Brauner <brauner@kernel.org>
2026-03-17drm/amd/display: Query DC for gfx handling when setting linear tilingNicholas Carbones
[Why] Post-driver cases always use linear tiling yet gfx handling for this case is improper, allowing for incorrect gfx structs to be populated and used. [How] Query DC for the apporpriate linear tiling mode and populate the DCN specific gfx version structs. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Nicholas Carbones <Nicholas.Carbones@amd.com> Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amd/display: Add a buffer for boot time crcTom Chung
[Why] We need to reserve a memory buffer for boot time crc test during resume. [How] Create a buffer during boot up and send the buffer info to DMUB. Reviewed-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amd/display: Silence static analysis warningGaghik Khachatrian
Silence static analysis warnings by ensuring swath size temporaries are initialized before use. No functional change intended. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Gaghik Khachatrian <gaghik.khachatrian@amd.com> Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17fs/omfs: reject s_sys_blocksize smaller than OMFS_DIR_STARTHyungJung Joo
omfs_fill_super() rejects oversized s_sys_blocksize values (> PAGE_SIZE), but it does not reject values smaller than OMFS_DIR_START (0x1b8 = 440). Later, omfs_make_empty() uses sbi->s_sys_blocksize - OMFS_DIR_START as the length argument to memset(). Since s_sys_blocksize is u32, a crafted filesystem image with s_sys_blocksize < OMFS_DIR_START causes an unsigned underflow there, wrapping to a value near 2^32. That drives a ~4 GiB memset() from bh->b_data + OMFS_DIR_START and overwrites kernel memory far beyond the backing block buffer. Add the corresponding lower-bound check alongside the existing upper-bound check in omfs_fill_super(), so that malformed images are rejected during superblock validation before any filesystem data is processed. Fixes: a3ab7155ea21 ("omfs: add directory routines") Signed-off-by: Hyungjung Joo <jhj140711@gmail.com> Link: https://patch.msgid.link/20260317054827.1822061-1-jhj140711@gmail.com Signed-off-by: Christian Brauner <brauner@kernel.org>
2026-03-17drm/amd/display: Plumb MRQ programming out of DML for dml2_1Nicholas Kazlauskas
[Why] If the MRQ is present then these fields are also required to be plumbed out to the requestor for programming. [How] Pipe the fields out through rq_dlg_get_rq_reg. The implementation follows the previous generation in dml2_0 for DCN35 but adjusted for the new helpers and coding style of dml2_1. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amd/display: Add dcn_mrq_present FieldAustin Zheng
[Why/How] Add MRQ flag so it can be passed from ip_caps to ip_params Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Austin Zheng <Austin.Zheng@amd.com> Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amd/display: Fix number of oppAustin Zheng
[Why/How] Patch number of opp based on IP caps Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Austin Zheng <Austin.Zheng@amd.com> Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amd/display: Add debugfs to disallow eDP Replay entryRay Wu
[Why & How] Test applications need to read CRC from eDP sink side, but sink replay feature prevents proper CRC reading and causing timeout. Add disallow_edp_enter_replay debugfs interface to allow test apps to temporarily disable Replay for CRC operations. Reviewed-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17Documentation/mm/hwpoison.rst: fix typos and grammar.Ariful Islam Shoikot
Signed-off-by: Ariful Islam Shoikot <islamarifulshoikat@gmail.com> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20260317120614.51046-1-islamarifulshoikat@gmail.com>
2026-03-17USB: serial: ti_usb_3410_5052: use strscpy() instead of strcpy()Ai Chao
Use a safer function strscpy() instead of strcpy() for copying to arrays. Only idiomatic code replacement, and no functional changes. Signed-off-by: Ai Chao <aichao@kylinos.cn> Signed-off-by: Johan Hovold <johan@kernel.org>
2026-03-17drm/amd/display: Wrap dcn32_override_min_req_memclk() in DC_FP_{START, END}Xi Ruoyao
[Why] The dcn32_override_min_req_memclk function is in dcn32_fpu.c, which is compiled with CC_FLAGS_FPU into FP instructions. So when we call it we must use DC_FP_{START,END} to save and restore the FP context, and prepare the FP unit on architectures like LoongArch where the FP unit isn't always on. Reported-by: LiarOnce <liaronce@hotmail.com> Fixes: ee7be8f3de1c ("drm/amd/display: Limit DCN32 8 channel or less parts to DPM1 for FPO") Signed-off-by: Xi Ruoyao <xry111@xry111.site> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amd/display: Fix uninitialized variable use which breaks full LTOCalvin Owens
Commit e1b385726f7f ("drm/amd/display: Add additional checks for PSP footer size") introduced a use of an uninitialized stack variable in dm_dmub_sw_init() (region_params.bss_data_size). Interestingly, this seems to cause no issue on normal kernels. But when full LTO is enabled, it causes the compiler to "optimize" out huge swaths of amdgpu initialization code, and the driver is unusable: amdgpu 0000:03:00.0: [drm] Loading DMUB firmware via PSP: version=0x07002F00 amdgpu 0000:03:00.0: sw_init of IP block <dm> failed 5 amdgpu 0000:03:00.0: amdgpu_device_ip_init failed amdgpu 0000:03:00.0: Fatal error during GPU init It surprises me that neither gcc nor clang emit a warning about this: I only found it by bisecting the LTO breakage. Fix by using the bss_data_size field from fw_meta_info_params, as was presumably intended. Fixes: e1b385726f7f ("drm/amd/display: Add additional checks for PSP footer size") Signed-off-by: Calvin Owens <calvin@wbinvd.org> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amd/pm: Add common smu fw check functionAsad Kamal
Add common smu firmware version check function Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu: fix amdgpu_userq_evictChristian König
Canceling the resume worker synchonized can deadlock because it can in turn wait for the eviction worker through the userq_mutex. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Sunil Khatri <sunil.khatri@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu: Limit BO list entry count to prevent resource exhaustionJesse.Zhang
Userspace can pass an arbitrary number of BO list entries via the bo_number field. Although the previous multiplication overflow check prevents out-of-bounds allocation, a large number of entries could still cause excessive memory allocation (up to potentially gigabytes) and unnecessarily long list processing times. Introduce a hard limit of 128k entries per BO list, which is more than sufficient for any realistic use case (e.g., a single list containing all buffers in a large scene). This prevents memory exhaustion attacks and ensures predictable performance. Return -EINVAL if the requested entry count exceeds the limit Reviewed-by: Christian König <christian.koenig@amd.com> Suggested-by: Christian König <christian.koenig@amd.com> Signed-off-by: Jesse Zhang <jesse.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu: Add poison consumption handling for gfx v12_1YiPeng Chai
Add poison consumption handling for gfx v12_1. Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu: Add umc ecc error handling for gmc v12_1YiPeng Chai
Add umc ecc error handling for gmc v12_1. Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amd/ras: Add unified interface to handle ras interruptsYiPeng Chai
Add unified interface to handle ras interrupts, some redundant interrupt function interfaces will be removed later. Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu: Place firmware bo in vram for A + AHawking Zhang
On A+A platforms, PSP requires the firmware bo to be located in VRAM Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu/mmhub_v4_2_0: expand gart aperture to gart_end on A+AFeifei Xu
On A+A, sysvm aperture is used to access vram and gart. Gart is placed right after vram. Adjust gart aperture range in mmhub for A+A. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu/gmc12: Init vram_size for A + AHawking Zhang
Calculate vram_size using the XGMI node segment size and node count for A+A configurations Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu/gmc12: Update connected_to_cpu flagHawking Zhang
Query the host–GPU interface in gmc early init phase and set xgmi.connected_to_cpu accordingly Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu/gmc12: Fix VRAM base offset calculationHawking Zhang
Include segment size when calculating vram base offset Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu/gmc12: Query host-gpu interfaceHawking Zhang
Query host-gpu interconnect type for gmc v12 devices Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu: Retire get_xgmi_info callback for gfxhub v12_1Hawking Zhang
gfxhub v12_1 is not always on. querying xgmi info from it may not work consistently Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu: Query xgmi info from mmhub if availableHawking Zhang
Query xgmi info from mmhub if available Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu: Implement get_xgmi_info callback for mmhub_v4_2Hawking Zhang
Query memory region assignment and address via mmhub Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu/gmc12: Update gmc aperture base for A + AHawking Zhang
Query mmhub MC_VM_FB_OFFSET, XGMI_LFB_CNTL|SIZE registers to calculate gmc apeture base address for A + A configuration Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu/gmc12: Bypass FB resize on A + A platformHawking Zhang
Resizing fb bar is not needed/supported on A + A platform. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu: Update gfxhub system aperture settings for A + AHawking Zhang
Bypass the programming from SRIOV guest Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu: Correct mmhub system aperture settings for A + AHawking Zhang
Disable AGP and FB apeture on all available MMHUB instances when vmid0 page table is enabled Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu/gmc12: Set up pdb0 for vmid0 page tableHawking Zhang
Alloc, Init and free pdb0 for vmid0 page table that is used for fb translation on A + A platform Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu: Init table depth and block_size for A + AHawking Zhang
Initialize page table depth and page table block size for 2-level gart table construction on A + A platform Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu: Place gart and vram in sysvm aper for A + AHawking Zhang
On A + A platform, sysvm aperture is used for both vram and gart access. In sysvm aperture, vram starts at 0, and gart starts right after vram. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu: Limit physical transcation mode to A + A onlyHawking Zhang
Only enable page table walker to snoop CPU cache on A + A platform Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu: Support forcing MTYPE_RWHarish Kasiviswanathan
Set default value of module parameter amdgpu_mtype_local to -1. This allows to force MTYPE_RW on ASICs where MTYPE_RW is not default. v2: Fix SDMA get_vm_pte_pde MTYPE Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu: Update MTYPE for GFX12.1Harish Kasiviswanathan
Update MTYPE for GFX12.1 for AID A0 and A1 Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Reviewed-by: Philip.Yang <Philip.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdkfd: Don't expect signal mailbox updateHarish Kasiviswanathan
GFX12.1 CP to improve performance has removed updating event_id into signal mailbox. In future, this optimization can be extended to older ASICs. Update driver code to handle this case. Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu: update cp packets for gfx v12_1Likun Gao
Clean up some unsupport CP packets for gfx v12_1. Update CP packets for gfx v12_1 with some new definition. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-17drm/amdgpu: retire some unsupport cmd pkt bit for gfx v12_1Likun Gao
Retire some unsupport CP command bit set for gfx v12_1. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.25.1) at 2026-09-17 01:40:22 +0000