summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2026-03-19staging: media: tegra-video: vi: adjust get_selection operation checkSvyatoslav Ryhel
During __tegra_channel_try_format, the VI (Video Input) checks if the camera sensor driver provides a get_selection operation. If this operation is unavailable, the crop is set to 0. However, if the operation is available but returns an error, the VI currently fails. While this works for simple cameras with a single pad, it creates a corner case for sensors like the mt9m114. This sensor provides the same operation set for both IFP pads, but returns an error when get_selection is called on an unsupported pad (such as the source pad), causing the aforementioned behavior. To resolve this, if get_selection is implemented but returns an error, try_crop is now set to 0 — treating it as if the operation was not implemented — instead of returning a failure. Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com> # tegra20, parallel camera Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-03-19staging: media: tegra-video: expand VI and VIP support to Tegra30Svyatoslav Ryhel
Existing VI and VIP implementation for Tegra20 is fully compatible with Tegra30. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com> # Tegra20 VIP Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-03-19wifi: rtw89: usb: Rx aggregation for RTL8832CU/RTL8851BUShin-Yi Lin
USB RX Aggregation is a performance optimization technique used in USB network devices to increase throughput. Instead of sending every received network packet to the host computer individually, the device hardware groups multiple smaller packets into a single, large USB Bulk Transfer. * toAP/toNB use iperf3 respectively. With Cisco BE6000 - iperf3 tcp 10 pair (to another NB) [6G 160Mhz]: RTL8832CU-USB3.0 before after TX 941 941 RX 847 919 RTL8832CU-USB2.0 before after TX 293 286 RX 342 356 [5G 80Mhz]: RTL8832CU-USB3.0 before after TX 864 877 RX 864 902 RTL8832CU-USB2.0 before after TX 279 271 RX 327 349 RTL8851BU before after TX 115 114 RX 295 306 Signed-off-by: Shin-Yi Lin <isaiah@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20260312055724.12177-1-pkshih@realtek.com
2026-03-19pinctrl: intel: Enable 3-bit PAD_OWN featureAndy Shevchenko
Starting from revision 1.1 of the Chassis specification the PAD_OWN is represented by 3 bits instead of 2 bits in the previous revisions. Update the driver to support this feature. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2026-03-19pinctrl: intel: Fix the revision for new features (1kOhm PD, HW debouncer)Andy Shevchenko
The 1kOhm pull down and hardware debouncer are features of the revision 0.92 of the Chassis specification. Fix that in the code accordingly. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2026-03-19pinctrl: intel: Improve capability supportAndy Shevchenko
The register space of a certain capability starts at the offset just after the respective node in the capability list. It means that there are no fixed offsets for them from SoC to SoC generation and they have to be calculated at run-time. Improve capability support by adding the respective calculation algorithm and in the result enable PWM on more platforms that currently may use the wrong register. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2026-03-18dt-bindings: touchscreen: trivial-touch: Move allOf: after required:Marek Vasut
Majority of schemas place allOf: after required: . Documentation Documentation/devicetree/bindings/writing-schema.rst also hints at this ordering. Trivially update this schema. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260312224925.186077-1-marek.vasut+renesas@mailbox.org Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2026-03-18dt-bindings: input: touchscreen: Convert TS-4800 to DT schemaEduard Bostina
Convert the TS-4800 touchscreen bindings to DT schema. Signed-off-by: Eduard Bostina <egbostina@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260316181038.9771-1-egbostina@gmail.com Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2026-03-18hfsplus: validate b-tree node 0 bitmap at mount timeShardul Bankar
Syzkaller reported an issue with corrupted HFS+ images where the b-tree allocation bitmap indicates that the header node (Node 0) is free. Node 0 must always be allocated as it contains the b-tree header record and the allocation bitmap itself. Violating this invariant leads to allocator corruption, which cascades into kernel panics or undefined behavior when the filesystem attempts to allocate blocks. Prevent trusting a corrupted allocator state by adding a validation check during hfs_btree_open(). Introduce the hfs_bmap_test_bit() helper (utilizing the newly added map-access API) to safely verify that the MSB of the first bitmap byte (representing Node 0) is marked as allocated. The helper returns a boolean, allowing the caller to safely catch both structural IO errors and illegally cleared bits in a single check. If corruption is detected, print a warning identifying the specific corrupted tree and force the filesystem to mount read-only (SB_RDONLY). This prevents kernel panics from corrupted images while enabling data recovery. As a minor cleanup to support the warning logs, replace the verbose CNID logic with cleaner macro definitions (using official structural names like "Extents Overflow File") and a dedicated string lookup helper. Reported-by: syzbot+1c8ff72d0cd8a50dfeaa@syzkaller.appspotmail.com Link: https://syzkaller.appspot.com/bug?extid=1c8ff72d0cd8a50dfeaa Link: https://lore.kernel.org/all/20260315172005.2066677-1-shardul.b@mpiricsoftware.com/ Signed-off-by: Shardul Bankar <shardul.b@mpiricsoftware.com> Reviewed-by: Viacheslav Dubeyko <slava@dubeyko.com> Tested-by: Viacheslav Dubeyko <slava@dubeyko.com> Signed-off-by: Viacheslav Dubeyko <slava@dubeyko.com> Link: https://lore.kernel.org/r/20260318073823.3933718-3-shardul.b@mpiricsoftware.com Signed-off-by: Viacheslav Dubeyko <slava@dubeyko.com>
2026-03-18hfsplus: refactor b-tree map page access and add node-type validationShardul Bankar
In HFS+ b-trees, the node allocation bitmap is stored across multiple records. The first chunk resides in the b-tree Header Node at record index 2, while all subsequent chunks are stored in dedicated Map Nodes at record index 0. This structural quirk forces callers like hfs_bmap_alloc() and hfs_bmap_free() to duplicate boilerplate code to validate offsets, correct lengths, and map the underlying pages via kmap_local_page(). There is also currently no strict node-type validation before reading these records, leaving the allocator vulnerable if a corrupted image points a map linkage to an Index or Leaf node. Introduce a unified bit-level API to encapsulate the map record access: 1. A new `struct hfs_bmap_ctx` to cleanly pass state and safely handle page math across all architectures. 2. `hfs_bmap_get_map_page()`: Automatically validates node types (HFS_NODE_HEADER vs HFS_NODE_MAP), infers the correct record index, handles page-boundary math, and returns the unmapped `struct page *` directly to the caller to avoid asymmetric mappings. 3. `hfs_bmap_clear_bit()`: A clean wrapper that internally handles page mapping/unmapping for single-bit operations. Refactor hfs_bmap_alloc() and hfs_bmap_free() to utilize this new API. This deduplicates the allocator logic, hardens the map traversal against fuzzed images, and provides the exact abstractions needed for upcoming mount-time validation checks. Signed-off-by: Shardul Bankar <shardul.b@mpiricsoftware.com> Reviewed-by: Viacheslav Dubeyko <slava@dubeyko.com> Tested-by: Viacheslav Dubeyko <slava@dubeyko.com> Signed-off-by: Viacheslav Dubeyko <slava@dubeyko.com> Link: https://lore.kernel.org/r/20260318073823.3933718-2-shardul.b@mpiricsoftware.com Signed-off-by: Viacheslav Dubeyko <slava@dubeyko.com>
2026-03-18dt-bindings: remoteproc: qcom,sm8550-pas: Add Glymur CDSPSibi Sankar
Document compatible for Qualcomm Glymur CDSP PAS which is compatible with SM8550 SoC except for the one additional interrupt ("shutdown-ack"). Similar to the Qualcomm Kaanapali SoC, "global_sync_mem" is not managed by the kernel so it remains unlisted. Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260313120814.1312410-3-sibi.sankar@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18dt-bindings: remoteproc: qcom,sm8550-pas: Add Glymur ADSPSibi Sankar
Document compatible for Qualcomm Glymur ADSP PAS which is compatible with SM8750, which can fallback to SM8550 except for the one additional interrupt ("shutdown-ack"). Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260313120814.1312410-2-sibi.sankar@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18arm64: defconfig: Enable configs for Arduino VENTUNO QSrinivas Kandagatla
Enable ETHERNET PHY and Analog codec configs required for Arduino VENTUNO Q board. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260313103824.2634519-8-srinivas.kandagatla@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18Merge branch ↵Jakub Kicinski
'add-ethtool-coalesce_rx_cqe_frames-nsecs-and-use-it-in-mana-driver' Haiyang Zhang says: ==================== add ethtool COALESCE_RX_CQE_FRAMES/NSECS and use it in MANA driver Add two parameters for drivers supporting Rx CQE Coalescing. ETHTOOL_A_COALESCE_RX_CQE_FRAMES: Maximum number of frames that can be coalesced into a CQE or writeback. ETHTOOL_A_COALESCE_RX_CQE_NSECS: Max time in nanoseconds after the first packet arrival in a coalesced CQE or writeback to be sent. Also implement it in MANA driver with the new parameter and counters. ==================== Link: https://patch.msgid.link/20260317191826.1346111-1-haiyangz@linux.microsoft.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-03-18net: mana: Add ethtool counters for RX CQEs in coalesced typeHaiyang Zhang
For RX CQEs with type CQE_RX_COALESCED_4, to measure the coalescing efficiency, add counters to count how many contains 2, 3, 4 packets respectively. Also, add a counter for the error case of first packet with length == 0. Reviewed-by: Long Li <longli@microsoft.com> Signed-off-by: Haiyang Zhang <haiyangz@microsoft.com> Link: https://patch.msgid.link/20260317191826.1346111-4-haiyangz@linux.microsoft.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-03-18net: mana: Add support for RX CQE CoalescingHaiyang Zhang
Our NIC can have up to 4 RX packets on 1 CQE. To support this feature, check and process the type CQE_RX_COALESCED_4. The default setting is disabled, to avoid possible regression on latency. And, add ethtool handler to switch this feature. To turn it on, run: ethtool -C <nic> rx-cqe-frames 4 To turn it off: ethtool -C <nic> rx-cqe-frames 1 The rx-cqe-nsec is the time out value in nanoseconds after the first packet arrival in a coalesced CQE to be sent. It's read-only for this NIC. Reviewed-by: Long Li <longli@microsoft.com> Signed-off-by: Haiyang Zhang <haiyangz@microsoft.com> Link: https://patch.msgid.link/20260317191826.1346111-3-haiyangz@linux.microsoft.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-03-18net: ethtool: add ethtool COALESCE_RX_CQE_FRAMES/NSECSHaiyang Zhang
Add two parameters for drivers supporting Rx CQE coalescing / descriptor writeback. ETHTOOL_A_COALESCE_RX_CQE_FRAMES: Maximum number of frames that can be coalesced into a CQE or writeback. ETHTOOL_A_COALESCE_RX_CQE_NSECS: Max time in nanoseconds after the first packet arrival in a coalesced CQE or writeback to be sent. Signed-off-by: Haiyang Zhang <haiyangz@microsoft.com> Link: https://patch.msgid.link/20260317191826.1346111-2-haiyangz@linux.microsoft.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-03-18clk: qcom: videocc-sm8350: use depend on instead of selectPengyu Luo
Both sm8350 and sc8280xp use this, on sc8280xp, this would select gcc-sm8350, we don't neet it on sc8280xp. use depend on to fix it. Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com> Reviewed-by: Imran Shaik <imran.shaik@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260313111018.130068-1-mitltlatltl@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18soc: qcom: pd-mapper: Add Milos compatibleLuca Weiss
Add support for the Qualcomm Milos SoC to the protection domain mapper. Milos shares the same protection domain configuration as SM8550, so reuse the existing SM8550 domain data. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260116-milos-fp6-bt-wifi-v1-1-27b4fbb77e9c@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18arm64: defconfig: Enable Qualcomm Eliza basic resource providersAbel Vesa
Enable the interconnect, pinctrl and Global Clock Controller (GCC) providers as built-in, and the Top Control and Status Register (TCSR) clock provider as module, on the Qualcomm Eliza SoC. These are all necessary in order to be able to boot up Eliza-based MTP board with debug UART and rootfs on UFS storage. Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260316-arm64-defconfig-enable-eliza-basic-providers-v1-1-7ae581670aa8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18clk: qcom: gcc-ipq6018: mark gcc_xo_clk_src as criticalJohn Crispin
The XO clock source is always-on in hardware and cannot be gated. Without CLK_IS_CRITICAL, runtime PM of downstream consumers (such as the CMN PLL driver) cascades a disable up to gcc_xo_clk_src, causing a branch status timeout warning. The IPQ8074 GCC driver already marks this clock as CLK_IS_CRITICAL. Apply the same fix to IPQ6018. Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260311182147.30266-1-ansuelsmth@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18soc: qcom: pmic_glink_altmode: Fix TBT->SAFE->!TBT transitionKonrad Dybcio
Similar to the case of commit d48708500610 ("soc: qcom: pmic_glink_altmode: Fix SVID=DP && unconnected edge case"), leaving the TBT altmode makes pmic_glink_altmode report a SVID=TBT && mux_ctrl=0 message. Said commit reordered the check such that the SVID is processed before checking for NO_CONN. Rework this to take into account valid values of mux_ctrl first and hopefully solve this for good.. Fixes: d48708500610 ("soc: qcom: pmic_glink_altmode: Fix SVID=DP && unconnected edge case") Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260317-topic-tbt_pg_fixup-v1-1-325b8647bc82@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18net/mlx5e: Remove unused field in mlx5e_flow_steering structSaeed Mahameed
Not used in mlx5e, clean it up. Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Reviewed-by: Mark Bloch <mbloch@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Joe Damato <joe@dama.to> Link: https://patch.msgid.link/20260317104548.15697-1-tariqt@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-03-18selftests/vsock: auto-detect kernel for guest VMsBobby Eshleman
When running vmtest.sh inside a nested VM the running kernel may not be installed on the filesystem at the standard /boot/ or /usr/lib/modules/ paths. Previously, this would cause vng to fail with "does not exist" since it could not find the kernel image. Instead, this patch uses --dry-run to detect if the kernel is available. If not, then we fall back to the kernel in the kernel source tree. If that fails, then we die. This way runners, like NIPA, can use vng --run arch/x86/boot/bzImage to setup an outer VM, and vmtest.sh will still do the right thing setting up the inner VM. Due to job control issues in vng, a workaround is used to prevent 'make kselftest TARGETS=vsock' from hanging until test timeout. A PR has been placed upstream to solve the issue in vng: https://github.com/arighi/virtme-ng/pull/453 Signed-off-by: Bobby Eshleman <bobbyeshleman@meta.com> Link: https://patch.msgid.link/20260316-vsock-vmtest-autodetect-kernel-v2-1-5eec7b4831f8@meta.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-03-18Merge tag 'wireless-2026-03-18' of ↵Jakub Kicinski
https://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless Johannes Berg says: ==================== Just a few updates: - cfg80211: - guarantee pmsr work is cancelled - mac80211: - reject TDLS operations on non-TDLS stations - fix crash in AP_VLAN bandwidth change - fix leak or double-free on some TX preparation failures - remove keys needed for beacons _after_ stopping those - fix debugfs static branch race - avoid underflow in inactive time - fix another NULL dereference in mesh on invalid frames - ti/wlcore: avoid infinite realloc loop * tag 'wireless-2026-03-18' of https://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless: wifi: mac80211: always free skb on ieee80211_tx_prepare_skb() failure wifi: wlcore: Return -ENOMEM instead of -EAGAIN if there is not enough headroom wifi: mac80211: fix NULL deref in mesh_matches_local() wifi: mac80211: check tdls flag in ieee80211_tdls_oper wifi: cfg80211: cancel pmsr_free_wk in cfg80211_pmsr_wdev_down wifi: mac80211: Fix static_branch_dec() underflow for aql_disable. mac80211: fix crash in ieee80211_chan_bw_change for AP_VLAN stations wifi: mac80211: use jiffies_delta_to_msecs() for sta_info inactive times wifi: mac80211: remove keys after disabling beaconing wifi: mac80211_hwsim: fully initialise PMSR capabilities ==================== Link: https://patch.msgid.link/20260318172515.381148-3-johannes@sipsolutions.net Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-03-18clk: qcom: camcc-sc8180x: Refactor to use qcom_cc_driver_dataVal Packett
Use a qcom_cc_driver_data struct instead of a long custom probe callback to align with modern qcom/gcc-*.c style. No functional change intended. Signed-off-by: Val Packett <val@packett.cool> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260312112321.370983-12-val@packett.cool Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18clk: qcom: dispcc-sm8250: Enable parents for pixel clocksVal Packett
Add CLK_OPS_PARENT_ENABLE to MDSS pixel clock sources to ensure parent clocks are enabled during clock operations, preventing potential stability issues during display configuration. Fixes: 80a18f4a8567 ("clk: qcom: Add display clock controller driver for SM8150 and SM8250") Signed-off-by: Val Packett <val@packett.cool> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260312112321.370983-9-val@packett.cool Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18clk: qcom: dispcc-sm8250: Use shared ops on the mdss vsync clkVal Packett
mdss_gdsc can get stuck on boot due to RCGs being left on from last boot. As a fix, commit 01a0a6cc8cfd ("clk: qcom: Park shared RCGs upon registration") introduced a callback to ensure the RCG is off upon init. However, the fix depends on all shared RCGs being marked as such in code. For SM8150/SC8180X/SM8250 the MDSS vsync clock was using regular ops, unlike the same clock in the SC7180 code. This was causing display to frequently fail to initialize after rebooting on the Surface Pro X. Fix by using shared ops for this clock. Fixes: 80a18f4a8567 ("clk: qcom: Add display clock controller driver for SM8150 and SM8250") Signed-off-by: Val Packett <val@packett.cool> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260312112321.370983-8-val@packett.cool Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18clk: qcom: gcc-sc8180x: Refactor to use qcom_cc_driver_dataVal Packett
Use a qcom_cc_driver_data struct instead of a long custom probe callback to align with modern qcom/gcc-*.c style. No functional change intended. Signed-off-by: Val Packett <val@packett.cool> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260312112321.370983-7-val@packett.cool Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18clk: qcom: gcc-sc8180x: Enable runtime PM supportVal Packett
The GCC block on SC8180X is powered by the CX rail. We need to ensure that it's enabled to prevent unwanted power collapse. Enable runtime PM to keep the power flowing only when necessary. Signed-off-by: Val Packett <val@packett.cool> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260312112321.370983-6-val@packett.cool Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18clk: qcom: gcc-sc8180x: Use retention for PCIe power domainsVal Packett
As the PCIe host controller driver does not yet support dealing with the loss of state during suspend, use retention for relevant GDSCs. This fixes the link not surviving upon resume: nvme 0002:01:00.0: Unable to change power state from D3cold to D0, device inaccessible nvme nvme0: controller is down; will reset: CSTS=0xffffffff, PCI_STATUS read failed (134) nvme 0002:01:00.0: Unable to change power state from D3cold to D0, device inaccessible nvme nvme0: Disabling device after reset failure: -19 Fixes: 4433594bbe5d ("clk: qcom: gcc: Add global clock controller driver for SC8180x") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Val Packett <val@packett.cool> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Link: https://lore.kernel.org/r/20260312112321.370983-5-val@packett.cool Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18clk: qcom: gcc-sc8180x: Use retention for USB power domainsVal Packett
The USB subsystem does not expect to lose its state on suspend: xhci-hcd xhci-hcd.0.auto: xHC error in resume, USBSTS 0x401, Reinit usb usb1: root hub lost power or was reset (The reinitialization usually succeeds, but it does slow down resume.) To maintain state during suspend, the relevant GDSCs need to stay in retention mode, like they do on other similar SoCs. Change the mode to PWRSTS_RET_ON to fix. Fixes: 4433594bbe5d ("clk: qcom: gcc: Add global clock controller driver for SC8180x") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Val Packett <val@packett.cool> Link: https://lore.kernel.org/r/20260312112321.370983-4-val@packett.cool Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18clk: qcom: gcc-sc8180x: Add missing GDSCsVal Packett
There are 5 more GDSCs that we were ignoring and not putting to sleep, which are listed in downstream DTS. Add them. Fixes: 4433594bbe5d ("clk: qcom: gcc: Add global clock controller driver for SC8180x") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Val Packett <val@packett.cool> Link: https://lore.kernel.org/r/20260312112321.370983-3-val@packett.cool Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18dt-bindings: clock: qcom,gcc-sc8180x: Add missing GDSCsVal Packett
There are 5 more GDSCs that we were ignoring and not putting to sleep, which are listed in downstream DTS. Add them. Signed-off-by: Val Packett <val@packett.cool> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260312112321.370983-2-val@packett.cool Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18Merge branch 'mlx5-next' of ↵Jakub Kicinski
git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux Tariq Toukan says: ==================== mlx5-next updates 2026-03-17 The following pull-request contains common mlx5 updates * 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux: net/mlx5: Expose MLX5_UMR_ALIGN definition {net/RDMA}/mlx5: Add LAG demux table API and vport demux rules net/mlx5: Add VHCA RX flow destination support for FW steering net/mlx5: LAG, replace mlx5_get_dev_index with LAG sequence number net/mlx5: E-switch, modify peer miss rule index to vhca_id net/mlx5: LAG, use xa_alloc to manage LAG device indices net/mlx5: LAG, replace pf array with xarray net/mlx5: Add silent mode set/query and VHCA RX IFC bits net/mlx5: Add IFC bits for shared headroom pool PBMC support net/mlx5: Expose TLP emulation capabilities net/mlx5: Add TLP emulation device capabilities ==================== Link: https://patch.msgid.link/20260317075844.12066-1-tariqt@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-03-18qed: Reimplement qed_mcast_bin_from_mac() using library functionsEric Biggers
The calculation done by qed_calc_crc32c() is the standard least-significant-bit-first CRC-32C except it uses most-significant-bit-first order for the actual CRC variable. That is equivalent to bit-reflecting the input and output CRC. Replace it with equivalent calls to the corresponding library functions. Tested with a simple userspace program which tested that the old and new implementations of qed_mcast_bin_from_mac() produce the same outputs. Signed-off-by: Eric Biggers <ebiggers@kernel.org> Link: https://patch.msgid.link/20260316221453.66078-1-ebiggers@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-03-18Merge branch 'net-mlx5-support-ptm-on-arm-architecture'Jakub Kicinski
Tariq Toukan says: ==================== net/mlx5: Support PTM on ARM architecture This series by Carolina refactors mlx5 crosststamp initialization and enables cross-timestamp support on ARM. ==================== Link: https://patch.msgid.link/20260316133607.8738-1-tariqt@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-03-18net/mlx5: Support cross-timestamping on ARM architecturesCarolina Jubran
Extend cross-timestamp support for ARM systems that implement the ARM architected timer. Signed-off-by: Carolina Jubran <cjubran@nvidia.com> Reviewed-by: Shahar Shitrit <shshitrit@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20260316133607.8738-3-tariqt@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-03-18net/mlx5: Move crosststamp setup into helper functionCarolina Jubran
Move the crosststamp registration logic into a dedicated helper, mlx5_init_crosststamp(). This prepares the code for a follow-up patch around PTM handling. Signed-off-by: Carolina Jubran <cjubran@nvidia.com> Reviewed-by: Shahar Shitrit <shshitrit@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20260316133607.8738-2-tariqt@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-03-18arm64: defconfig: Enable S5KJN1 camera sensorLuca Weiss
Enable the S5KJN1 driver which is used for the front camera on the Fairphone 5 smartphone. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260313-fp5-s5kjn1-v1-3-fa4f1c727318@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18dt-bindings: firmware: qcom,scm: Document ipq5210 SCMKathiravan Thirumoorthy
Document the scm compatible for ipq5210 SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260318-ipq5210_boot_to_shell-v2-4-a87e27c37070@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18clk: qcom: add Global Clock controller (GCC) driver for IPQ5210 SoCKathiravan Thirumoorthy
Add support for the global clock controller found on IPQ5210 SoC. Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260318-ipq5210_boot_to_shell-v2-2-a87e27c37070@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18Merge branch ↵Bjorn Andersson
'20260318-ipq5210_boot_to_shell-v2-1-a87e27c37070@oss.qualcomm.com' into clk-for-7.1 Merge the IPQ5210 Global clock controller binding through a topic branch, to allow the constants to also be merged into the DeviceTree branch.
2026-03-18dt-bindings: clock: add Qualcomm IPQ5210 GCCKathiravan Thirumoorthy
Add binding for the Qualcomm IPQ5210 Global Clock Controller. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260318-ipq5210_boot_to_shell-v2-1-a87e27c37070@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18clk: qcom: eliza: Cleanup redundant header includesKrzysztof Kozlowski
Remove unused header includes - drivers do not use any OF API. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260318-clk-qcom-headers-v1-5-d5c6a3b11b67@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18clk: qcom: milos: Cleanup redundant header includesKrzysztof Kozlowski
Remove unused header includes - drivers do not use any clk, OF or PTR_ERR API, but they need declaration of of_device_id table. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260318-clk-qcom-headers-v1-4-d5c6a3b11b67@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18clk: qcom: sm8750: Cleanup redundant header includesKrzysztof Kozlowski
Remove unused header includes - drivers do not use any OF or runtime PM API, but they need declaration of of_device_id table. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260318-clk-qcom-headers-v1-3-d5c6a3b11b67@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18clk: qcom: glymur: Cleanup redundant header includesKrzysztof Kozlowski
Remove unused header includes - drivers do not use any OF or runtime PM API. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260318-clk-qcom-headers-v1-2-d5c6a3b11b67@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18clk: qcom: kaanapali: Cleanup redundant header includesKrzysztof Kozlowski
Remove unused header includes - drivers do not use any OF or runtime PM API. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260318-clk-qcom-headers-v1-1-d5c6a3b11b67@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-18soc: qcom: socinfo: Add PM7550BA PMICAbel Vesa
Add the PM7550BA to the pmic_models array. It is one of the PMICs used by the Eliza MTP platform. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260318-qcom-socinfo-add-pm8550ba-v2-1-2f9171af0465@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit v1.2.3 (git 2.25.1) at 2026-09-17 00:55:21 +0000