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2025-12-19drm/i915/dp: Fail state computation for invalid max throughput BPP valueImre Deak
There is no reason to accept a minimum/maximum link BPP value above the maximum throughput BPP value, fail the state computation in this case. Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20251215192357.172201-15-imre.deak@intel.com
2025-12-19drm/i915/dp: Fail state computation for invalid min/max link BPP valuesImre Deak
Make sure that state computation fails if the minimum/maximum link BPP values got invalid as a result of limiting both of these values separately to the corresponding source/sink capability limits. Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20251215192357.172201-14-imre.deak@intel.com
2025-12-19drm/i915/dp: Account with pipe joiner max compressed BPP limit for DP-MST ↵Imre Deak
and eDP The pipe joiner maximum compressed BPP must be limited based on the pipe joiner memory size and BW, do that for all DP outputs by adjusting the max compressed BPP value already in intel_dp_compute_config_link_bpp_limits() (which is used by all output types). This way the BPP doesn't need to be adjusted in dsc_compute_compressed_bpp() (called for DP-SST after the above limits were computed already), so remove the adjustment from there. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20251215192357.172201-13-imre.deak@intel.com
2025-12-19drm/i915/dp: Account with DSC BW overhead for compressed DP-SST stream BWImre Deak
A DSC compressed stream requires FEC (except for eDP), which has a BW overhead on non-UHBR links that must be accounted for explicitly. Do that during computing the required BW. Note that the overhead doesn't need to be accounted for on UHBR links where FEC is always enabled and so the corresponding overhead is part of the channel coding efficiency instead (i.e. the overhead is part of the available vs. the required BW). Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20251215192357.172201-12-imre.deak@intel.com
2025-12-19drm/i915/dp: Account with MST, SSC BW overhead for uncompressed DP-MST stream BWImre Deak
On MST links the symbol alignment and SSC have a BW overhead, which should be accounted for when calculating the required stream BW, do so during mode validation for an uncompressed stream. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20251215192357.172201-11-imre.deak@intel.com
2025-12-19drm/i915/dp: Use the effective data rate for DP compressed BW calculationImre Deak
Use intel_dp_effective_data_rate() to calculate the required link BW for compressed streams on non-UHBR DP-SST links. This ensures that the BW is calculated the same way for all DP output types and DSC/non-DSC modes, during mode validation as well as during state computation. This approach also allows for accounting with BW overhead due to DSC, FEC being enabled on a link. Acounting for these will be added by follow-up changes. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20251215192357.172201-10-imre.deak@intel.com
2025-12-19drm/i915/dp: Use the effective data rate for DP BW calculationImre Deak
Use intel_dp_effective_data_rate() to calculate the required link BW for eDP, DP-SST and MST links. This ensures that the BW is calculated the same way for all DP output types, during mode validation as well as during state computation. This approach also allows for accounting with BW overheads due to the SSC, DSC, FEC being enabled on a link, as well as due to the MST symbol alignment on the link. Accounting for these overheads will be added by follow-up changes. This way also computes the stream BW on a UHBR link correctly, using the corresponding symbol size to effective data size ratio (i.e. ~97% link BW utilization for UHBR vs. only ~80% for non-UHBR). Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20251215192357.172201-9-imre.deak@intel.com
2025-12-19drm/i915/dp: Fix BW check in is_bw_sufficient_for_dsc_config()Imre Deak
is_bw_sufficient_for_dsc_config() should return true if the required BW equals the available BW, make it so. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20251215192357.172201-8-imre.deak@intel.com
2025-12-19drm/i915/dp: Factor out intel_dp_link_bw_overhead()Imre Deak
Factor out intel_dp_link_bw_overhead(), used later for BW calculation during DP SST mode validation and state computation. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20251215192357.172201-7-imre.deak@intel.com
2025-12-19drm/i915/dp: Use a mode's crtc_clock vs. clock during state computationImre Deak
The encoder state computation should use the drm_display_mode::crtc_clock member, instead of the clock member, the former one possibly having a necessary adjustment wrt. to the latter due to driver specific constraints. In practice the two values should not differ at spots changed in this patch, since only MSO and 3D modes would make them different, neither MSO or 3D relevant here, but still use the expected crtc_clock version for consistency. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20251215192357.172201-6-imre.deak@intel.com
2025-12-19drm/i915/dp: Return a fixed point BPP value from intel_dp_output_bpp()Imre Deak
Convert intel_dp_output_bpp() and intel_dp_mode_min_output_bpp() to return an x16 fixed point bpp value, as this value will be always the link BPP (either compressed or uncompressed) tracked in the same x16 fixed point format. While at it rename intel_dp_output_bpp() to intel_dp_output_format_link_bpp_x16() and intel_dp_mode_min_output_bpp() to intel_dp_mode_min_link_bpp_x16() to better reflect that these functions return an x16 link BPP value specific to a particular output format or mode. Also rename intel_dp_output_bpp()'s bpp parameter to pipe_bpp, to clarify which kind of (pipe vs. link) BPP the parameter is. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20251215192357.172201-5-imre.deak@intel.com
2025-12-19drm/i915/dp: Fix DSC sink's slice count capability checkImre Deak
A DSC sink supporting DSC slice count N, not necessarily supports slice counts less than N. Hence the driver should check the sink's support for a particular slice count before using that slice count, fix intel_dp_dsc_get_slice_count() accordingly. Cc: dri-devel@lists.freedesktop.org Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20251215192357.172201-4-imre.deak@intel.com
2025-12-19drm/dp: Add drm_dp_dsc_sink_slice_count_mask()Imre Deak
A DSC sink supporting DSC slice count N, not necessarily supports slice counts less than N. Hence the driver should check the sink's support for a particular slice count before using that slice count. Add the helper functions required for this. Cc: dri-devel@lists.freedesktop.org Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20251215192357.172201-3-imre.deak@intel.com
2025-12-19drm/dp: Parse all DSC slice count caps for eDP 1.5Imre Deak
eDP 1.5 supports all the slice counts reported via DP_DSC_SLICE_CAP_1, so adjust drm_dp_dsc_sink_max_slice_count() accordingly. Cc: dri-devel@lists.freedesktop.org Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20251215192357.172201-2-imre.deak@intel.com
2025-12-19riscv: dts: spacemit: Define the P1 PMIC regulators for Milk-V JupiterJavier Martinez Canillas
Define the SpacemiT P1 PMIC voltage regulators and their constraints. The power management hardware design on the Milk-V Jupiter is identical to the Banana Pi BPI-F3, so the DT Nodes were taken from k1-bananapi-f3.dts. Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20251206134532.1741648-4-javierm@redhat.com Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-12-19riscv: dts: spacemit: Define fixed regulators for Milk-V JupiterJavier Martinez Canillas
Define the DC power input and the 4v power as fixed regulator supplies. Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20251206134532.1741648-3-javierm@redhat.com Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-12-19riscv: dts: spacemit: Enable i2c8 adapter for Milk-V JupiterJavier Martinez Canillas
The adapter is used to access the SpacemiT P1 PMIC present in this board. Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20251206134532.1741648-2-javierm@redhat.com Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-12-19doc : fix a broken link in ext2.rstZiran Zhang
The original link returns a 404, so I update it to the latest accessible url. No functional change to any code, only documentation updates. Signed-off-by: Ziran Zhang <zhangcoder@yeah.net> Link: https://patch.msgid.link/20251217061737.6079-1-zhangcoder@yeah.net Signed-off-by: Jan Kara <jack@suse.cz>
2025-12-19ASoC: Intel: mtl-match: Add 6-amp matches for CS35L56Mark Brown
Merge series from Richard Fitzgerald <rf@opensource.cirrus.com>: These two commits add support for 6 amps with feedback, primarily for the CDB35L56-EIGHT-C and CDB35L63-CB8 and similar hardware.
2025-12-19ASoC: fsl_easrc: Fix duplicate debufs entriesMark Brown
Merge series from Alexander Stein <alexander.stein@ew.tq-group.com>: this series fixes the error regarding duplicate debugfs directory creation on TQMa8MPxL (imx8mp) when easrc is enabled: debugfs: '30c90000.easrc' already exists in 'tqm-tlv320aic32' This is caused because fsl_easrc adds two components which use the device name as component name. Debugfs directories for each component is created, resulting on name conflict. Fix this by adding the debugfs_prefix for both component drivers. Before: $ ls /sys/kernel/debug/asoc/tqm-tlv320aic32/ 30c30000.sai 30c90000.easrc HiFi-ASRC-FE dapm dapm_pop_time dma:30c30000.sai tlv320aic32x4.1-0018 After: $ ls /sys/kernel/debug/asoc/tqm-tlv320aic32/ 30c30000.sai HiFi-ASRC-FE asrc:30c90000.easrc dapm dapm_pop_time dma:30c30000.sai easrc:30c90000.easrc tlv320aic32x4.1-0018
2025-12-19ASoC: Intel: add support for TAS2563 amplifierMark Brown
Merge series from Bard Liao <yung-chuan.liao@linux.intel.com>: Add support for TAS2563 amplifier on Intel platforms.
2025-12-19ASoC: codecs: ES8326 : Add KcontrolMark Brown
Merge series from Zhang Yi <zhangyi@everest-semi.com>: Add some Kcontrols for ES8326
2025-12-19ASoC: SOF: ipoc4: Support for generic bytesMark Brown
Merge series from Peter Ujfalusi <peter.ujfalusi@linux.intel.com>: We support bytes control type for set and get, but these are module specific controls and there is no way to handle notifications from them in a generic way. Each control have module specific param_id and this param_id is only valid in the module's scope, other modules might use the same id for different functions for example. This series will add a new generic control type, similar to the existing ones for ENUM and SWITCH, which can be used to create bytes controls which can send notifications from firmware on change. The new param_id is 202 and the sof_ipc4_control_msg_payload is updated to describe bytes payload also. On set, the payload must include the sof_ipc4_control_msg_payload struct with the control's ID and data size, followed by the data. On get, the kernel needs to send the sof_ipc4_control_msg_payload struct along with the LARGE_CONFIG_GET message as payload with the ID of the control that needs to be retrieved. The raw data is received back without additional header. A notification might contain data, in this case the num_elems reflects the size in bytes, or without data. If no data is received then the control is marked as dirty and on read the kernel will refresh the data from firmware. The series includes mandatory fixes for existing code and adds support for sending payload with LARGE_CONFIG_GET when the param_id is either generic ENUM, SWITCH or BYTES control.
2025-12-19parisc: Set valid bit in high byte of 64‑bit physical addressLeon Romanovsky
On 32‑bit systems, phys_addr_t is defined as u32. However, parisc expects physical addresses to be 64‑bit values so it can store a validity bit in the upper byte. Resolve this mismatch by casting the physical address to unsigned long, ensuring it is treated as a 64‑bit value where required. This fixes the failure to start block device drivers on the C3700 platform, as reported by Guenter. QEMU command line to reproduce the issue (with Debian SID as rootfs): qemu-system-hppa -machine C3700 \ -kernel arch/parisc/boot/bzImage \ -append "console=ttyS0 \ root=/dev/sda rw rootwait panic=-1" \ -nographic \ -device lsi53c895a \ -drive file=rootfs-hppa.img,if=none,format=raw,id=hd0 \ -device scsi-hd,drive=hd0 Fixes: 96ddf2ef58ec ("parisc: Convert DMA map_page to map_phys interface") Reported-by: Guenter Roeck <linux@roeck-us.net> Closes: https://lore.kernel.org/all/b184f1bf-96dc-4546-8512-9cba5ecb58f7@roeck-us.net/ Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Tested-by: Guenter Roeck <linux@roeck-us.net> [mszyprow: dropped the lpa() macro removal] Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20251218-fix-parisc-conversion-v1-1-4a04d26b0168@nvidia.com
2025-12-19drm/panthor: Support partial unmaps of huge pagesAdrián Larumbe
Commit 33729a5fc0ca ("iommu/io-pgtable-arm: Remove split on unmap behavior") did away with the treatment of partial unmaps of huge IOPTEs. In the case of Panthor, that means an attempt to run a VM_BIND unmap operation on a memory region whose start address and size aren't 2MiB aligned, in the event it intersects with a huge page, would lead to ARM IOMMU management code to fail and a warning being raised. Presently, and for lack of a better alternative, it's best to have Panthor handle partial unmaps at the driver level, by unmapping entire huge pages and remapping the difference between them and the requested unmap region. This could change in the future when the VM_BIND uAPI is expanded to enforce huge page alignment and map/unmap operational constraints that render this code unnecessary. When a partial unmap for a huge PTE is attempted, we also need to expand the locked region to encompass whole huge pages. Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Steven Price <steven.price@arm.com> Link: https://patch.msgid.link/20251217213252.677020-2-adrian.larumbe@collabora.com Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
2025-12-19dt-bindings: arm: add CTCU device for monacoJie Gan
The CTCU device for monaco shares the same configurations as SA8775p. Add a fallback to enable the CTCU for monaco to utilize the compitable of the SA8775p. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251103-enable-ctcu-for-monaco-v4-1-92ff83201584@oss.qualcomm.com
2025-12-19spi: stm32: stability & performance enhancementsMark Brown
Merge series from Alain Volmat <alain.volmat@foss.st.com>: The series fixes a stability issue when dealing with <8bpw transfers, as well as enforce an error if the DMA information provided within the DT are incorrect. Performance enhancement is also provided by allowing a polling mode which is triggered when the transfer is so short that polling mode transfer would lead to faster transfer than if it was done in a interrupt driven manner.
2025-12-19HID: Intel-thc-hid: Intel-thc: Fix wrong register readingEven Xu
Correct the read register for the setting of max input size and interrupt delay. Fixes: 22da60f0304b ("HID: Intel-thc-hid: Intel-thc: Introduce interrupt delay control") Fixes: 45e92a093099 ("HID: Intel-thc-hid: Intel-thc: Introduce max input size control") Signed-off-by: Even Xu <even.xu@intel.com> Signed-off-by: Benjamin Tissoires <bentiss@kernel.org>
2025-12-19HID: multitouch: add MT_QUIRK_STICKY_FINGERS to MT_CLS_VTLDaytonCL
Some VTL-class touchpads (e.g. TOPS0102:00 35CC:0104) intermittently fail to release a finger contact. A previous slot remains logically active, accompanied by stale BTN_TOOL_DOUBLETAP state, causing gestures to stay latched and resulting in stuck two-finger scrolling and false right-clicks. Apply MT_QUIRK_STICKY_FINGERS to handle the unreleased contact correctly. Link: https://gitlab.freedesktop.org/libinput/libinput/-/issues/1225 Suggested-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> Tested-by: DaytonCL <artem749507@gmail.com> Signed-off-by: DaytonCL <artem749507@gmail.com> Signed-off-by: Benjamin Tissoires <bentiss@kernel.org>
2025-12-19HID: intel-ish-hid: Reset enum_devices_done before enumerationZhang Lixu
Some systems have enabled ISH without any sensors. In this case sending HOSTIF_DM_ENUM_DEVICES results in 0 sensors. This triggers ISH hardware reset on subsequent enumeration after S3/S4 resume. The enum_devices_done flag was not reset before sending the HOSTIF_DM_ENUM_DEVICES command. On subsequent enumeration calls (such as after S3/S4 resume), this flag retains its previous true value, causing the wait loop to be skipped and returning prematurely to hid_ishtp_cl_init(). If 0 HID devices are found, hid_ishtp_cl_init() skips getting HID device descriptors and sets init_done to true. When the delayed enumeration response arrives with init_done already true, the driver treats it as a bad packet and triggers an ISH hardware reset. Set enum_devices_done to false before sending the enumeration command, consistent with similar functions like ishtp_get_hid_descriptor() and ishtp_get_report_descriptor() which reset their respective flags. Signed-off-by: Zhang Lixu <lixu.zhang@intel.com> Acked-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Benjamin Tissoires <bentiss@kernel.org>
2025-12-19HID: intel-ish-hid: Update ishtp bus match to support device ID tableZhang Lixu
The ishtp_cl_bus_match() function previously only checked the first entry in the driver's device ID table. Update it to iterate over the entire table, allowing proper matching for drivers with multiple supported protocol GUIDs. Signed-off-by: Zhang Lixu <lixu.zhang@intel.com> Acked-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Benjamin Tissoires <bentiss@kernel.org>
2025-12-19HID: Intel-thc-hid: Intel-thc: fix dma_unmap_sg() nents valueThomas Fourier
The `dma_unmap_sg()` functions should be called with the same nents as the `dma_map_sg()`, not the value the map function returned. Save the number of entries in struct thc_dma_configuration. Fixes: a688404b2e20 ("HID: intel-thc-hid: intel-thc: Add THC DMA interfaces") Signed-off-by: Thomas Fourier <fourier.thomas@gmail.com> Reviewed-by: Even Xu <even.xu@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Benjamin Tissoires <bentiss@kernel.org>
2025-12-19HID: playstation: Center initial joystick axes to prevent spurious eventsSiarhei Vishniakou
When a new PlayStation gamepad (DualShock 4 or DualSense) is initialized, the input subsystem sets the default value for its absolute axes (e.g., ABS_X, ABS_Y) to 0. However, the hardware's actual neutral/resting state for these joysticks is 128 (0x80). This creates a mismatch. When the first HID report arrives from the device, the driver sees the resting value of 128. The kernel compares this to its initial state of 0 and incorrectly interprets this as a delta (0 -> 128). Consequently, it generates EV_ABS events for this initial, non-existent movement. This behavior can fail userspace 'sanity check' tests (e.g., in Android CTS) that correctly assert no motion events should be generated from a device that is already at rest. This patch fixes the issue by explicitly setting the initial value of the main joystick axes (e.g., ABS_X, ABS_Y, ABS_RX, ABS_RY) to 128 (0x80) in the common ps_gamepad_create() function. This aligns the kernel's initial state with the hardware's expected neutral state, ensuring that the first report (at 128) produces no delta and thus, no spurious event. Signed-off-by: Siarhei Vishniakou <svv@google.com> Reviewed-by: Benjamin Tissoires <bentiss@kernel.org> Signed-off-by: Benjamin Tissoires <bentiss@kernel.org>
2025-12-19drm/panthor: Evict groups before VM terminationKetil Johnsen
Ensure all related groups are evicted and suspended before VM destruction takes place. This fixes an issue where panthor_vm_destroy() destroys and unmaps the heap context while there are still on slot groups using this. The FW will do a write out to the heap context when a CSG (group) is suspended, so a premature unmap of the heap context will cause a GPU page fault. This page fault is quite harmless, and do not affect the continued operation of the GPU. Fixes: 647810ec2476 ("drm/panthor: Add the MMU/VM logical block") Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Ketil Johnsen <ketil.johnsen@arm.com> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com> Reviewed-by: Steven Price <steven.price@arm.com> Link: https://patch.msgid.link/20251219093546.1227697-1-ketil.johnsen@arm.com Co-developed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
2025-12-19Merge drm/drm-next into drm-xe-nextThomas Hellström
Backmerging to bring in 6.19-rc1. An important upstream bugfix and to help unblock PTL CI. Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
2025-12-19HID: usbhid: paper over wrong bNumDescriptor fieldBenjamin Tissoires
Some faulty devices (ZWO EFWmini) have a wrong optional HID class descriptor count compared to the provided length. Given that we plainly ignore those optional descriptor, we can attempt to fix the provided number so we do not lock out those devices. Signed-off-by: Benjamin Tissoires <bentiss@kernel.org>
2025-12-19amd/iommu: Make protection domain ID functions non-staticSairaj Kodilkar
So that both iommu.c and init.c can utilize them. Also define a new function 'pdom_id_destroy()' to destroy 'pdom_ids' instead of directly calling ida functions. Signed-off-by: Sairaj Kodilkar <sarunkod@amd.com> Reviewed-by: Vasant Hegde <vasant.hegde@amd.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2025-12-19amd/iommu: Preserve domain ids inside the kdump kernelSairaj Kodilkar
Currently AMD IOMMU driver does not reserve domain ids programmed in the DTE while reusing the device table inside kdump kernel. This can cause reallocation of these domain ids for newer domains that are created by the kdump kernel, which can lead to potential IO_PAGE_FAULTs Hence reserve these ids inside pdom_ids. Fixes: 38e5f33ee359 ("iommu/amd: Reuse device table for kdump") Signed-off-by: Sairaj Kodilkar <sarunkod@amd.com> Reported-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Vasant Hegde <vasant.hegde@amd.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2025-12-19PCI: dwc: Skip PME_Turn_Off broadcast and L2/L3 transition during suspend if ↵Manivannan Sadhasivam
link is not up During system suspend, if the PCIe link is not up, then there is no need to broadcast PME_Turn_Off message and wait for L2/L3 transition. So skip them. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Tested-by: Vincent Guittot <vincent.guittot@linaro.org> Reviewed-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Link: https://patch.msgid.link/20251218-pci-dwc-suspend-rework-v2-1-5a7778c6094a@oss.qualcomm.com
2025-12-19drm/i915/colorop: do not include headers from headersJani Nikula
drm_colorop.h doesn't need the intel_display_types.h include for anything. Don't include headers from headers if it can be avoided. Fixes: 3e9b06559aa1 ("drm/i915: Add intel_color_op") Cc: Suraj Kandpal <suraj.kandpal@intel.com> Cc: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Cc: Uma Shankar <uma.shankar@intel.com> Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Link: https://patch.msgid.link/20251218141807.409751-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-12-19MAINTAINERS: Add interconnect-clk.h to interconnect API entryKuan-Wei Chiu
Commit 0ac2a08f42ce ("interconnect: add clk-based icc provider support") introduced include/linux/interconnect-clk.h but missed adding it to MAINTAINERS. Since the corresponding implementation drivers/interconnect/icc-clk.c is already covered by the drivers/interconnect/ directory entry, the header file should be listed as well. Fixes: 0ac2a08f42ce ("interconnect: add clk-based icc provider support") Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com> Link: https://lore.kernel.org/r/20251210181418.2123323-1-visitorckw@gmail.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-12-19dt-bindings: interconnect: qcom,sa8775p-rpmh: Fix incorrectly added reg and ↵Krzysztof Kozlowski
clocks Commit 8a55fbe4c94d ("dt-bindings: interconnect: add reg and clocks properties to enable QoS on sa8775p") claims that all interconnects have clocks and MMIO address space, but that is just not true. Only few have. Bindings should restrict properties and should not allow specifying non-existing hardware description, so fix missing constraints for 'reg' and 'clocks'. Fixes: 8a55fbe4c94d ("dt-bindings: interconnect: add reg and clocks properties to enable QoS on sa8775p") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20251129094612.16838-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-12-19regulator: Add rt8092 supportChiYuan Huang
RT8092 is a 3MHz 4A efficiency step-down converter with I2C control interface. It can support wide output range from 0.7 to 5.5V, based on the voltage bank selection. Signed-off-by: ChiYuan Huang <cy_huang@richtek.com> Link: https://patch.msgid.link/d2293c513f396f86e54f9b806fd0195b57db7aae.1766125676.git.cy_huang@richtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-19regulator: dt-bindings: rt5739: Add compatible for rt8092ChiYuan Huang
Append rt8092 compatible in rt5739 document. Compared to rt5739, RT8092 can offer up to 4A output current. Signed-off-by: ChiYuan Huang <cy_huang@richtek.com> Link: https://patch.msgid.link/9b67b2d2b4268d356f41ae2d0c3202e7813ea6b1.1766125676.git.cy_huang@richtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-12-19sched/fair: Fix sched_avg foldPeter Zijlstra
After the robot reported a regression wrt commit: 089d84203ad4 ("sched/fair: Fold the sched_avg update"), Shrikanth noted that two spots missed a factor se_weight(). Fixes: 089d84203ad4 ("sched/fair: Fold the sched_avg update") Reported-by: kernel test robot <oliver.sang@intel.com> Closes: https://lore.kernel.org/oe-lkp/202512181208.753b9f6e-lkp@intel.com Debugged-by: Shrikanth Hegde <sshegde@linux.ibm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20251218102020.GO3707891@noisy.programming.kicks-ass.net
2025-12-19perf: Use EXPORT_SYMBOL_FOR_KVM() for the mediated APIsPeter Zijlstra
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20251208115156.GE3707891@noisy.programming.kicks-ass.net
2025-12-19riscv: Add SBI debug trigger extension and function idsHimanshu Chauhan
Debug trigger extension is an SBI extension to support native debugging in S-mode and VS-mode. This patch adds the extension and the function IDs defined by the extension. Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Link: https://patch.msgid.link/20250710125231.653967-2-hchauhan@ventanamicro.com [pjw@kernel.org: updated to apply] Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-12-19riscv/atomic.h: use RISCV_FULL_BARRIER in _arch_atomic* function.Zongmin Zhou
Replace the same code with the pre-defined macro RISCV_FULL_BARRIER to simplify the code. Signed-off-by: Zongmin Zhou <zhouzongmin@kylinos.cn> Link: https://patch.msgid.link/20251120095831.64211-1-min_halo@163.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-12-19riscv: hwprobe: export Zilsd and Zclsd ISA extensionsPincheng Wang
Export Zilsd and Zclsd ISA extensions through hwprobe. Signed-off-by: Pincheng Wang <pincheng.plct@isrc.iscas.ac.cn> Reviewed-by: Nutty Liu <nutty.liu@hotmail.com> Link: https://patch.msgid.link/20250826162939.1494021-4-pincheng.plct@isrc.iscas.ac.cn [pjw@kernel.org: fixed whitespace; updated to apply] Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-12-19riscv: add ISA extension parsing for Zilsd and ZclsdPincheng Wang
Add parsing for Zilsd and Zclsd ISA extensions which were ratified in commit f88abf1 ("Integrating load/store pair for RV32 with the main manual") of the riscv-isa-manual. Signed-off-by: Pincheng Wang <pincheng.plct@isrc.iscas.ac.cn> Reviewed-by: Nutty Liu <nutty.liu@hotmail.com> Link: https://patch.msgid.link/20250826162939.1494021-3-pincheng.plct@isrc.iscas.ac.cn [pjw@kernel.org: cleaned up checkpatch issues, whitespace; updated to apply] Signed-off-by: Paul Walmsley <pjw@kernel.org>