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2025-12-23MAINTAINERS: add ABI headers to KHO and LIVE UPDATEPratyush Yadav
include/linux/kho is supposed to hold KHO headers. Add it to KHO's MAINTAINERS entry so the right people can get patches to it. include/linux/kho/abi contains the live update ABI headers for LUO core and memfd. It will also hold ABI headers for other upcoming file types as well. Add it to live update entry so live update maintainers can get changes for it (currently they happen to be the same people). Link: https://lkml.kernel.org/r/20251212071204.398788-1-pratyush@kernel.org Signed-off-by: Pratyush Yadav <pratyush@kernel.org> Reviewed-by: Pasha Tatashin <pasha.tatashin@soleen.com> Cc: Alexander Graf <graf@amazon.com> Cc: Mike Rapoport <rppt@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-12-23.mailmap: remove one of the entries for WangYuliWangYuli
Since commit 01ef0296d2eb (".mailmap: add entry for WangYuli") was merged into mainline, I've received feedback from former colleagues: They believe the change to .mailmap affects git log based statistics, which in turn reduces the reported “contributions from uniontech” in the Linux commit tree, and they think it's difficult to explain to everyone that future statistics must be generated with the --no-use-mailmap option. I don't have a strong opinion either way, but since my commit has caused them trouble, I'm now requesting that this line be removed to bring a little more LOVE AND PEACE to the world :-) Link: https://lkml.kernel.org/r/20251208025730.33881-1-wangyuli@aosc.io Signed-off-by: WangYuli <wangyl5933@chinaunicom.cn> Cc: Carlos Bilbao <carlos.bilbao@kernel.org> Cc: Hans Verkuil <hverkuil@kernel.org> Cc: Martin Kepplinger <martink@posteo.de> Cc: Shannon Nelson <sln@onemain.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-12-23mm/damon/vaddr: fix missing pte_unmap_unlock in damos_va_migrate_pmd_entry()Akinobu Mita
If the PTE page table lock is acquired by pte_offset_map_lock(), the lock must be released via pte_unmap_unlock(). However, in damos_va_migrate_pmd_entry(), if damos_va_filter_out() returns true, it immediately returns without releasing the lock. This fixes the issue by not stopping page table traversal when damos_va_filter_out() returns true and ensuring that the lock is released. Link: https://lkml.kernel.org/r/20251209151034.77221-1-akinobu.mita@gmail.com Fixes: 09efc56a3b1c ("mm/damon/vaddr: consistently use only pmd_entry for damos_migrate") Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Reviewed-by: SeongJae Park <sj@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-12-23MAINTAINERS: update one straggling entry for Bartosz GolaszewskiBartosz Golaszewski
The entry for the Qualcomm bluetooth driver only now got sent upstream and still has my old address. Update it to use the kernel.org one. Link: https://lkml.kernel.org/r/20251204104531.22045-1-bartosz.golaszewski@oss.qualcomm.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Cc: Hans Verkuil <hverkuil@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-12-23mm/page_alloc: change all pageblocks migrate type on coalescingAlexander Gordeev
When a page is freed it coalesces with a buddy into a higher order page while possible. When the buddy page migrate type differs, it is expected to be updated to match the one of the page being freed. However, only the first pageblock of the buddy page is updated, while the rest of the pageblocks are left unchanged. That causes warnings in later expand() and other code paths (like below), since an inconsistency between migration type of the list containing the page and the page-owned pageblocks migration types is introduced. [ 308.986589] ------------[ cut here ]------------ [ 308.987227] page type is 0, passed migratetype is 1 (nr=256) [ 308.987275] WARNING: CPU: 1 PID: 5224 at mm/page_alloc.c:812 expand+0x23c/0x270 [ 308.987293] Modules linked in: algif_hash(E) af_alg(E) nft_fib_inet(E) nft_fib_ipv4(E) nft_fib_ipv6(E) nft_fib(E) nft_reject_inet(E) nf_reject_ipv4(E) nf_reject_ipv6(E) nft_reject(E) nft_ct(E) nft_chain_nat(E) nf_nat(E) nf_conntrack(E) nf_defrag_ipv6(E) nf_defrag_ipv4(E) nf_tables(E) s390_trng(E) vfio_ccw(E) mdev(E) vfio_iommu_type1(E) vfio(E) sch_fq_codel(E) drm(E) i2c_core(E) drm_panel_orientation_quirks(E) loop(E) nfnetlink(E) vsock_loopback(E) vmw_vsock_virtio_transport_common(E) vsock(E) ctcm(E) fsm(E) diag288_wdt(E) watchdog(E) zfcp(E) scsi_transport_fc(E) ghash_s390(E) prng(E) aes_s390(E) des_generic(E) des_s390(E) libdes(E) sha3_512_s390(E) sha3_256_s390(E) sha_common(E) paes_s390(E) crypto_engine(E) pkey_cca(E) pkey_ep11(E) zcrypt(E) rng_core(E) pkey_pckmo(E) pkey(E) autofs4(E) [ 308.987439] Unloaded tainted modules: hmac_s390(E):2 [ 308.987650] CPU: 1 UID: 0 PID: 5224 Comm: mempig_verify Kdump: loaded Tainted: G E 6.18.0-gcc-bpf-debug #431 PREEMPT [ 308.987657] Tainted: [E]=UNSIGNED_MODULE [ 308.987661] Hardware name: IBM 3906 M04 704 (z/VM 7.3.0) [ 308.987666] Krnl PSW : 0404f00180000000 00000349976fa600 (expand+0x240/0x270) [ 308.987676] R:0 T:1 IO:0 EX:0 Key:0 M:1 W:0 P:0 AS:3 CC:3 PM:0 RI:0 EA:3 [ 308.987682] Krnl GPRS: 0000034980000004 0000000000000005 0000000000000030 000003499a0e6d88 [ 308.987688] 0000000000000005 0000034980000005 000002be803ac000 0000023efe6c8300 [ 308.987692] 0000000000000008 0000034998d57290 000002be00000100 0000023e00000008 [ 308.987696] 0000000000000000 0000000000000000 00000349976fa5fc 000002c99b1eb6f0 [ 308.987708] Krnl Code: 00000349976fa5f0: c020008a02f2 larl %r2,000003499883abd4 00000349976fa5f6: c0e5ffe3f4b5 brasl %r14,0000034997378f60 #00000349976fa5fc: af000000 mc 0,0 >00000349976fa600: a7f4ff4c brc 15,00000349976fa498 00000349976fa604: b9040026 lgr %r2,%r6 00000349976fa608: c0300088317f larl %r3,0000034998800906 00000349976fa60e: c0e5fffdb6e1 brasl %r14,00000349976b13d0 00000349976fa614: af000000 mc 0,0 [ 308.987734] Call Trace: [ 308.987738] [<00000349976fa600>] expand+0x240/0x270 [ 308.987744] ([<00000349976fa5fc>] expand+0x23c/0x270) [ 308.987749] [<00000349976ff95e>] rmqueue_bulk+0x71e/0x940 [ 308.987754] [<00000349976ffd7e>] __rmqueue_pcplist+0x1fe/0x2a0 [ 308.987759] [<0000034997700966>] rmqueue.isra.0+0xb46/0xf40 [ 308.987763] [<0000034997703ec8>] get_page_from_freelist+0x198/0x8d0 [ 308.987768] [<0000034997706fa8>] __alloc_frozen_pages_noprof+0x198/0x400 [ 308.987774] [<00000349977536f8>] alloc_pages_mpol+0xb8/0x220 [ 308.987781] [<0000034997753bf6>] folio_alloc_mpol_noprof+0x26/0xc0 [ 308.987786] [<0000034997753e4c>] vma_alloc_folio_noprof+0x6c/0xa0 [ 308.987791] [<0000034997775b22>] vma_alloc_anon_folio_pmd+0x42/0x240 [ 308.987799] [<000003499777bfea>] __do_huge_pmd_anonymous_page+0x3a/0x210 [ 308.987804] [<00000349976cb08e>] __handle_mm_fault+0x4de/0x500 [ 308.987809] [<00000349976cb14c>] handle_mm_fault+0x9c/0x3a0 [ 308.987813] [<000003499734d70e>] do_exception+0x1de/0x540 [ 308.987822] [<0000034998387390>] __do_pgm_check+0x130/0x220 [ 308.987830] [<000003499839a934>] pgm_check_handler+0x114/0x160 [ 308.987838] 3 locks held by mempig_verify/5224: [ 308.987842] #0: 0000023ea44c1e08 (vm_lock){++++}-{0:0}, at: lock_vma_under_rcu+0xb2/0x2a0 [ 308.987859] #1: 0000023ee4d41b18 (&pcp->lock){+.+.}-{2:2}, at: rmqueue.isra.0+0xad6/0xf40 [ 308.987871] #2: 0000023efe6c8998 (&zone->lock){..-.}-{2:2}, at: rmqueue_bulk+0x5a/0x940 [ 308.987886] Last Breaking-Event-Address: [ 308.987890] [<0000034997379096>] __warn_printk+0x136/0x140 [ 308.987897] irq event stamp: 52330356 [ 308.987901] hardirqs last enabled at (52330355): [<000003499838742e>] __do_pgm_check+0x1ce/0x220 [ 308.987907] hardirqs last disabled at (52330356): [<000003499839932e>] _raw_spin_lock_irqsave+0x9e/0xe0 [ 308.987913] softirqs last enabled at (52329882): [<0000034997383786>] handle_softirqs+0x2c6/0x530 [ 308.987922] softirqs last disabled at (52329859): [<0000034997382f86>] __irq_exit_rcu+0x126/0x140 [ 308.987929] ---[ end trace 0000000000000000 ]--- [ 308.987936] ------------[ cut here ]------------ [ 308.987940] page type is 0, passed migratetype is 1 (nr=256) [ 308.987951] WARNING: CPU: 1 PID: 5224 at mm/page_alloc.c:860 __del_page_from_free_list+0x1be/0x1e0 [ 308.987960] Modules linked in: algif_hash(E) af_alg(E) nft_fib_inet(E) nft_fib_ipv4(E) nft_fib_ipv6(E) nft_fib(E) nft_reject_inet(E) nf_reject_ipv4(E) nf_reject_ipv6(E) nft_reject(E) nft_ct(E) nft_chain_nat(E) nf_nat(E) nf_conntrack(E) nf_defrag_ipv6(E) nf_defrag_ipv4(E) nf_tables(E) s390_trng(E) vfio_ccw(E) mdev(E) vfio_iommu_type1(E) vfio(E) sch_fq_codel(E) drm(E) i2c_core(E) drm_panel_orientation_quirks(E) loop(E) nfnetlink(E) vsock_loopback(E) vmw_vsock_virtio_transport_common(E) vsock(E) ctcm(E) fsm(E) diag288_wdt(E) watchdog(E) zfcp(E) scsi_transport_fc(E) ghash_s390(E) prng(E) aes_s390(E) des_generic(E) des_s390(E) libdes(E) sha3_512_s390(E) sha3_256_s390(E) sha_common(E) paes_s390(E) crypto_engine(E) pkey_cca(E) pkey_ep11(E) zcrypt(E) rng_core(E) pkey_pckmo(E) pkey(E) autofs4(E) [ 308.988070] Unloaded tainted modules: hmac_s390(E):2 [ 308.988087] CPU: 1 UID: 0 PID: 5224 Comm: mempig_verify Kdump: loaded Tainted: G W E 6.18.0-gcc-bpf-debug #431 PREEMPT [ 308.988095] Tainted: [W]=WARN, [E]=UNSIGNED_MODULE [ 308.988100] Hardware name: IBM 3906 M04 704 (z/VM 7.3.0) [ 308.988105] Krnl PSW : 0404f00180000000 00000349976f9e32 (__del_page_from_free_list+0x1c2/0x1e0) [ 308.988118] R:0 T:1 IO:0 EX:0 Key:0 M:1 W:0 P:0 AS:3 CC:3 PM:0 RI:0 EA:3 [ 308.988127] Krnl GPRS: 0000034980000004 0000000000000005 0000000000000030 000003499a0e6d88 [ 308.988133] 0000000000000005 0000034980000005 0000034998d57290 0000023efe6c8300 [ 308.988139] 0000000000000001 0000000000000008 000002be00000100 000002be803ac000 [ 308.988144] 0000000000000000 0000000000000001 00000349976f9e2e 000002c99b1eb728 [ 308.988153] Krnl Code: 00000349976f9e22: c020008a06d9 larl %r2,000003499883abd4 00000349976f9e28: c0e5ffe3f89c brasl %r14,0000034997378f60 #00000349976f9e2e: af000000 mc 0,0 >00000349976f9e32: a7f4ff4e brc 15,00000349976f9cce 00000349976f9e36: b904002b lgr %r2,%r11 00000349976f9e3a: c030008a06e7 larl %r3,000003499883ac08 00000349976f9e40: c0e5fffdbac8 brasl %r14,00000349976b13d0 00000349976f9e46: af000000 mc 0,0 [ 308.988184] Call Trace: [ 308.988188] [<00000349976f9e32>] __del_page_from_free_list+0x1c2/0x1e0 [ 308.988195] ([<00000349976f9e2e>] __del_page_from_free_list+0x1be/0x1e0) [ 308.988202] [<00000349976ff946>] rmqueue_bulk+0x706/0x940 [ 308.988208] [<00000349976ffd7e>] __rmqueue_pcplist+0x1fe/0x2a0 [ 308.988214] [<0000034997700966>] rmqueue.isra.0+0xb46/0xf40 [ 308.988221] [<0000034997703ec8>] get_page_from_freelist+0x198/0x8d0 [ 308.988227] [<0000034997706fa8>] __alloc_frozen_pages_noprof+0x198/0x400 [ 308.988233] [<00000349977536f8>] alloc_pages_mpol+0xb8/0x220 [ 308.988240] [<0000034997753bf6>] folio_alloc_mpol_noprof+0x26/0xc0 [ 308.988247] [<0000034997753e4c>] vma_alloc_folio_noprof+0x6c/0xa0 [ 308.988253] [<0000034997775b22>] vma_alloc_anon_folio_pmd+0x42/0x240 [ 308.988260] [<000003499777bfea>] __do_huge_pmd_anonymous_page+0x3a/0x210 [ 308.988267] [<00000349976cb08e>] __handle_mm_fault+0x4de/0x500 [ 308.988273] [<00000349976cb14c>] handle_mm_fault+0x9c/0x3a0 [ 308.988279] [<000003499734d70e>] do_exception+0x1de/0x540 [ 308.988286] [<0000034998387390>] __do_pgm_check+0x130/0x220 [ 308.988293] [<000003499839a934>] pgm_check_handler+0x114/0x160 [ 308.988300] 3 locks held by mempig_verify/5224: [ 308.988305] #0: 0000023ea44c1e08 (vm_lock){++++}-{0:0}, at: lock_vma_under_rcu+0xb2/0x2a0 [ 308.988322] #1: 0000023ee4d41b18 (&pcp->lock){+.+.}-{2:2}, at: rmqueue.isra.0+0xad6/0xf40 [ 308.988334] #2: 0000023efe6c8998 (&zone->lock){..-.}-{2:2}, at: rmqueue_bulk+0x5a/0x940 [ 308.988346] Last Breaking-Event-Address: [ 308.988350] [<0000034997379096>] __warn_printk+0x136/0x140 [ 308.988356] irq event stamp: 52330356 [ 308.988360] hardirqs last enabled at (52330355): [<000003499838742e>] __do_pgm_check+0x1ce/0x220 [ 308.988366] hardirqs last disabled at (52330356): [<000003499839932e>] _raw_spin_lock_irqsave+0x9e/0xe0 [ 308.988373] softirqs last enabled at (52329882): [<0000034997383786>] handle_softirqs+0x2c6/0x530 [ 308.988380] softirqs last disabled at (52329859): [<0000034997382f86>] __irq_exit_rcu+0x126/0x140 [ 308.988388] ---[ end trace 0000000000000000 ]--- Link: https://lkml.kernel.org/r/20251215081002.3353900A9c-agordeev@linux.ibm.com Link: https://lkml.kernel.org/r/20251212151457.3898073Add-agordeev@linux.ibm.com Fixes: e6cf9e1c4cde ("mm: page_alloc: fix up block types when merging compatible blocks") Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com> Reported-by: Marc Hartmayer <mhartmay@linux.ibm.com> Closes: https://lore.kernel.org/linux-mm/87wmalyktd.fsf@linux.ibm.com/ Acked-by: Vlastimil Babka <vbabka@suse.cz> Acked-by: Johannes Weiner <hannes@cmpxchg.org> Reviewed-by: Wei Yang <richard.weiyang@gmail.com> Cc: Marc Hartmayer <mhartmay@linux.ibm.com> Cc: <stable@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-12-23mm: leafops.h: correct kernel-doc function param. namesRandy Dunlap
Modify the kernel-doc function parameter names to prevent kernel-doc warnings: Warning: include/linux/leafops.h:135 function parameter 'entry' not described in 'leafent_type' Warning: include/linux/leafops.h:540 function parameter 'pte' not described in 'pte_is_uffd_marker' Link: https://lkml.kernel.org/r/20251214201517.2187051-1-rdunlap@infradead.org Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reviewed-by: Lorenzo Stoakes <lorenzo.stoakes@oracle.com> Cc: Liam Howlett <liam.howlett@oracle.com> Cc: Michal Hocko <mhocko@suse.com> Cc: Mike Rapoport <rppt@kernel.org> Cc: Suren Baghdasaryan <surenb@google.com> Cc: Vlastimil Babka <vbabka@suse.cz> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-12-23kasan: unpoison vms[area] addresses with a common tagMaciej Wieczor-Retman
A KASAN tag mismatch, possibly causing a kernel panic, can be observed on systems with a tag-based KASAN enabled and with multiple NUMA nodes. It was reported on arm64 and reproduced on x86. It can be explained in the following points: 1. There can be more than one virtual memory chunk. 2. Chunk's base address has a tag. 3. The base address points at the first chunk and thus inherits the tag of the first chunk. 4. The subsequent chunks will be accessed with the tag from the first chunk. 5. Thus, the subsequent chunks need to have their tag set to match that of the first chunk. Use the new vmalloc flag that disables random tag assignment in __kasan_unpoison_vmalloc() - pass the same random tag to all the vm_structs by tagging the pointers before they go inside __kasan_unpoison_vmalloc(). Assigning a common tag resolves the pcpu chunk address mismatch. [akpm@linux-foundation.org: use WARN_ON_ONCE(), per Andrey] Link: https://lkml.kernel.org/r/CA+fCnZeuGdKSEm11oGT6FS71_vGq1vjq-xY36kxVdFvwmag2ZQ@mail.gmail.com [maciej.wieczor-retman@intel.com: remove unneeded pr_warn()] Link: https://lkml.kernel.org/r/919897daaaa3c982a27762a2ee038769ad033991.1764945396.git.m.wieczorretman@pm.me Link: https://lkml.kernel.org/r/873821114a9f722ffb5d6702b94782e902883fdf.1764874575.git.m.wieczorretman@pm.me Fixes: 1d96320f8d53 ("kasan, vmalloc: add vmalloc tagging for SW_TAGS") Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com> Reviewed-by: Andrey Konovalov <andreyknvl@gmail.com> Cc: Alexander Potapenko <glider@google.com> Cc: Andrey Ryabinin <ryabinin.a.a@gmail.com> Cc: Danilo Krummrich <dakr@kernel.org> Cc: Dmitriy Vyukov <dvyukov@google.com> Cc: Jiayuan Chen <jiayuan.chen@linux.dev> Cc: Kees Cook <kees@kernel.org> Cc: Marco Elver <elver@google.com> Cc: "Uladzislau Rezki (Sony)" <urezki@gmail.com> Cc: Vincenzo Frascino <vincenzo.frascino@arm.com> Cc: <stable@vger.kernel.org> [6.1+] Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-12-23kasan: refactor pcpu kasan vmalloc unpoisonMaciej Wieczor-Retman
A KASAN tag mismatch, possibly causing a kernel panic, can be observed on systems with a tag-based KASAN enabled and with multiple NUMA nodes. It was reported on arm64 and reproduced on x86. It can be explained in the following points: 1. There can be more than one virtual memory chunk. 2. Chunk's base address has a tag. 3. The base address points at the first chunk and thus inherits the tag of the first chunk. 4. The subsequent chunks will be accessed with the tag from the first chunk. 5. Thus, the subsequent chunks need to have their tag set to match that of the first chunk. Refactor code by reusing __kasan_unpoison_vmalloc in a new helper in preparation for the actual fix. Link: https://lkml.kernel.org/r/eb61d93b907e262eefcaa130261a08bcb6c5ce51.1764874575.git.m.wieczorretman@pm.me Fixes: 1d96320f8d53 ("kasan, vmalloc: add vmalloc tagging for SW_TAGS") Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com> Reviewed-by: Andrey Konovalov <andreyknvl@gmail.com> Cc: Alexander Potapenko <glider@google.com> Cc: Andrey Ryabinin <ryabinin.a.a@gmail.com> Cc: Danilo Krummrich <dakr@kernel.org> Cc: Dmitriy Vyukov <dvyukov@google.com> Cc: Jiayuan Chen <jiayuan.chen@linux.dev> Cc: Kees Cook <kees@kernel.org> Cc: Marco Elver <elver@google.com> Cc: "Uladzislau Rezki (Sony)" <urezki@gmail.com> Cc: Vincenzo Frascino <vincenzo.frascino@arm.com> Cc: <stable@vger.kernel.org> [6.1+] Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-12-23mm/kasan: fix incorrect unpoisoning in vrealloc for KASANJiayuan Chen
Patch series "kasan: vmalloc: Fixes for the percpu allocator and vrealloc", v3. Patches fix two issues related to KASAN and vmalloc. The first one, a KASAN tag mismatch, possibly resulting in a kernel panic, can be observed on systems with a tag-based KASAN enabled and with multiple NUMA nodes. Initially it was only noticed on x86 [1] but later a similar issue was also reported on arm64 [2]. Specifically the problem is related to how vm_structs interact with pcpu_chunks - both when they are allocated, assigned and when pcpu_chunk addresses are derived. When vm_structs are allocated they are unpoisoned, each with a different random tag, if vmalloc support is enabled along the KASAN mode. Later when first pcpu chunk is allocated it gets its 'base_addr' field set to the first allocated vm_struct. With that it inherits that vm_struct's tag. When pcpu_chunk addresses are later derived (by pcpu_chunk_addr(), for example in pcpu_alloc_noprof()) the base_addr field is used and offsets are added to it. If the initial conditions are satisfied then some of the offsets will point into memory allocated with a different vm_struct. So while the lower bits will get accurately derived the tag bits in the top of the pointer won't match the shadow memory contents. The solution (proposed at v2 of the x86 KASAN series [3]) is to unpoison the vm_structs with the same tag when allocating them for the per cpu allocator (in pcpu_get_vm_areas()). The second one reported by syzkaller [4] is related to vrealloc and happens because of random tag generation when unpoisoning memory without allocating new pages. This breaks shadow memory tracking and needs to reuse the existing tag instead of generating a new one. At the same time an inconsistency in used flags is corrected. This patch (of 3): Syzkaller reported a memory out-of-bounds bug [4]. This patch fixes two issues: 1. In vrealloc the KASAN_VMALLOC_VM_ALLOC flag is missing when unpoisoning the extended region. This flag is required to correctly associate the allocation with KASAN's vmalloc tracking. Note: In contrast, vzalloc (via __vmalloc_node_range_noprof) explicitly sets KASAN_VMALLOC_VM_ALLOC and calls kasan_unpoison_vmalloc() with it. vrealloc must behave consistently -- especially when reusing existing vmalloc regions -- to ensure KASAN can track allocations correctly. 2. When vrealloc reuses an existing vmalloc region (without allocating new pages) KASAN generates a new tag, which breaks tag-based memory access tracking. Introduce KASAN_VMALLOC_KEEP_TAG, a new KASAN flag that allows reusing the tag already attached to the pointer, ensuring consistent tag behavior during reallocation. Pass KASAN_VMALLOC_KEEP_TAG and KASAN_VMALLOC_VM_ALLOC to the kasan_unpoison_vmalloc inside vrealloc_node_align_noprof(). Link: https://lkml.kernel.org/r/cover.1765978969.git.m.wieczorretman@pm.me Link: https://lkml.kernel.org/r/38dece0a4074c43e48150d1e242f8242c73bf1a5.1764874575.git.m.wieczorretman@pm.me Link: https://lore.kernel.org/all/e7e04692866d02e6d3b32bb43b998e5d17092ba4.1738686764.git.maciej.wieczor-retman@intel.com/ [1] Link: https://lore.kernel.org/all/aMUrW1Znp1GEj7St@MiWiFi-R3L-srv/ [2] Link: https://lore.kernel.org/all/CAPAsAGxDRv_uFeMYu9TwhBVWHCCtkSxoWY4xmFB_vowMbi8raw@mail.gmail.com/ [3] Link: https://syzkaller.appspot.com/bug?extid=997752115a851cb0cf36 [4] Fixes: a0309faf1cb0 ("mm: vmalloc: support more granular vrealloc() sizing") Signed-off-by: Jiayuan Chen <jiayuan.chen@linux.dev> Co-developed-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com> Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com> Reported-by: syzbot+997752115a851cb0cf36@syzkaller.appspotmail.com Closes: https://lore.kernel.org/all/68e243a2.050a0220.1696c6.007d.GAE@google.com/T/ Reviewed-by: Andrey Konovalov <andreyknvl@gmail.com> Cc: Alexander Potapenko <glider@google.com> Cc: Andrey Ryabinin <ryabinin.a.a@gmail.com> Cc: Danilo Krummrich <dakr@kernel.org> Cc: Dmitriy Vyukov <dvyukov@google.com> Cc: Kees Cook <kees@kernel.org> Cc: Marco Elver <elver@google.com> Cc: "Uladzislau Rezki (Sony)" <urezki@gmail.com> Cc: Vincenzo Frascino <vincenzo.frascino@arm.com> Cc: <stable@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-12-23idr: fix idr_alloc() returning an ID out of rangeMatthew Wilcox (Oracle)
If you use an IDR with a non-zero base, and specify a range that lies entirely below the base, 'max - base' becomes very large and idr_get_free() can return an ID that lies outside of the requested range. Link: https://lkml.kernel.org/r/20251128161853.3200058-1-willy@infradead.org Fixes: 6ce711f27500 ("idr: Make 1-based IDRs more efficient") Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org> Reported-by: Jan Sokolowski <jan.sokolowski@intel.com> Reported-by: Koen Koning <koen.koning@intel.com> Reported-by: Peter Senna Tschudin <peter.senna@linux.intel.com> Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/6449 Reviewed-by: Christian König <christian.koenig@amd.com> Cc: <stable@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-12-23mailmap: update entry for Bartosz GolaszewskiBartosz Golaszewski
My linaro address will stop working tonight. Update my mailmap entry. Link: https://lkml.kernel.org/r/20251128133318.44912-1-brgl@bgdev.pl Signed-off-by: Bartosz Golaszewski <brgl@kernel.org> Cc: Hans Verkuil <hverkuil@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-12-23genalloc.h: fix htmldocs warningAndrew Morton
WARNING: include/linux/genalloc.h:52 function parameter 'start_addr' not described in 'genpool_algo_t' Fixes: 52fbf1134d47 ("lib/genalloc.c: fix allocation of aligned buffer from non-aligned chunk") Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Closes: https://lkml.kernel.org/r/20251127130624.563597e3@canb.auug.org.au Acked-by: Randy Dunlap <rdunlap@infradead.org> Tested-by: Randy Dunlap <rdunlap@infradead.org> Cc: Alexey Skidanov <alexey.skidanov@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-12-23MAINTAINERS: add Mike Rapoport as maintainer for userfaultfdMike Rapoport (Microsoft)
Link: https://lkml.kernel.org/r/20251125132908.847055-1-rppt@kernel.org Signed-off-by: Mike Rapoport (Microsoft) <rppt@kernel.org> Acked-by: David Hildenbrand (Red Hat) <david@kernel.org> Acked-by: Vlastimil Babka <vbabka@suse.cz> Acked-by: Peter Xu <peterx@redhat.com> Acked-by: Lorenzo Stoakes <lorenzo.stoakes@oracle.com> Cc: Liam Howlett <liam.howlett@oracle.com> Cc: Michal Hocko <mhocko@suse.com> Cc: Mike Rapoport <rppt@kernel.org> Cc: Suren Baghdasaryan <surenb@google.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-12-23perf arm-spe: Add NVIDIA Olympus to neoverse listBesar Wicaksono
Add NVIDIA Olympus MIDR to neoverse_spe range list. Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com> Reviewed-by: Leo Yan <leo.yan@arm.com> Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2025-12-23tools headers arm64: Add NVIDIA Olympus partBesar Wicaksono
Add the part number and MIDR for NVIDIA Olympus. Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com> Reviewed-by: Leo Yan <leo.yan@arm.com> Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2025-12-23perf tests top: Make the test exclusiveIan Rogers
With sufficient tests running the load causes the top test fails with: ``` 123: perf top tests : FAILED! --- start --- test child forked, pid 629856 Basic perf top test Basic perf top test [Failed: no sample percentage found] ---- end(-1) ---- ``` Mark the test exclusive to avoid flakes. Fixes: 75e961730b9e ("perf tests top: Add basic perf top coverage test") Signed-off-by: Ian Rogers <irogers@google.com> Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2025-12-23perf tests kvm: Avoid leaving perf.data.guest file aroundIan Rogers
Ensure the perf.data output when checking permissions is written to /dev/null so that it isn't left in the directory the test is run. Fixes: b58261584d2f ("perf test kvm: Add some basic perf kvm test coverage") Signed-off-by: Ian Rogers <irogers@google.com> Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2025-12-23phy: rockchip: naneng-combphy: use existing DT property check for rk3528Chukun Pan
The naneng-combphy driver already has DT property checks for "rockchip,enable-ssc" and "rockchip,ext-refclk", use it for the rk3528_combphy_cfg. Also aligned the indentation of the rk3528_combphy_grfcfgs parameters (using tabs). Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Reviewed-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20250910122000.951100-1-amadeus@jmu.edu.cn Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: qualcomm: qmp-combo: Add DP offsets and settings for Glymur platformsAbel Vesa
Starting with Glymur, the PCIe and DP PHYs qserdes register offsets differ for the same version number. So in order to be able to differentiate between them, add these ones with DP prefix. Add the necessary PHY setting tables for enabling the DP path within the QMP subsystem. Introduced some new callbacks for v8 specific sequences, such as for clock configurations based on the different link speeds. Wesley Cheng added some updated settings from the hardware programming guides on existing PHY tables and clock settings. Co-developed-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://patch.msgid.link/20251209-linux-next-12825-v8-9-42133596bda0@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: qualcomm: qmp-combo: Update QMP PHY with Glymur settingsWesley Cheng
For SuperSpeed USB to work properly, there is a set of HW settings that need to be programmed into the USB blocks within the QMP PHY. Ensure that these settings follow the latest settings mentioned in the HW programming guide. The QMP USB PHY on Glymur is a USB43 based PHY that will have some new ways to define certain registers, such as the replacement of TXA/RXA and TXB/RXB register sets. This was replaced with the LALB register set. There are also some PHY init updates to modify the PCS MISC register space. Without these, the QMP PHY PLL locking fails. Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://patch.msgid.link/20251209-linux-next-12825-v8-8-42133596bda0@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: qualcomm: Update the QMP clamp register for V6Wesley Cheng
QMP combo phy V6 and above use the clamp register from the PCS always on (AON) address space. Update the driver accordingly. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Elson Roy Serrao <quic_eserrao@quicinc.com> Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://patch.msgid.link/20251209-linux-next-12825-v8-7-42133596bda0@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: qualcomm: qmp-usb: Add support for Glymur USB UNI PHYWesley Cheng
Glymur contains a USB multiport controller which supports a QMP UNI PHY. These ports do not have typeC capability, so it needs to be differentiated in this manner. Update the QMP PHY sequence required to bring up the UNI PHY for Glymur. The UNI PHY follows mostly the same register field definitions as previous SoCs. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://patch.msgid.link/20251209-linux-next-12825-v8-6-42133596bda0@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: qualcomm: eusb2-repeater: Add SMB2370 eUSB2 repeater supportWesley Cheng
Introduce support for the SMB2370 based eUSB2 repeater. Configure the proper repeater tuning settings, as if this is not done correctly, it can lead to instability on the USB2 link, which leads to USB2 enumeration failures, or random disconnects. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com> Link: https://patch.msgid.link/20251209-linux-next-12825-v8-5-42133596bda0@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23dt-bindings: phy: qcom,snps-eusb2-repeater: Add SMB2370 compatibleWesley Cheng
Add the compatible string for identifying a SMB2370 USB repeater device. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com> Link: https://patch.msgid.link/20251209-linux-next-12825-v8-4-42133596bda0@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23dt-bindings: phy: qcom-m31-eusb2: Add Glymur compatibleWesley Cheng
Add the Glymur compatible to the M31 eUSB2 PHY, and use the SM8750 as the fallback. Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20251209-linux-next-12825-v8-3-42133596bda0@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23dt-bindings: phy: qcom,qmp-usb: Add Glymur USB UNI PHY compatibleWesley Cheng
The Glymur USB subsystem contains a multiport controller, which utilizes two QMP UNI PHYs. Add the proper compatible string for the Glymur SoC, and the required clkref clock name. Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251209-linux-next-12825-v8-2-42133596bda0@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Add Glymur compatibleWesley Cheng
Define a Glymur compatible string for the QMP combo PHY, along with resource requirements. Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251209-linux-next-12825-v8-1-42133596bda0@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: lynx-28g: improve lynx_28g_probe() sequenceVladimir Oltean
dev_set_drvdata() is called twice, it is sufficient to do it only once. devm_of_phy_provider_register() can fail, and if it does, the &priv->cdr_check work item is queued, but not cancelled, and the device probing failed, so it will trigger use after free. This is a minor risk though. Resource initialization should be done a little earlier, in case we need to dereference dev_get_drvdata() in lynx_28g_pll_read_configuration() or in lynx_28g_lane_read_configuration(). Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://patch.msgid.link/20251125114847.804961-16-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: lynx-28g: use "dev" argument more in lynx_28g_probe()Vladimir Oltean
We have "dev" which holds &pdev->dev, but we still dereference this pointer 4 more times, instead of using the local variable. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://patch.msgid.link/20251125114847.804961-15-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: lynx-28g: configure more equalization params for 1GbE and 10GbEIoana Ciornei
While adding support for 25GbE, it was noticed that the RCCR0 and TTLCR0 registers have different values for this protocol than the 10GbE and 1GbE modes. Expand the lynx_28g_proto_conf[] array with the expected values for the currently supported protocols. These were dumped from a live system, and are the out-of-reset values. It will ensure that the lane is configured with these values when transitioning from 25GbE back into one of these modes. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://patch.msgid.link/20251125114847.804961-14-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: lynx-28g: distinguish between 10GBASE-R and USXGMIIVladimir Oltean
The driver does not handle well protocol switching to or from USXGMII, because it conflates it with 10GBase-R. In the expected USXGMII use case, that isn't a problem, because SerDes protocol switching performed by the lynx-28g driver is not necessary, because USXGMII natively supports multiple speeds, as opposed to SFP modules using 1000Base-X or 10GBase-R which require switching between the 2. That being said, let's be explicit, and in case someone requests a protocol change which involves USXGMII, let's do the right thing. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://patch.msgid.link/20251125114847.804961-13-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: lynx-28g: refactor lane->interface to lane->modeVladimir Oltean
Lynx 28G is a multi-protocol SerDes - it handles serial Ethernet, PCIe, SATA. The driver should not use the phylib-specific phy_interface_t as an internal data representation, but something specific to its internal capabilities, and only convert to phy_interface_t when PHY_MODE_ETHERNET is selected and used. Otherwise it has no way of representing the non-Ethernet lanes (which was not a short-term goal when the driver was introduced, and is not a goal per se right now either, but should nonetheless be possible). Prefer the "enum lynx_lane_mode" name over "lynx_28g_lane_mode", in preparation of future Lynx 10G SerDes support. This SerDes is part of the same IP family and has similar capabilities, and will reuse some code, hence the common data type. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://patch.msgid.link/20251125114847.804961-12-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: lynx-28g: make lynx_28g_set_lane_mode() more systematicVladimir Oltean
The current approach of transitioning from one SerDes protocol to another in lynx_28g_set_lane_mode() is too poetic. Because the driver only supports 1GbE and 10GbE, it only modifies those registers which it knows are different between these two modes. However, that is hardly extensible for 25GbE, 40GbE, backplane modes, etc. We need something more systematic to make sure that all lane and protocol converter registers are written to consistent values, no matter what was the source lane mode. For that, we need to introduce tables with register field values, for each supported lane mode. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://patch.msgid.link/20251125114847.804961-11-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: lynx-28g: restructure protocol configuration register accessesVladimir Oltean
Eliminate the need to calculate a lane_offset manually, and generate some macros which access the protocol converter corresponding to the correct lane in the PCC* registers. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://patch.msgid.link/20251125114847.804961-10-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: lynx-28g: convert iowrite32() calls with magic values to macrosVladimir Oltean
The driver will need to become more careful with the values it writes to the TX and RX equalization registers. As a preliminary step, convert the magic numbers to macros defining the register field meanings. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://patch.msgid.link/20251125114847.804961-9-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: lynx-28g: use FIELD_GET() and FIELD_PREP()Vladimir Oltean
Reduce the number of bit field definitions required in this driver (in the worst case, a read form and a write form), by defining just the mask, and using the FIELD_GET() and FIELD_PREP() API from <linux/bitfield.h> with that. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://patch.msgid.link/20251125114847.804961-8-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: lynx-28g: don't concatenate lynx_28g_lane_rmw() argument "reg" with ↵Vladimir Oltean
"val" and "mask" The last step in having lynx_28g_lane_rmw() arguments that fully point to their definitions is the removal of the current concatenation logic, by which e.g. "LNaTGCR0, N_RATE_QUARTER, N_RATE_MSK" is expanded to "LNaTGCR0, LNaTGCR0_N_RATE_QUARTER, LNaTGCR0_N_RATE_MSK". There are pros and cons to the above. An advantage is the impossibility to mix up fields of one register with fields of another. For example both LNaTGCR0 and LNaRGCR0 contain an N_RATE_QUARTER field (one for the lane RX direction, one for the lane TX). But the two notable disadvantages are: 1. the impossibility to write expressions such as logical OR between multiple fields. Practically, this forces us to perform more accesses to hardware registers than would otherwise be needed. See the LNaGCR0 access for example. 2. the necessity to invent fields that don't exist, like SGMIIaCR1_SGPCS_DIS, in order to clear SGMIIaCR1_SGPCS_EN (the real field name). This is confusing, because sometimes, fields that end with _DIS really exist, and it's best to not invent new field names. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://patch.msgid.link/20251125114847.804961-7-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: lynx-28g: remove LYNX_28G_ prefix from register namesVladimir Oltean
Currently, in macros such as lynx_28g_lane_rmw(), the driver has macros which concatenate the LYNX_28G_ prefix with the "val" and "mask" arguments. This is done to shorten function calls and not have to spell out LYNX_28G_ everywhere. But outside of lynx_28g_lane_rmw(), lynx_28g_lane_read() and lynx_28g_pll_read(), this is not done, leading to an inconsistency in the code. Also, the concatenation itself has the disadvantage that searching the arguments of these functions as full words (like N_RATE_QUARTER) leads us nowhere, since the real macro definition is LNaTGCR0_N_RATE_QUARTER. Some maintainers want register definitions in drivers to contain the driver name as a prefix, but here, this has the disadvantages listed above, so just remove that prefix. The only change made here is the removal of LYNX_28G_. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://patch.msgid.link/20251125114847.804961-6-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: lynx-28g: avoid memsetting lane already allocated with kzalloc()Vladimir Oltean
"priv" is allocated by lynx_28g_probe() using devm_kzalloc(), and the lane is memory inside that structure (&priv->lane[id]). We don't have to zero-initialize it, it is already filled with zeroes. Suggested-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/linux-phy/aRYMM3ZuyBYH8zEC@vaman/ Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://patch.msgid.link/20251125114847.804961-5-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: lynx-28g: support individual lanes as OF PHY providersVladimir Oltean
Currently, the bindings of this multi-lane SerDes are such that consumers specify the lane index in the PHY cell, and the lane itself is not described in the device tree. It is desirable to describe individual Lynx 28G SerDes lanes in the device tree, in order to be able to customize electrical properties such as those in Documentation/devicetree/bindings/phy/transmit-amplitude.yaml (or others). If each lane may have an OF node, it appears natural for consumers to have their "phys" phandle point to that OF node. The problem is that transitioning between one format and another is a breaking change. The bindings of the 28G Lynx SerDes can themselves be extended in a backward-compatible way, but the consumers cannot be modified without breaking them. Namely, if we have: &mac { phys = <&serdes1 0>; }; we cannot update the device tree to: &mac { phys = <&serdes1_lane_0>; }; because old kernels cannot resolve this phandle to a valid PHY. The proposal here is to keep tolerating existing device trees, which are not supposed to be changed, but modify lynx_28g_xlate() to also resolve the new format with #phy-cells = <0> in the lanes. This way we support 3 modes: - Legacy device trees, no OF nodes for lanes - New device trees, OF nodes for lanes and "phys" phandle points towards them - Hybrid device trees, OF nodes for lanes (to describe electrical parameters), but "phys" phandle points towards the SerDes top-level provider Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://patch.msgid.link/20251125114847.804961-4-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: lynx-28g: refactor lane probing to lynx_28g_probe_lane()Vladimir Oltean
This simplifies the main control flow a little bit and makes the logic reusable for probing the lanes with OF nodes if those exist. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://patch.msgid.link/20251125114847.804961-3-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23dt-bindings: phy: lynx-28g: permit lane OF PHY providersVladimir Oltean
Josua Mayer requested to have OF nodes for each lane, so that he (and other board developers) can further describe electrical parameters individually. For this use case, we need a container node to apply the already existing Documentation/devicetree/bindings/phy/transmit-amplitude.yaml, plus whatever other schemas might get standardized for TX equalization parameters, polarity inversion etc. When lane OF nodes exist, these are also PHY providers ("phys" phandles can point directly to them). Compare that to the existing binding, where the PHY provider is the top-level SerDes node, and the second cell in the "phys" phandle specifies the lane index. The new binding format overlaps over the old one without interfering, but there is a caveat: Existing device trees, which already have "phys = <&serdes1 0>" cannot be converted to "phys = <&serdes_1_lane_a>", because in doing so, we would break compatibility with old kernels which don't understand how to translate the latter phandle to a PHY. The transition to the new phandle format can be performed only after a reasonable amount of time has elapsed after this schema change and the corresponding driver change have been backported to stable kernels. However, the aforementioned transition is not strictly necessary, and the "hybrid" description (where individual lanes have their own OF node, but are not pointed to by the "phys" phandle) can remain for an indefinite amount of time, even if a little inelegant. For newly introduced device trees, where there are no compatibility concerns with old kernels to speak of, it is strongly recommended to use the "phys = <&serdes_1_lane_a>" format. The same holds for phandles towards lanes of LX2160A SerDes #3, which at the time of writing is not yet described in fsl-lx2160a.dtsi, so there is no legacy to maintain. To avoid the strange situation where we have a "phy" (SerDes node) -> "phy" (lane node) hierarchy, let's rename the expected name of the top-level node to "serdes", and update the example too. This has a theoretical chance of causing regressions if bootloaders search for hardcoded paths rather than using aliases, but to the best of my knowledge, for LX2160A/LX2162A this is not the case. Link: https://lore.kernel.org/lkml/02270f62-9334-400c-b7b9-7e6a44dbbfc9@solid-run.com/ Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251125114847.804961-2-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: exynos5-usbdrd: support SS combo phy for ExynosAutov920Pritam Manohar Sutar
Update phy driver to enable SS combo phy for this SoC. New registers' definitions, phy ops (init/exit), and dedicated phy driver data structure are added for SS combo phy. Add these changes in the driver to support SS combo phy for this SoC. Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Pritam Manohar Sutar <pritam.sutar@samsung.com> Link: https://patch.msgid.link/20251124110453.2887437-7-pritam.sutar@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23dt-bindings: phy: samsung,usb3-drd-phy: add ExynosAutov920 combo ssphyPritam Manohar Sutar
The USBDRD31 5nm controller consists of Synopsys USB20 femptoPhy and USB31 SSP+ combophy. Document support for the USB31 SSP+ phy found on combophy of the ExynosAutov920 SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Pritam Manohar Sutar <pritam.sutar@samsung.com> Link: https://patch.msgid.link/20251124110453.2887437-6-pritam.sutar@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: exynos5-usbdrd: support HS combo phy for ExynosAutov920Pritam Manohar Sutar
Support UTMI+ combo phy for this SoC, which is somewhat similar to what the existing Exynos850 supports. The difference is that some register offsets and bit fields are different from Exynos850. Add required change in phy driver to support combo HS phy for this SoC. Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Pritam Manohar Sutar <pritam.sutar@samsung.com> Link: https://patch.msgid.link/20251124110453.2887437-5-pritam.sutar@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23dt-bindings: phy: samsung,usb3-drd-phy: add ExynosAutov920 combo hsphyPritam Manohar Sutar
The USBDRD31 5nm controller consists of Synopsys USB2.0 femptophy and USBSS combophy. Add-on USB20 femptophy is required to support USB20 data rates along with USBSS phy. Document support for the USB2.0 femptophy found on combophy of the this SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Pritam Manohar Sutar <pritam.sutar@samsung.com> Link: https://patch.msgid.link/20251124110453.2887437-4-pritam.sutar@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: exynos5-usbdrd: support HS phy for ExynosAutov920Pritam Manohar Sutar
Enable UTMI+ phy support for this SoC which is very similar to what the existing Exynos850 supports. Add required change in phy driver to support HS phy for this SoC. Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Pritam Manohar Sutar <pritam.sutar@samsung.com> Link: https://patch.msgid.link/20251124110453.2887437-3-pritam.sutar@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23dt-bindings: phy: samsung,usb3-drd-phy: add ExynosAutov920 HS phy compatiblePritam Manohar Sutar
Document support for the USB20 phy found on the ExynosAutov920 SoC. The USB20 phy is functionally identical to that on the Exynos850 SoC, so no driver changes are needed to support this phy. However, add a dedicated compatible string for USB20 phy found in this SoC. This phy needs 0.75v, 0.18v and 3.3v supplies for its internal functionally. Power Supply's names are as per phy's User Data-Book. These names, (dvdd, vdd18 and vdd33), are considered for 0.75v, 1.8v and 3.3v respectively. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Pritam Manohar Sutar <pritam.sutar@samsung.com> Link: https://patch.msgid.link/20251124110453.2887437-2-pritam.sutar@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23phy: apple: Add Apple Type-C PHYSven Peter
The Apple Type-C PHY (ATCPHY) is a PHY for USB 2.0, USB 3.x, USB4/Thunderbolt, and DisplayPort connectivity found in Apple Silicon SoCs. The PHY handles muxing between these different protocols and also provides the reset controller for the attached dwc3 USB controller. There is no documentation available for this PHY and the entire sequence of MMIO pokes has been figured out by tracing all MMIO access of Apple's driver under a thin hypervisor and correlating the register reads/writes to their kernel's debug output to find their names. Deviations from this sequence generally results in the port not working or, especially when the mode is switched to USB4 or Thunderbolt, to some watchdog resetting the entire SoC. This initial commit already introduces support for Display Port and USB4/Thunderbolt but the drivers for these are not ready. We cannot control the alternate mode negotiation and are stuck with whatever Apple's firmware decides such that any DisplayPort or USB4/Thunderbolt device will result in a correctly setup PHY but not be usable until the other drivers are upstreamed as well. Co-developed-by: Janne Grunau <j@jannau.net> Signed-off-by: Janne Grunau <j@jannau.net> Co-developed-by: Hector Martin <marcan@marcan.st> Signed-off-by: Hector Martin <marcan@marcan.st> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> # for reset controller Reviewed-by: Neal Gompa <neal@gompa.dev> Signed-off-by: Sven Peter <sven@kernel.org> Link: https://patch.msgid.link/20251214-b4-atcphy-v3-3-ba82b20e9459@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-23dt-bindings: phy: Add Apple Type-C PHYSven Peter
Apple's Type-C PHY (ATCPHY) is a PHY for USB 2.0, USB 3.x, USB4/Thunderbolt, and DisplayPort connectivity found in Apple Silicon SoCs. The PHY handles muxing between these different protocols and also provides the reset controller for the attached dwc3 USB controller. Reviewed-by: Neal Gompa <neal@gompa.dev> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Sven Peter <sven@kernel.org> Link: https://patch.msgid.link/20251214-b4-atcphy-v3-2-ba82b20e9459@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>