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2026-01-05drm/amdgpu: Setup MTYPE on SOC models for GFX 12.1Mukul Joshi
Fix it to apply for all models. Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Alex Sierra <alex.sierra@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdgpu: Report correct compute partition mode on GFX 12.1Mukul Joshi
PSP programs the NBIO partition status register. In the absence of PSP, read the current compute partition from the GFX IMU register instead of NBIO. Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Alex Sierra <alex.sierra@amd.com> Reviewed-by: Michael Chen <michael.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdkfd: Send MES packets on correct XCC on GFX 12.1Mukul Joshi
Send the Set_Shader_Debugger packet on the correct MES pipe when partition mode is set to non-SPX mode. Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Alex Sierra <alex.sierra@amd.com> Reviewed-by: Michael Chen <michael.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdkfd: Add/remove queues on the correct XCC on GFX 12.1Mukul Joshi
On GFX 12.1, pass the xcc id of the master XCC to choose the correct MES Pipe to send the add_queue/remove_queue requests to MES. Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Alex Sierra <alex.sierra@amd.com> Reviewed-by: Michael Chen <michael.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdkfd: Don't partition VMID space on GFX 12.1Mukul Joshi
There is no need to partition VMID space on GFX 12.1 when operating in CPX mode as SDMA is not sharing MMHUB on GFX 12.1. Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Alex Sierra <alex.sierra@amd.com> Reviewed-by: Michael Chen <michael.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdgpu: Rework MES initialization on GFX 12.1Mukul Joshi
Currently, only SPX mode works on GFX 12.1. This patch reworks the MES initialization to get other non-SPX modes working. For example, for CPX mode, coop_enable bit needs to be set to 0. The shared command buffer initialization is also not needed in CPX mode. The shared command buffer initialization needs further improvements which will be handled in later patches. Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Alex Sierra <alex.sierra@amd.com> Reviewed-by: Michael Chen <michael.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdgpu: Use correct MES pipe in non-SPX mode on GFX 12.1Mukul Joshi
On GFX 12.1, use the correct MES pipe instance for readiness before sending MES commands on that pipe. Additionally, send the TLB requests on the correct MES pipe in non-SPX modes. Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Alex Sierra <alex.sierra@amd.com> Reviewed-by: Michael Chen <michael.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdgpu: adjust xcc_id program logic for sdma v7_1Likun Gao
Adjust program logic for sdam v7_1, only use physical xcc_id when program register to support compute partition. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdgpu: adjust xcc logic for gfxhub v12_1Likun Gao
Adjust xcc_id logic to only use physical xcc_id when program register, (use logic xcc_id by default), to fit for compute partition. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdgpu: adjust xcc_cp_resume function for gfx_v12_1Likun Gao
Adjust gfx_v12_1_xcc_cp_resume function to program cp resume per xcc_id (logic xcc number) to fix for xcp_resume. V2: Allocate compute microcode bo when sw init Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdkfd: Add SDMA queue quantum support for GFX12.1Gang Ba
program SDMAx_QUEUEx_SCHEDULE_CNTL for context switch due to quantum in KFD for GFX12.1 Signed-off-by: Gang Ba <Gang.Ba@amd.com> Reviewed-by: Amber Lin <Amber.Lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdkfd: Set SDMA_QUEUEx_IB_CNTL/SWITCH_INSIDE_IBGang Ba
When submitting MQD to CP, set SDMA_QUEUEx_IB_CNTL/SWITCH_INSIDE_IB bit so it'll allow SDMA preemption if there is a massive command buffer of long-running SDMA commands. Signed-off-by: Gang Ba <Gang.Ba@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdgpu: disable burst for gfx v12_1Likun Gao
Disable burst in GL1A and GLARBA for gfx v12_1. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdgpu: Setup Retry based thrashing prevention on GFX 12.1Mukul Joshi
Enable the new UTCL0 retry-based thrashing prevention on GFX 12.1. Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Alex Sierra <alex.sierra@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdgpu: Program IH_VMID_LUT_INDEX register on GFX 12.1Mukul Joshi
For querying VMID <-> PASID mapping on GFX 12.1, we need to first program the IH_VMID_LUT_INDEX before fetching the LUT mapping. Without this TLB flush may not work. Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Michael Chen <michael.chen@amd.com> Reviewed-by: Alex Sierra <alex.sierra@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/ras: Support physical address convertJinzhou Su
Support physical address convert to current NPS pages in uniras. Signed-off-by: Jinzhou Su <jinzhou.su@amd.com> Reviewed-by: YiPeng Chai <YiPeng.Chai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdgpu/gfx_v12_1: add mqd_stride_size input parameterJack Xiao
mqd_stride_size is used to calculate the next mqd offset for cooperative dispatch. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdkfd: Fix a couple of spelling mistakesColin Ian King
There are a couple of spelling mistakes, one in a pr_warn message and one in a seq_printf message. Fix these. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdgpu: Describe @AMD_IP_BLOCK_TYPE_RAS in amd_ip_block_type enumBagas Sanjaya
Sphinx reports kernel-doc warning: WARNING: ./drivers/gpu/drm/amd/include/amd_shared.h:113 Enum value 'AMD_IP_BLOCK_TYPE_RAS' not described in enum 'amd_ip_block_type' Describe the value to fix it. Fixes: 7169e706c82d ("drm/amdgpu: Add ras module ip block to amdgpu discovery") Signed-off-by: Bagas Sanjaya <bagasdotme@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/display: Don't use kernel-doc comment in dc_register_software_state ↵Bagas Sanjaya
struct Sphinx reports kernel-doc warning: WARNING: ./drivers/gpu/drm/amd/display/dc/dc.h:2796 This comment starts with '/**', but isn't a kernel-doc comment. Refer to Documentation/doc-guide/kernel-doc.rst * Software state variables used to program register fields across the display pipeline Don't use kernel-doc comment syntax to fix it. Fixes: b0ff344fe70c ("drm/amd/display: Add interface to capture expected HW state from SW state") Signed-off-by: Bagas Sanjaya <bagasdotme@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/display: Reduce number of arguments of dcn30's ↵Nathan Chancellor
CalculateWatermarksAndDRAMSpeedChangeSupport() CalculateWatermarksAndDRAMSpeedChangeSupport() has a large number of parameters, which must be passed on the stack. Most of the parameters between the two callsites are the same, so they can be accessed through the existing mode_lib pointer, instead of being passed as explicit arguments. Doing this reduces the stack size of dml30_ModeSupportAndSystemConfigurationFull() from 1912 bytes to 1840 bytes building for x86_64 with clang-22, helping stay under the 2048 byte limit for display_mode_vba_30.c. Additionally, now that there is a pointer to mode_lib->vba available, use 'v' consistently throughout the entire function. Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/display: Reduce number of arguments of dcn30's ↵Nathan Chancellor
CalculatePrefetchSchedule() After an innocuous optimization change in clang-22, dml30_ModeSupportAndSystemConfigurationFull() is over the 2048 byte stack limit for display_mode_vba_30.c. drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.c:3529:6: warning: stack frame size (2096) exceeds limit (2048) in 'dml30_ModeSupportAndSystemConfigurationFull' [-Wframe-larger-than] 3529 | void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib) | ^ With clang-21, this function was already close to the limit: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.c:3529:6: warning: stack frame size (1912) exceeds limit (1586) in 'dml30_ModeSupportAndSystemConfigurationFull' [-Wframe-larger-than] 3529 | void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib) | ^ CalculatePrefetchSchedule() has a large number of parameters, which must be passed on the stack. Most of the parameters between the two callsites are the same, so they can be accessed through the existing mode_lib pointer, instead of being passed as explicit arguments. Doing this reduces the stack size of dml30_ModeSupportAndSystemConfigurationFull() from 2096 bytes to 1912 bytes with clang-22. Closes: https://github.com/ClangBuiltLinux/linux/issues/2117 Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/display: Apply e4479aecf658 to dmlNathan Chancellor
After an innocuous optimization change in clang-22, allmodconfig (which enables CONFIG_KASAN and CONFIG_WERROR) breaks with: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:1724:6: error: stack frame size (3144) exceeds limit (3072) in 'dml32_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than] 1724 | void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib) | ^ With clang-21, this function was already pretty close to the existing limit of 3072 bytes. drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:1724:6: error: stack frame size (2904) exceeds limit (2048) in 'dml32_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than] 1724 | void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib) | ^ A similar situation occurred in dml2, which was resolved by commit e4479aecf658 ("drm/amd/display: Increase sanitizer frame larger than limit when compile testing with clang") by increasing the limit for clang when compile testing with certain sanitizer enabled, so that allmodconfig (an easy testing target) continues to work. Apply that same change to the dml folder to clear up the warning for allmodconfig, unbreaking the build. Closes: https://github.com/ClangBuiltLinux/linux/issues/2135 Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/radeon : Use devm_i2c_add_adapter instead of i2c_add_adapterErick Karanja
Replace i2c_add_adapter() with devm_i2c_add_adapter() and remove all associated cleanup, as devm_i2c_add_adapter() handles adapter teardown automatically. Signed-off-by: Erick Karanja <karanja99erick@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdgpu: Update AMDGPU_INFO_UQ_FW_AREAS query for sdmaAlex Deucher
Add a query for sdma queues. Userspace can use this to query the size of the CSA buffers for sdma user queues. Proposed userspace: https://gitlab.freedesktop.org/yogeshmohan/mesa/-/commits/userq_query Reviewed-by: Prike Liang <Prike.Liang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amdgpu: Update AMDGPU_INFO_UQ_FW_AREAS query for computeAlex Deucher
Add a query for compute queues. Userspace can use this to query the size of the EOP buffers for compute user queues. Proposed userspace: https://gitlab.freedesktop.org/yogeshmohan/mesa/-/commits/userq_query Reviewed-by: Prike Liang <Prike.Liang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05kselftest/arm64: Support FORCE_TARGETSMark Brown
The top level kselftest Makefile supports an option FORCE_TARGETS which causes any failures during the build to be propagated to the exit status of the top level make, useful during build testing. Currently the recursion done by the arm64 selftests ignores this option, meaning arm64 failures are not reported via this mechanism. Add the logic to implement FORCE_TARGETS so that it works for arm64. Signed-off-by: Mark Brown <broonie@kernel.org> Acked-by: Shuah Khan <skhan@linuxfoundation.org> Signed-off-by: Will Deacon <will@kernel.org>
2026-01-05arm64: topology: Handle AMU FIE setup on CPU hotplugLifeng Zheng
Currently, when a cpufreq policy is created, the AMU FIE setup process checks all CPUs in the policy -- including those that are offline. If any of these CPUs are offline at that time, their AMU capability flag hasn't been verified yet, leading the check fail. As a result, AMU FIE is not enabled, even if the CPUs that are online do support it. Later, when the previously offline CPUs come online and report AMU support, there's no mechanism in place to re-enable AMU FIE for the policy. This leaves the entire frequency domain without AMU FIE, despite being eligible. Restrict the initial AMU FIE check to only those CPUs that are online at the time the policy is created, and allow CPUs that come online later to join the policy with AMU FIE enabled. Signed-off-by: Lifeng Zheng <zhenglifeng1@huawei.com> Acked-by: Beata Michalska <beata.michalska@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
2026-01-05cpufreq: Add new helper function returning cpufreq policyLifeng Zheng
cpufreq_cpu_get_raw() gets cpufreq policy only if the CPU is in policy->cpus mask, which means the CPU is already online. But in some cases, the policy is needed before the CPU is added to cpus mask. Add a function to get the policy in these cases. Signed-off-by: Lifeng Zheng <zhenglifeng1@huawei.com> Reviewed-by: Rafael J. Wysocki (Intel) <rafael@kernel.org> Reviewed-by: Jie Zhan <zhanjie9@hisilicon.com> Acked-by: Beata Michalska <beata.michalska@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
2026-01-05arm64: topology: Skip already covered CPUs when setting freq sourceLifeng Zheng
The scale freq source of the CPUs in 'amu_fie_cpus' mask are already set to AMU tick before, so in amu_fie_setup(), only the CPUs in the 'cpus' mask should be set. Signed-off-by: Lifeng Zheng <zhenglifeng1@huawei.com> Reviewed-by: Beata Michalska <beata.michalska@arm.com> Reviewed-by: Jie Zhan <zhanjie9@hisilicon.com> Acked-by: Beata Michalska <beata.michalska@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
2026-01-05remoteproc: imx_dsp_rproc: Only reset carveout memory at RPROC_OFFLINE stateShengjiu Wang
Do not reset memory at suspend and resume stage, because some memory is used to save the software state for resume, if it is cleared, the resume operation can fail. Fixes: c4c432dfb00f ("remoteproc: imx_dsp_rproc: Add support of recovery and coredump process") Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com> Link: https://lore.kernel.org/r/20251218071750.2692132-1-shengjiu.wang@nxp.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
2026-01-05arm64: Add support for TSV110 Spectre-BHB mitigationJinqian Yang
The TSV110 processor is vulnerable to the Spectre-BHB (Branch History Buffer) attack, which can be exploited to leak information through branch prediction side channels. This commit adds the MIDR of TSV110 to the list for software mitigation. Signed-off-by: Jinqian Yang <yangjinqian1@huawei.com> Reviewed-by: Zenghui Yu <zenghui.yu@linux.dev> Signed-off-by: Will Deacon <will@kernel.org>
2026-01-05MAINTAINERS: Update the maintainers for ARM64 ACPIHanjun Guo
ARM64 ACPI patches go via ARM64 tree, but the listed maintainers for ARM64 ACPI don't include Catalin and Will, and there is no F: line under the ARM64 architecture entry, so emails will not route to Catalin and Will in an automatic way. Adding Catalin and Will to the maintainers entry for ARM64 ACPI to fix the problem, it will make life easy for merging ARM64 ACPI patches. Adding new maintainer entries for ARM64 ACPI doesn't mean the review work will balance to the new maintainer, patches still need to be acked by currently listed folks (Lorenzo, Hanjun, Sudeep) before merging them. Link: https://lore.kernel.org/linux-acpi/aS2ZTfS9YVO98Exe@willie-the-truck/ Signed-off-by: Hanjun Guo <guohanjun@huawei.com> Acked-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Signed-off-by: Will Deacon <will@kernel.org>
2026-01-05drivers: perf: use bitmap_empty() where appropriateYury Norov (NVIDIA)
bitmap_empty() is more verbose and efficient, as it stops traversing bitmaps as soon as the 1st set bit found. Switch perf code to using bitmap_empty() where appropriate, and correspondingly use boolean types. Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com> Signed-off-by: Will Deacon <will@kernel.org>
2026-01-05iommu/arm-smmu-v3: Improve CMDQ lock fairness and efficiencyAlexander Grest
The SMMU CMDQ lock is highly contentious when there are multiple CPUs issuing commands and the queue is nearly full. The lock has the following states: - 0: Unlocked - >0: Shared lock held with count - INT_MIN+N: Exclusive lock held, where N is the # of shared waiters - INT_MIN: Exclusive lock held, no shared waiters When multiple CPUs are polling for space in the queue, they attempt to grab the exclusive lock to update the cons pointer from the hardware. If they fail to get the lock, they will spin until either the cons pointer is updated by another CPU. The current code allows the possibility of shared lock starvation if there is a constant stream of CPUs trying to grab the exclusive lock. This leads to severe latency issues and soft lockups. Consider the following scenario where CPU1's attempt to acquire the shared lock is starved by CPU2 and CPU0 contending for the exclusive lock. CPU0 (exclusive) | CPU1 (shared) | CPU2 (exclusive) | `cmdq->lock` -------------------------------------------------------------------------- trylock() //takes | | | 0 | shared_lock() | | INT_MIN | fetch_inc() | | INT_MIN | no return | | INT_MIN + 1 | spins // VAL >= 0 | | INT_MIN + 1 unlock() | spins... | | INT_MIN + 1 set_release(0) | spins... | | 0 see[NOTE] (done) | (sees 0) | trylock() // takes | 0 | *exits loop* | cmpxchg(0, INT_MIN) | 0 | | *cuts in* | INT_MIN | cmpxchg(0, 1) | | INT_MIN | fails // != 0 | | INT_MIN | spins // VAL >= 0 | | INT_MIN | *starved* | | INT_MIN [NOTE] The current code resets the exclusive lock to 0 regardless of the state of the lock. This causes two problems: 1. It opens the possibility of back-to-back exclusive locks and the downstream effect of starving shared lock. 2. The count of shared lock waiters are lost. To mitigate this, we release the exclusive lock by only clearing the sign bit while retaining the shared lock waiter count as a way to avoid starving the shared lock waiters. Also deleted cmpxchg loop while trying to acquire the shared lock as it is not needed. The waiters can see the positive lock count and proceed immediately after the exclusive lock is released. Exclusive lock is not starved in that submitters will try exclusive lock first when new spaces become available. Reviewed-by: Mostafa Saleh <smostafa@google.com> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com> Signed-off-by: Alexander Grest <Alexander.Grest@microsoft.com> Signed-off-by: Jacob Pan <jacob.pan@linux.microsoft.com> Signed-off-by: Will Deacon <will@kernel.org>
2026-01-05ARM: dts: omap: dra7: Remove bogus #syscon-cells propertyVladimir Zapolskiy
There is no such dt binding property as '#syscon-cells', remove it. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Link: https://patch.msgid.link/20251230234040.2083889-1-vz@mleia.com Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2026-01-05ARM: omap1: drop unused Kconfig symbolRandy Dunlap
"select ARCH_HAS_HOLES_MEMORYMODEL" was mistakenly merged here due to a botched rebase (says Arnd [1]). Drop that line since that symbol is not used anywhere else in the kernel source tree. [1] https://lore.kernel.org/all/5e335232-89b4-4c35-93bd-efad7e4d8995@app.fastmail.com/ Fixes: 7036440eab3e ("ARM: omap1: enable multiplatform") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reviewed-by: Aaro Koskinen <aaro.koskinen@iki.fi> Link: https://patch.msgid.link/20251230055230.3212260-1-rdunlap@infradead.org Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2026-01-05ARM: dts: ti/omap: omap*: fix watchdog node namesAndreas Kemnade
Watchdog nodes should be named watchdog@ and not wdg@. Fix that. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Link: https://patch.msgid.link/20251224093457.558477-1-andreas@kemnade.info Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2026-01-05ARM: omap2: Fix reference count leaks in omap_control_init()Wentao Liang
The of_get_child_by_name() function increments the reference count of child nodes, causing multiple reference leaks in omap_control_init(): 1. scm_conf node never released in normal/error paths 2. clocks node leak when checking existence 3. Missing scm_conf release before np in error paths Fix these leaks by adding proper of_node_put() calls and separate error handling. Fixes: e5b635742e98 ("ARM: OMAP2+: control: add syscon support for register accesses") Cc: stable@vger.kernel.org Signed-off-by: Wentao Liang <vulab@iscas.ac.cn> Reviewed-by: Andreas Kemnade <andreas@kemnade.info> Link: https://patch.msgid.link/20251217142122.1861292-1-vulab@iscas.ac.cn Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2026-01-05ARM: dts: ti: Drop unused .dtsiRob Herring (Arm)
These .dtsi files are not included anywhere in the tree and can't be tested. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251212203226.458694-6-robh@kernel.org Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2026-01-05ARM: dts: Drop am335x-base0033 devicetreeKory Maincent (TI.com)
Remove the am335x-base0033 devicetree as it has been non-functional since 2017 (Linunx v4.14) when the ti,tilcdc,slave binding was removed. The HDMI output on this board has been broken for over 8 years without any reported issues or attempts to fix it, indicating this devicetree is no longer in active use. Signed-off-by: Kory Maincent (TI.com) <kory.maincent@bootlin.com> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com> Link: https://patch.msgid.link/20251204092346.1076836-1-kory.maincent@bootlin.com Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2026-01-05ARM: dts: tps65910: Add gpio & interrupt propertiesAlexander Stein
The binding document ti,tps65910.yaml requires the controller and cells properties for both gpio and interrupts. As they have const and fixed values a default can be provided for all users. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Link: https://patch.msgid.link/20251118154856.2015184-1-alexander.stein@ew.tq-group.com Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2026-01-05ARM: dts: omap: enable panic-indicator optionYegor Yefremov
Use onrisc:red:power as a panic indicator. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Link: https://patch.msgid.link/20251117113535.2248177-1-yegorslists@googlemail.com Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2026-01-05ARM: dts: ti/omap: omap4-epson-embt2ws: add powerbuttonAndreas Kemnade
There is a power button connected to the PMIC, so describe it to be able to power off the device in a convenient manner. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Link: https://patch.msgid.link/20251106-twl6030-button-v4-3-fdf1aa6e1e9a@kernel.org Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2026-01-05drm/i915/cdclk: Implement Wa_13012396614Gustavo Sousa
A new workaround was defined for Xe3_LPD, which requires a tweak on how we handle MDCLK selection. Implement it. Reviewed-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> Link: https://patch.msgid.link/20251222-display-wa-13012396614-timing-of-mdclk-source-selection-v1-2-a2f7e9447f7a@intel.com Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
2026-01-05drm/i915/display_wa: Keep enum intel_display_wa sortedGustavo Sousa
For a consistent way of updating enum intel_display_wa, let's sort it by lineage number and add a comment asking for future updates to keep it sorted. In the same way, let's also keep __intel_display_wa() sorted. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patch.msgid.link/20251222-display-wa-13012396614-timing-of-mdclk-source-selection-v1-1-a2f7e9447f7a@intel.com Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
2026-01-05soc: ti: knav_dma: Simplify with scoped for each OF child loopKrzysztof Kozlowski
Use scoped for-each loop when iterating over device nodes to make code a bit simpler. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260102124729.63964-10-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Nishanth Menon <nm@ti.com>
2026-01-05soc: ti: knav: Simplify with scoped for each OF child loopKrzysztof Kozlowski
Use scoped for-each loop when iterating over device nodes to make code a bit simpler. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260102124729.63964-9-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Nishanth Menon <nm@ti.com>
2026-01-05soc: ti: knav_dma: Simplify error messages in probeKrzysztof Kozlowski
Simplify the code by using dev_err_probe() and local 'dev' variable. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260102124729.63964-8-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Nishanth Menon <nm@ti.com>
2026-01-05soc: ti: knav_dma: Remove ENOMEM printksKrzysztof Kozlowski
Printing messages on ENOMEM errors is redundant and discouraged, because core already prints detailed report. Simplify the code by dropping such dev_err(). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260102124729.63964-7-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Nishanth Menon <nm@ti.com>
generated by cgit v1.2.3 (git 2.25.1) at 2026-05-19 23:50:38 +0000