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2026-01-15drm/i915/dsc: Add intel_dsc_get_slice_config()Imre Deak
Add intel_dsc_get_slice_config() and move the logic to select a given slice configuration to that function from the configuration loop in intel_dp_dsc_get_slice_count(). The same functionality can be used by other outputs like DSI as well, done as a follow-up. Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260114162232.92731-12-imre.deak@intel.com
2026-01-15drm/i915/dp: Simplify the DSC slice config loop's slices-per-pipe iterationImre Deak
Simplify the slice config loop in intel_dp_dsc_get_slice_count(), using the loop iterator as the slices-per-pipe value directly, instead of looking up the same value from an array. While at it move the code comment about the slice configuration closer to where the configuration is determined and clarify it a bit. Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260114162232.92731-11-imre.deak@intel.com
2026-01-15drm/i915/dp: Rename test_slice_count to slices_per_lineImre Deak
Rename test_slice_count to slices_per_line for clarity. Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260114162232.92731-10-imre.deak@intel.com
2026-01-15drm/i915/dp: Use int for DSC slice count variablesImre Deak
There is no reason to use the more specific u8 type for slice count variables, use the more generic int type instead. Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260114162232.92731-9-imre.deak@intel.com
2026-01-15drm/i915/dp: Factor out intel_dp_dsc_min_slice_count()Imre Deak
Factor out intel_dp_dsc_min_slice_count() for making intel_dp_dsc_get_slice_count() more readable and also to prepare for a follow-up change unifying the eDP and DP slice count/config computation. Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260114162232.92731-8-imre.deak@intel.com
2026-01-15drm/i915/dsc: Switch to using intel_dsc_line_slice_count()Imre Deak
By now all the places are updated to track the DSC slice configuration in intel_crtc_state::dsc.slice_config, so calculate the slices-per-line value using that config, instead of using intel_crtc_state::dsc.slice_count caching the same value and remove the cached slice_count. v2: Rebase on latest drm-tip, converting another user of dsc.slice_count in intel_vdsc_min_cdclk(). Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> # v1 Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260114162232.92731-7-imre.deak@intel.com
2026-01-15drm/i915/dp: Track the detailed DSC slice configurationImre Deak
Add tracking for the DP DSC pipes-per-line and slices-per-stream value in the slice config state and compute the current slices-per-line (slice_count) value using this slice config. The slices-per-line value used atm will be removed by a follow-up change after converting all the places using it to use the slice config instead. For now the slices-per-stream value is calculated based on the slices-per-line value (slice_count) calculated by the drm_dp_dsc_sink_max_slice_count() / intel_dp_dsc_get_slice_count() functions. In a follow-up change these functions will be converted to calculate the slices-per-stream value directly, along with the detailed slice configuration. Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260114162232.92731-6-imre.deak@intel.com
2026-01-15drm/i915/dsi: Track the detailed DSC slice configurationImre Deak
Add tracking for the DSI DSC pipes-per-line and slices-per-stream value in the slice config state and compute the current slices-per-line value using this slice config state. The slices-per-line value used atm will be removed by a follow-up change after converting all the places using it to use the detailed slice config instead. Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260114162232.92731-5-imre.deak@intel.com
2026-01-15drm/i915/dsi: Move initialization of DSI DSC streams-per-pipe to fill_dsc()Imre Deak
Move the initialization of the DSI DSC streams-per-pipe value to fill_dsc() next to where the corresponding (per-line) slice_count value is initialized. This allows converting the initialization to use the detailed slice configuration state in follow-up changes. Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260114162232.92731-4-imre.deak@intel.com
2026-01-15drm/i915/dsc: Track the DSC stream count in the DSC slice config stateImre Deak
Move the tracking for the DSC stream count from intel_crtc_state::dsc.num_streams to intel_crtc_state::dsc.slice_config.streams_per_pipe. While at it add a TODO comment to read out the full DSC configuration from HW including the pipes-per-line and slices-per-stream values. Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260114162232.92731-3-imre.deak@intel.com
2026-01-15drm/i915/dsc: Track the detaild DSC slice configurationImre Deak
Add a way to track the detailed DSC pipes-per-line, streams-per-pipe, slices-per-stream configuration instead of the current streams-per-pipe and slices-per-line value. This way describes the slice configuration in a clearer way, for instance providing a 2 pipes-per-line x 2 streams-per-pipe x 2 slices-per-stream = 8 slices-per-line view, instead of the current, coarser 2 streams-per-pipe, 8 slices-per-line view, the former better reflecting that each DSC stream engine has 2 slices. This also let's optimizing the configuration in a simpler/clearer way, for instance using 1 stream x 2 slices, or 1 stream x 4 slices instead of the current 2 stream x 1 slice, or 2 streams x 2 slices configuration (so that 1 DSC stream engine can be powered off in each pipe). Follow-up changes will convert the current slices-per-line computation logic to compute instead the above detailed slice configuration. Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260114162232.92731-2-imre.deak@intel.com
2026-01-15Merge tag 'net-6.19-rc6' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net Pull networking fixes from Paolo Abeni: "Including fixes from bluetooth, can and IPsec. Current release - regressions: - net: add net.core.qdisc_max_burst - can: propagate CAN device capabilities via ml_priv Previous releases - regressions: - dst: fix races in rt6_uncached_list_del() and rt_del_uncached_list() - ipv6: fix use-after-free in inet6_addr_del(). - xfrm: fix inner mode lookup in tunnel mode GSO segmentation - ip_tunnel: spread netdev_lockdep_set_classes() - ip6_tunnel: use skb_vlan_inet_prepare() in __ip6_tnl_rcv() - bluetooth: hci_sync: enable PA sync lost event - eth: virtio-net: - fix the deadlock when disabling rx NAPI - fix misalignment bug in struct virtnet_info Previous releases - always broken: - ipv4: ip_gre: make ipgre_header() robust - can: fix SSP_SRC in cases when bit-rate is higher than 1 MBit. - eth: - mlx5e: profile change fix - octeon_ep_vf: fix free_irq dev_id mismatch in IRQ rollback - macvlan: fix possible UAF in macvlan_forward_source()" * tag 'net-6.19-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (37 commits) virtio_net: Fix misalignment bug in struct virtnet_info net: can: j1939: j1939_xtp_rx_rts_session_active(): deactivate session upon receiving the second rts can: raw: instantly reject disabled CAN frames can: propagate CAN device capabilities via ml_priv Revert "can: raw: instantly reject unsupported CAN frames" net/sched: sch_qfq: do not free existing class in qfq_change_class() selftests: drv-net: fix RPS mask handling for high CPU numbers selftests: drv-net: fix RPS mask handling in toeplitz test ipv6: Fix use-after-free in inet6_addr_del(). dst: fix races in rt6_uncached_list_del() and rt_del_uncached_list() net: hv_netvsc: reject RSS hash key programming without RX indirection table tools: ynl: render event op docs correctly net: add net.core.qdisc_max_burst net: airoha: Fix typo in airoha_ppe_setup_tc_block_cb definition net: phy: motorcomm: fix duplex setting error for phy leds net: octeon_ep_vf: fix free_irq dev_id mismatch in IRQ rollback net/mlx5e: Restore destroying state bit after profile cleanup net/mlx5e: Pass netdev to mlx5e_destroy_netdev instead of priv net/mlx5e: Don't store mlx5e_priv in mlx5e_dev devlink priv net/mlx5e: Fix crash on profile change rollback failure ...
2026-01-15drm/xe: Reduce LRC timestamp stuck message on VFs to noticeMatthew Brost
An LRC timestamp getting stuck is a somewhat normal occurrence. If a single VF submits a job that does not get timesliced, the LRC timestamp will not increment. Reduce the LRC timestamp stuck message on VFs to notice (same log level as job timeout) to avoid false CI bugs in tests where a VF submits a job that does not get timesliced. Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/7032 Fixes: bb63e7257e63 ("drm/xe: Avoid toggling schedule state to check LRC timestamp in TDR") Suggested-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Stuart Summers <stuart.summers@intel.com> Link: https://patch.msgid.link/20260114184905.4189026-1-matthew.brost@intel.com
2026-01-15i2c: rtl9300: use of instead of fwnodeRosen Penev
Avoids having to use to_of_node and just assign directly. This is an OF only driver anyway. Use _scoped for the for each loop to avoid refcount leaks. Signed-off-by: Rosen Penev <rosenp@gmail.com> Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20251217063027.37987-3-rosenp@gmail.com
2026-01-15i2c: rtl9300: remove const castRosen Penev
These casts are used to remove const for no good reason. Fix the types instead. Signed-off-by: Rosen Penev <rosenp@gmail.com> Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20251217063027.37987-2-rosenp@gmail.com
2026-01-15block: improve blk_op_str() commentDamien Le Moal
Replace XXX with what it actually means. Signed-off-by: Damien Le Moal <dlemoal@kernel.org> Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-01-15block: fix blk_zone_cond_str() commentDamien Le Moal
Fix the comment for blk_zone_cond_str() by replacing the meaningless BLK_ZONE_ZONE_XXX comment with the correct BLK_ZONE_COND_name, thus also replacing the XXX with what that actually means. Signed-off-by: Damien Le Moal <dlemoal@kernel.org> Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-01-15ACPICA: Refactor for TPR Base/Limit registers bitmasksMichal Camacho Romero
Link: https://github.com/acpica/acpica/commit/5cb62a1d4970 Signed-off-by: Michal Camacho Romero <michal.camacho.romero@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3193976.CbtlEUcBR6@rafael.j.wysocki
2026-01-15ACPICA: Replace TPRn Base and Limit registersMichal Camacho Romero
Replace TPRn Base and Limit registers with compatible bitmasks for them. Link: https://github.com/acpica/acpica/commit/be91c5813936 Signed-off-by: Michal Camacho Romero <michal.camacho.romero@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/1871109.TLkxdtWsSY@rafael.j.wysocki
2026-01-15ACPICA: Logfile: Changes for version 20251212Saket Dumbre
Link: https://github.com/acpica/acpica/commit/446be438238e Signed-off-by: Saket Dumbre <saket.dumbre@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/15657187.tv2OnDr8pf@rafael.j.wysocki
2026-01-15ACPICA: Align comments in TPRn-related structuresMichal Camacho Romero
Align comments in ACPI_TPRN_BASE_REG and ACPI_TPRN_LIMIT_REG structures. Link: https://github.com/acpica/acpica/commit/95815d550969 Signed-off-by: Michal Camacho Romero <michal.camacho.romero@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/2286538.NgBsaNRSFp@rafael.j.wysocki
2026-01-15ACPICA: Cleanup comments and DTPR Table handle functionsMichal Camacho Romero
Link: https://github.com/acpica/acpica/commit/cc480264335e Signed-off-by: Michal Camacho Romero <michal.camacho.romero@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/2042656.yKVeVyVuyW@rafael.j.wysocki
2026-01-15ACPICA: Verify DTPR and TPR Instance buffer pointersMichal Camacho Romero
Verify DTPR and TPR Instance buffer pointers and refactor comments. Link: https://github.com/acpica/acpica/commit/bdec5b61cf5b Signed-off-by: Michal Camacho Romero <michal.camacho.romero@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/884204745.0ifERbkFSE@rafael.j.wysocki
2026-01-15ACPICA: Fix Segmentation Fault error related to DTPRMichal Camacho Romero
Fix Segmentation Fault error, caused by invalid buffer lenght in DTPR Table Template: * Update buffer length for TPR Table, which invalid value caused Segmentation Fault, during ASL file production. * Refactor invalid values of TPR instances, arrays and serialization requests count and TPR Base addresses in the DTPR table template. * Fix offset updating in the acpi_dm_dump_dtpr function. Link: https://github.com/acpica/acpica/commit/f75850bc4717 Signed-off-by: Michal Camacho Romero <michal.camacho.romero@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/2541195.jE0xQCEvom@rafael.j.wysocki
2026-01-15ACPICA: Create auxiliary ACPI_TPR_AUX_SR structure for iASL compilerMichal Camacho Romero
Define unofficial structure ACPI_TPR_AUX_SR, which holds information about the number of serialization registers for TPRs. It simplifies DTPR Serialization Request Info Table compilation. Link: https://github.com/acpica/acpica/commit/31f470e708a9 Signed-off-by: Michal Camacho Romero <michal.camacho.romero@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/2266165.Icojqenx9y@rafael.j.wysocki
2026-01-15ACPICA: ACPI 6.6: Add _VDM (Voltage Domain) objectPawel Chmielewski
A processor voltage domain is an identifier that specifies the voltage plane associated with a given group of processors. Refer to section 6.2.10. _VDM (Voltage Domain) of ACPI 6.6 specification for more information. Link: https://github.com/acpica/acpica/commit/d0dbb157646d Signed-off-by: Pawel Chmielewski <pawel.chmielewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/1921526.atdPhlSkOF@rafael.j.wysocki
2026-01-15ACPICA: actbl3.h: ACPI 6.6: SRAT: New flag in Memory Affinity StructurePawel Chmielewski
ACPI 6.6 introduces Specific-Purpose flag to Memory Affinity structure. Link: https://github.com/acpica/acpica/commit/cfce3b689b5e Signed-off-by: Pawel Chmielewski <pawel.chmielewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3868802.MHq7AAxBmi@rafael.j.wysocki
2026-01-15ACPICA: actbl2.h: ACPI 6.6: RAS2: Update Parameter Block structurePawel Chmielewski
ACPI 6.6 introduces RAS2 enhancements for patrol scrub functionality, adding new fields to the Parameter Block structure. These fields are applicable only in the response to the GET_PATROL_PARAMETERS command. Link: https://github.com/acpica/acpica/commit/062842024000 Signed-off-by: Pawel Chmielewski <pawel.chmielewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/2263284.Mh6RI2rZIc@rafael.j.wysocki
2026-01-15ACPICA: Add Arm IORT IWB node definitionsJose Marinho
The IORT IUWB node is defined in IORT issue E.g See https://developer.arm.com/documentation/den0049/eg Link: https://github.com/acpica/acpica/commit/a90dc2f5380c Signed-off-by: Jose Marinho <jose.marinho@arm.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/2691130.Lt9SDvczpP@rafael.j.wysocki
2026-01-15ACPICA: Add GICv5 MADT structuresJose Marinho
The GICv5 adds the following MADT structures: - IRS - ITS Config Frame - ITS Translate Frame The ACPI spec ECR is at https://github.com/tianocore/edk2/issues/11148 Link: https://github.com/acpica/acpica/commit/69cca52ddf04 Signed-off-by: Jose Marinho <jose.marinho@arm.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/1953107.CQOukoFCf9@rafael.j.wysocki
2026-01-15ACPICA: Fix asltests using the Fatal() opcodeArmin Wolf
Some asltests test the behavior of the Fatal() opcode and thus require that said opcode does not return an error when called. Introduce a compile-time option called ACPI_CONTINUE_ON_FATAL to instruct the executor to continue the execution of AML bytecode when encountering a Fatal() opcode. Also update the asltest to use this new option. Fixes: ("Abort AML bytecode execution when executing AML_FATAL_OP") Link: https://github.com/acpica/acpica/commit/428b3410c490 Signed-off-by: Armin Wolf <W_Armin@gmx.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/2052065.usQuhbGJ8B@rafael.j.wysocki
2026-01-15ACPICA: ACPI 6.4: PPTT: include all fields in subtable type1Ben Horgan
In PPTT version 3 an extra field, Cache ID, was added to the Cache Type Structure. The struct, struct acpi_pptt_cache_v1, contains only this field. This differs from the treatment of other versioned structures and is unexpected for linux which reuses the actbl2.h header file. Include all the fields of the new Cache Type Structure in struct acpi_pptt_cache_v1 and fix up all uses. Link: https://github.com/acpica/acpica/commit/a9ec9105f552 Signed-off-by: Ben Horgan <ben.horgan@arm.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/1851677.VLH7GnMWUR@rafael.j.wysocki
2026-01-15ACPICA: Abort AML bytecode execution when executing AML_FATAL_OPArmin Wolf
The ACPI specification states that when executing AML_FATAL_OP, the OS should log the fatal error event and shutdown in a timely fashion. Windows complies with this requirement by immediatly entering a Bso_d, effectively aborting the execution of the AML bytecode in question. ACPICA however might continue with the AML bytecode execution should acpi_os_signal() simply return AE_OK. This will cause issues because ACPI BIOS implementations might assume that the Fatal() operator does not return. Fix this by aborting the AML bytecode execution in such a case by returning AE_ERROR. Also turn struct acpi_signal_fatal_info into a local variable because of its small size (12 bytes) and to ensure that acpi_os_signal() always receives valid information about the fatal ACPI BIOS error. Link: https://github.com/acpica/acpica/commit/d516c7758ba6 Signed-off-by: Armin Wolf <W_Armin@gmx.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3325491.5fSG56mABF@rafael.j.wysocki
2026-01-15ACPICA: Define DTPR structure related info tables and data templateMichal Camacho Romero
* DTPR Table Info * TPR Instance Table Info * TPR Array Table Info * TPR Serialize Request Table Info * DTPR Table Data Template Link: https://github.com/acpica/acpica/commit/abadf1d34732 Signed-off-by: Michal Camacho Romero <michal.camacho.romero@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3676546.iIbC2pHGDl@rafael.j.wysocki
2026-01-15ACPICA: Add DTPR table support for the ASL compilerMichal Camacho Romero
Define DTPR related structures offsets. Link: https://github.com/acpica/acpica/commit/c6fc16c8936d Signed-off-by: Michal Camacho Romero <michal.camacho.romero@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/7902293.EvYhyI6sBW@rafael.j.wysocki
2026-01-15ACPICA: iASL: Add definitions for the IOVT tableXianglai Li
Add definitions for the IOVT table and its subtables. Link: https://github.com/acpica/acpica/commit/14c0def532ac Signed-off-by: Xianglai Li <lixianglai@loongson.cn> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/2031013.PYKUYFuaPT@rafael.j.wysocki
2026-01-15ACPICA: Add support for the Microsoft display mux _OSI stringArmin Wolf
As per [1]. Link: https://learn.microsoft.com/en-us/windows-hardware/drivers/display/automatic-display-switch [1] Link: https://github.com/acpica/acpica/commit/28b644211ff2 Signed-off-by: Armin Wolf <W_Armin@gmx.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/10790566.nUPlyArG6x@rafael.j.wysocki
2026-01-15ACPICA: Add KEYP table definitionDave Jiang
Software uses this table to discover the base address of the Key Configuration Unit (KCU) register block associated with each IDE capable host bridge. [1]: Root Complex IDE Key Configuration Unit Software Programming Guide https://cdrdv2.intel.com/v1/dl/getContent/732838 Link: https://github.com/acpica/acpica/commit/af970172e2dd Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3401908.44csPzL39Z@rafael.j.wysocki
2026-01-15ACPICA: Fix NULL pointer dereference in acpi_ev_address_space_dispatch()Alexey Simakov
Cover a missed execution path with a new check. Fixes: 0acf24ad7e10 ("ACPICA: Add support for PCC Opregion special context data") Link: https://github.com/acpica/acpica/commit/f421dd9dd897 Signed-off-by: Alexey Simakov <bigalex934@gmail.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3030574.e9J7NaK4W3@rafael.j.wysocki
2026-01-15ACPICA: Add UUIDs associated with TPM 2.0 devicesArmin Wolf
The Trusted Computing Group has designed multiple interface extensions around TPM 2.0 devices including the ACPI start method, hardware information and memory clear features. Add the associated UUIDs to the list of known UUIDs so that the ASL compiler stops complaining about them. Link: https://github.com/acpica/acpica/commit/0e8b10b05825 Signed-off-by: Armin Wolf <W_Armin@gmx.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/2254685.irdbgypaU6@rafael.j.wysocki
2026-01-15ACPICA: Add UUID for Microsoft fan extensionsArmin Wolf
Microsoft has designed an interface for reading/writing fan speed trip points. Add the associated UUID to the list of known UUIDs so that the ASL compiler stops complaining about it. Link: https://github.com/acpica/acpica/commit/67f0202c0fb4 Signed-off-by: Armin Wolf <W_Armin@gmx.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/5045837.GXAFRqVoOG@rafael.j.wysocki
2026-01-15ACPICA: ACPICA: replace ACPI_FREE() with acpi_ut_delete_object_desc()Zilin Guan
acpi_ut_create_internal_object() may allocate memory from a slab cache via kmem_cache_zalloc(), but the code currently frees it with ACPI_FREE(), which calls kfree(). This mismatch prevents the object from being released properly and may lead to memory leaks or other issues. Fix this by replacing ACPI_FREE() with acpi_ut_delete_object_desc(), which matches the allocation method used for internal objects. Link: https://github.com/acpica/acpica/commit/a1c55dfea194 Signed-off-by: Zilin Guan <zilin@seu.edu.cn> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/4710853.LvFx2qVVIh@rafael.j.wysocki
2026-01-15ACPICA: Add support for the new ACPI Table: DTPRMichal Camacho Romero
Define a new the ACPI Table, structure and registers, related with it, according to the latest version of the Intel TXT DMA Protection Ranges (TPR) specification (Revision 0.73): * DTPR ACPI Table * TPR Base Register * TPR Serialize Request Register * TPR Limit Register * TPR Instance Structure * DMAR TXT Protected Reporting Structure These structures will be used to handle TPRs on the Intel CPU's. Link: https://github.com/acpica/acpica/commit/10e7a88f70da Link: https://uefi.org/sites/default/files/resources/633933_Intel_TXT_DMA_Protection_Ranges_rev_0p73.pdf Signed-off-by: Michal Camacho Romero <michal.camacho.romero@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/6234415.lOV4Wx5bFT@rafael.j.wysocki
2026-01-15Merge tag 'v6.19-rockchip-dtsfixes1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes In terms of bigger fixes, RK3576 GPU register range was overflowing into the next peripheral, Nano Pi M5 sound was not working correctly, the adc-keys voltage levels for 2 buttons on the Pinephone Pro were wrong and a really wrong PCIe linkspeed was removed from helios64. Apart from that there are a number of dt-cleanlieness fixes. * tag 'v6.19-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: Drop unsupported properties arm64: dts: rockchip: Fix gpio pinctrl node names arm64: dts: rockchip: Fix pinctrl property typo on rk3326-odroid-go3 arm64: dts: rockchip: Drop "sitronix,st7789v" fallback compatible from rk3568-wolfvision arm64: dts: rockchip: Fix wrong register range of rk3576 gpu arm64: dts: rockchip: Configure MCLK for analog sound on NanoPi M5 arm64: dts: rockchip: Fix headphones widget name on NanoPi M5 arm64: dts: rockchip: remove redundant max-link-speed from nanopi-r4s arm64: dts: rockchip: remove dangerous max-link-speed from helios64 arm64: dts: rockchip: fix unit-address for RK3588 NPU's core1 and core2's IOMMU arm64: dts: rockchip: Fix wifi interrupts flag on Sakura Pi RK3308B arm64: dts: rockchip: Fix voltage threshold for volume keys for Pinephone Pro Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-15Merge tag 'at91-fixes-6.19' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixes Microchip AT91 fixes for v6.19 This update includes: - fix access to the PHYs on the Microchip LAN966X PCB8290 board - fix the ranges DT property for flexcom9 on the Microchip SAMA7D65 SoC - fix the #size-cells DT property for i2c3 on the Microchip SAMA7D65 SoC * tag 'at91-fixes-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: microchip: sama7d65: fix size-cells property for i2c3 ARM: dts: microchip: sama7d65: fix the ranges property for flx9 ARM: dts: microchip: lan966x: Fix the access to the PHYs for pcb8290 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-15MAINTAINERS: update email address for Yixun LanYixun Lan
Switch my email address to kernel.org account for more convenience. Also add entries to the mailmap. Signed-off-by: Yixun Lan <dlan@kernel.org> Link: https://lore.kernel.org/r/20260115-11-maintainer-dlan-v1-1-64bb698da846@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-15Revert "arm64: tegra: Add interconnect properties for Tegra210"Jon Hunter
Commit 59a42707a094 ("arm64: tegra: Add interconnect properties for Tegra210") populated interconnect properties for Tegra210 and this is preventing the Tegra DRM driver from probing successfully. The following error is observed on boot ... drm drm: failed to initialize 54240000.dc: -517 For now revert this change, until a fix is available. Fixes: 59a42707a094 ("arm64: tegra: Add interconnect properties for Tegra210") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-15KVM: arm64: Prevent host from managing timer offsets for protected VMsFuad Tabba
For protected VMs, the guest's timer offset state should not be controlled by the host and must always run with a virtual counter offset of 0. The existing timer logic allowed the host to set and manage the timer counter offsets for protected VMs in certain cases. Disable all host-side management of timer offsets for protected VMs by adding checks in the relevant code paths. Signed-off-by: Fuad Tabba <tabba@google.com> Link: https://patch.msgid.link/20251211104710.151771-10-tabba@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2026-01-15KVM: arm64: Check whether a VM IOCTL is allowed in pKVMFuad Tabba
Certain VM IOCTLs are tied to specific VM features. Since pKVM does not support all features, restrict which IOCTLs are allowed depending on whether the associated feature is supported. Use the existing VM capability check as the source of truth to whether an IOCTL is allowed for a particular VM by mapping the IOCTLs with their associated capabilities. Suggested-by: Oliver Upton <oupton@kernel.org> Signed-off-by: Fuad Tabba <tabba@google.com> Link: https://patch.msgid.link/20251211104710.151771-9-tabba@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2026-01-15KVM: arm64: Track KVM IOCTLs and their associated KVM capsFuad Tabba
Track KVM IOCTLs (VM IOCTLs for now), and the associated KVM capability that enables that IOCTL. Add a function that performs the lookup. This will be used by CoCo VM Hypervisors (e.g., pKVM) to determine whether a particular KVM IOCTL is allowed for its VMs. Suggested-by: Oliver Upton <oupton@kernel.org> Signed-off-by: Fuad Tabba <tabba@google.com> [maz: don't expose KVM_CAP_BASIC to userspace, and rely on NR_VCPUS as a proxy for this] Link: https://patch.msgid.link/20251211104710.151771-8-tabba@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
generated by cgit v1.2.3 (git 2.25.1) at 2026-05-17 04:24:59 +0000