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2026-07-27KVM: guest_memfd: Drop the redundant printk on arch gmem_prepare() failureSean Christopherson
Drop guest_memfd's ratelimited printk to log "preparation" failures, as KVM SNP already logs more precise messages in all error paths, and whether or not failure to convert the pfn to private is "unexpected", i.e. warrants logging, is firmly an architecture specific detail. Reviewed-by: Ackerley Tng <ackerleytng@google.com> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Fuad Tabba <fuad.tabba@linux.dev> Link: https://patch.msgid.link/20260723210811.72720-5-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-27KVM: x86: Rename kvm_x86_ops' gmem_invalidate() to gmem_make_shared()Sean Christopherson
Rename kvm_x86_ops's gmem_invalidate() hook to gmem_make_shared(), as the hook doesn't invalidate anything, and so that KVM doesn't need to add yet another vendor callback to support "convert to shared" once in-place conversion comes along. Opportunistically wrap the ops declarations with a GMEM_RECLAIM guard so that attempting to wire up a .gmem_make_shared() hook without selecting CONFIG_HAVE_KVM_ARCH_GMEM_RECLAIM will result in a build failure. No functional change intended. Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Ackerley Tng <ackerleytng@google.com> Reviewed-by: Fuad Tabba <fuad.tabba@linux.dev> Link: https://patch.msgid.link/20260723210811.72720-4-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-27KVM: guest_memfd: Rename invalidate() arch hook to reclaim() and isolate itSean Christopherson
Rename guest_memfd's invalidate() hook to reclaim() and isolate it via its own RECLAIM Kconfig, as the hook is called when a folio is freed, which is far too late and lacks sufficient information for KVM to actually invalidate its usage of the memory. E.g. SNP uses the hook to convert memory back to SHARED so that it can be safely accessed by the host, there is no invalidation of guest mappings anywhere. Isolating the hook will also allow pKVM on arm64 to opt-in to reclaim() without also having to differentiate between reclaim and conversions to shared for active VMs. Keep guest_memfd's trampoline, even though it would be trivial to wire up .free_folio() directly to an arch callback, to avoid bleeding guest_memfd internals into arch code (specifically, avoid referencing folios in arch code). Leave the kvm_x86_ops hook as-is for the moment, as "reclaim" on SNP is the same as convert-to-shared, i.e. using a different name for the x86 hook will allow reusing it for in-place conversion. Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Fuad Tabba <fuad.tabba@linux.dev> Reviewed-by: Ackerley Tng <ackerleytng@google.com> Link: https://patch.msgid.link/20260723210811.72720-3-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-27KVM: guest_memfd: Pass the number of pages instead of the end pfn into ↵Sean Christopherson
.invalidate() Pass the number of pages to "invalidate", i.e. reclaim, instead of the end pfn, as a first step towards aligning the function prototypes between the de facto "to private" and "to shared" arch hooks. Eventually, the goal is to end up with kvm_gmem_arch_make_{private,shared}(), and in both cases, providing the number of pages makes the call sites slightly nicer, and also avoids any confusion over whether the end pfn is inclusive or exclusive. Opportunistically rename "start" to "pfn", again to align with the expected signature of make_private() (which needs to pass a starting gfn as well, at which point the "start" becomes noise). No functional change intended. Cc: Fuad Tabba <fuad.tabba@linux.dev> Cc: Ackerley Tng <ackerleytng@google.com> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Ackerley Tng <ackerleytng@google.com> Reviewed-by: Fuad Tabba <fuad.tabba@linux.dev> Link: https://patch.msgid.link/20260723210811.72720-2-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-27drm/nouveau/kms/nv50-: Unconditionally create blend_mode prop for wndwsLyude Paul
Since the commit mentioned down below, it looks like we've been triggering this WARN_ON(): [ 31.477009] ------------[ cut here ]------------ [ 31.477012] [PLANE:66:curs-0] pixel format with alpha exposed but blend mode not setup [ 31.477014] WARNING: drivers/gpu/drm/drm_mode_config.c:872 at drm_mode_config_validate+0x38c/0x4c0, CPU#1: modprobe/1264 [ 31.477125] CPU: 1 UID: 0 PID: 1264 Comm: modprobe Not tainted 7.2.0-rc2Lyude-Test+ #1 PREEMPT(lazy) [ 31.477129] Hardware name: Micro-Star International Co., Ltd. MS-7A39/A320M GAMING PRO (MS-7A39), BIOS 1.M4 05/10/2023 [ 31.477132] RIP: 0010:drm_mode_config_validate+0x394/0x4c0 [ 31.477136] Code: 41 3b 9e 80 00 00 00 73 bd 49 8b 46 78 8b 3c 98 e8 c1 3d ff ff 80 78 14 00 74 e1 48 8d 3d 64 e6 e7 01 49 8b 56 18 41 8b 76 50 <67> 48 0f b9 3a 49 8b 46 08 4c 8d 70 f8 49 39 c5 75 97 8b 95 b8 02 [ 31.477139] RSP: 0018:ffffd48e053bb7f8 EFLAGS: 00010202 [ 31.477143] RAX: ffffffffaf1da9c0 RBX: 0000000000000000 RCX: 0000000000000034 [ 31.477145] RDX: ffff8cd883c1feb0 RSI: 0000000000000042 RDI: ffffffffb069f840 [ 31.477148] RBP: ffff8cd88ea3d800 R08: 0000000034325241 R09: ffff8cd88ea3dac0 [ 31.477150] R10: fffffaf5c4043600 R11: ffff8cd88004f600 R12: 0000000000000001 [ 31.477152] R13: ffff8cd88ea3da90 R14: ffff8cd88b9ec038 R15: ffff8cd88ea3dab0 [ 31.477154] FS: 00007fb934898780(0000) GS:ffff8cd9f3a6a000(0000) knlGS:0000000000000000 [ 31.477157] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 31.477160] CR2: 0000555efff79520 CR3: 0000000122cd5000 CR4: 00000000003506f0 [ 31.477162] Call Trace: [ 31.477165] <TASK> [ 31.477168] ? nouveau_hwmon_init+0x2d6/0x330 [nouveau] [ 31.477346] drm_dev_register+0x19d/0x270 [ 31.477352] nouveau_drm_device_init+0x17a/0x230 [nouveau] [ 31.477523] nouveau_drm_probe+0x13d/0x1e0 [nouveau] [ 31.477690] local_pci_probe+0x3e/0x90 [ 31.477697] pci_call_probe+0x59/0x190 [ 31.477702] ? srso_return_thunk+0x5/0x5f [ 31.477706] ? pci_match_device+0x15a/0x180 [ 31.477710] ? pci_assign_irq+0x2d/0x160 [ 31.477714] pci_device_probe+0x95/0x160 [ 31.477719] call_driver_probe+0x26/0x100 [ 31.477724] ? driver_sysfs_add+0x59/0xd0 [ 31.477738] really_probe+0xcc/0x2c0 [ 31.477743] ? srso_return_thunk+0x5/0x5f [ 31.477749] __driver_probe_device+0x85/0x170 [ 31.477754] driver_probe_device+0x1f/0x90 [ 31.477760] ? __pfx___driver_attach+0x10/0x10 [ 31.477766] __driver_attach+0xcb/0x210 [ 31.477772] bus_for_each_dev+0x85/0xd0 [ 31.477779] bus_add_driver+0x13e/0x220 [ 31.477786] ? __pfx_init_module+0x10/0x10 [nouveau] [ 31.477979] driver_register+0x75/0xe0 [ 31.477984] ? srso_return_thunk+0x5/0x5f [ 31.477990] nouveau_drm_init+0x8b/0xff0 [nouveau] [ 31.478192] do_one_initcall+0x5d/0x300 [ 31.478204] do_init_module+0x86/0x290 [ 31.478212] init_module_from_file+0xd8/0x140 [ 31.478223] idempotent_init_module+0x114/0x310 [ 31.478233] __x64_sys_finit_module+0x71/0xe0 [ 31.478238] do_syscall_64+0xe2/0x630 [ 31.478252] ? srso_return_thunk+0x5/0x5f [ 31.478257] ? vfs_read+0x165/0x390 [ 31.478267] ? srso_return_thunk+0x5/0x5f [ 31.478271] ? srso_return_thunk+0x5/0x5f [ 31.478276] ? switch_fpu_return+0x52/0xe0 [ 31.478282] ? srso_return_thunk+0x5/0x5f [ 31.478286] ? arch_exit_to_user_mode_prepare.isra.0+0x7e/0x90 [ 31.478292] ? srso_return_thunk+0x5/0x5f [ 31.478296] ? do_syscall_64+0x11f/0x630 [ 31.478301] ? srso_return_thunk+0x5/0x5f [ 31.478305] ? arch_exit_to_user_mode_prepare.isra.0+0x7e/0x90 [ 31.478310] ? srso_return_thunk+0x5/0x5f [ 31.478314] ? do_syscall_64+0x11f/0x630 [ 31.478320] ? srso_return_thunk+0x5/0x5f [ 31.478324] ? arch_exit_to_user_mode_prepare.isra.0+0x7e/0x90 [ 31.478329] ? srso_return_thunk+0x5/0x5f [ 31.478334] ? srso_return_thunk+0x5/0x5f [ 31.478338] ? do_syscall_64+0x99/0x630 [ 31.478343] ? exc_page_fault+0x82/0x1c0 [ 31.478350] entry_SYSCALL_64_after_hwframe+0x76/0x7e [ 31.478355] RIP: 0033:0x7fb93410030d [ 31.478372] Code: ff c3 66 2e 0f 1f 84 00 00 00 00 00 90 f3 0f 1e fa 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d c3 5a 0f 00 f7 d8 64 89 01 48 [ 31.478375] RSP: 002b:00007ffc587ce738 EFLAGS: 00000246 ORIG_RAX: 0000000000000139 [ 31.478381] RAX: ffffffffffffffda RBX: 0000562f5fb3da60 RCX: 00007fb93410030d [ 31.478385] RDX: 0000000000000000 RSI: 0000562f5fb40590 RDI: 000000000000000d [ 31.478388] RBP: 00007ffc587ce7d0 R08: 0000000000000000 R09: 0000000000000000 [ 31.478391] R10: 0000000000000000 R11: 0000000000000246 R12: 0000562f5fb40590 [ 31.478394] R13: 0000000000040000 R14: 0000562f5fb3db80 R15: 0000000000000009 [ 31.478404] </TASK> [ 31.478407] ---[ end trace 0000000000000000 ]--- Fix it by making sure we unconditionally call drm_plane_create_blend_mode_property for all types of wndws, including those (such as cursors) without a blend_set function. Fixes: 860e748bddcc ("drm: ensure blend mode supported if pixel format with alpha exposed") Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Lyude Paul <lyude@redhat.com> Link: https://patch.msgid.link/20260720215058.398210-4-lyude@redhat.com
2026-07-27drm/nouveau/kms/nv50-: Introduce nv50_wndw_default_state()Lyude Paul
While we don't currently read-in the hardware state of planes, now that we're about to start exposing blend properties for all planes that can support alpha channels: We need to make sure that the initial atomic state for a wndw always starts off with a supported value in pixel_blend_mode. The easiest way to do this is to introduce a nv50_wndw_default_state() function, and use it in nv50_display_read_hw_state() - and use that function to enforce a valid value for pixel_blend_mode during driver startup. Signed-off-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Fixes: 860e748bddcc ("drm: ensure blend mode supported if pixel format with alpha exposed") Link: https://patch.msgid.link/20260720215058.398210-3-lyude@redhat.com
2026-07-27drm/nouveau/kms/nv50-: Add .blend_modes to nv50_wndw_funcLyude Paul
At the moment, we currently (incorrectly) only expose a blend property on the plane if we have a nv50_wndw_func->blend_set function for the given wndw type. But we need to expose a blend property for all types of planes that can display color formats with an alpha channel. Prepare for doing this by introducing a way of looking up the supported blend modes for a type of wndw by introducing .blend_modes, which describes all possible blending modes nouveau currently supports for a type of wndw. Signed-off-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Fixes: 860e748bddcc ("drm: ensure blend mode supported if pixel format with alpha exposed") Link: https://patch.msgid.link/20260720215058.398210-2-lyude@redhat.com
2026-07-27arm64: dts: imx8ulp-9x9-evk: Rename model string to reflect die sizePeng Fan
Rename the board model from "NXP i.MX8ULP EVK9" to "NXP i.MX8ULP 9x9 EVK" to follow the i.MX naming convention where the die size (9x9 mm) is used instead of an opaque board revision suffix. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27arm64: dts: imx8ulp-evk: Change the values of some PCRs of ENETWei Fang
Change to use standard drive strength and slow slew rate on PTE14-17, 22, 23, otherwise the overshoot of ENET is too high. Signed-off-by: Wei Fang <wei.fang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27arm64: dts: imx8ulp-evk: Enable LPUART7Sherry Sun
The i.MX 8ULP EVK proto1B revision routes LPUART7 TX/RX to the FT4232 PortD connector (J25/J26 pins 2-3). Enable the port by default so the additional serial console is available out of the box. Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27arm64: dts: imx8ulp-evk: Enable LPUART6 for BluetoothSherry Sun
Enable lpuart6 with RTS/CTS flow control on the i.MX 8ULP EVK board and add an NXP 88W8987 Bluetooth companion node to pair the UART transport with the wireless chip. i.MX8ULP 9X9 EVK use different lpuart6 pins which used for M.2 bluetooth, also use the sai6 instead of sai5 for PCM interface on M.2, so need to update the pin setting in dts. Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27arm64: dts: imx8ulp-evk: Add gpio-keys node for power buttonPeng Fan
Add a gpio-keys node for the power-on button, report it as KEY_POWER to user space. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27arm64: dts: imx8ulp: Add assigned clock properties for LPUART nodesPeng Fan
Add assigned-clocks, assigned-clock-parents and assigned-clock-rates properties to lpuart4 through lpuart7, so the LPUART input clock is configured automatically by the clock framework during probe. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27arm64: dts: imx8ulp: Correct SRAM node address and size to cover full SSRAM P2Peng Fan
The SSRAM P2 partition starts at 0x22010000 with a size of 64 KB. The previous node only mapped the last 4 KB (0x2201f000, 0x1000) which was used for the SCMI shared memory buffer. Update the base address and size to cover the full P2 region so it can also serve as a general purpose SRAM pool. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27arm64: dts: imx8ulp: Add I3C2 controller nodePeng Fan
Add the I3C2 (i3c-master@29360000) node to the imx8ulp device tree using the Silvaco I3C master IP. Configure PCC3-gated clock with SOSC DIV2 as parent at 24 MHz for pclk and fast_clk. slow_clk uses a dummy clock. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27arm64: dts: imx8ulp: Add DMA channel properties and use eDMA flag macrosPeng Fan
Add DMA channel (dmas/dma-names) properties to peripheral nodes that were missing them: - LPI2C: lpi2c4, lpi2c5, lpi2c6, lpi2c7 - LPUART: lpuart4, lpuart5, lpuart6, lpuart7 - LPSPI: lpspi4, lpspi5 Also replace hardcoded numeric DMA direction flags with the proper FSL_EDMA_RX and FSL_EDMA_MULTI_FIFO macros for SAI (sai4, sai5, sai6, sai7) and SPDIF nodes. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27Merge tag 'erofs-for-7.2-rc6-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/xiang/erofs Pull erofs fixes from Gao Xiang: "Fix a regression in page cache sharing which can cause a NULL pointer dereference, and limit LZMA stream memory usage on systems with many CPUs. - Keep a valid f_path for page cache sharing to fix a recent mincore() NULL pointer dereference - Limit LZMA stream pool size when too many processors are available - Sync up with Hongbo Li's latest email address" * tag 'erofs-for-7.2-rc6-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/xiang/erofs: erofs: cap LZMA stream pool size erofs: ensure valid f_path for page cache sharing MAINTAINERS: update Hongbo Li's email address
2026-07-27PCI/pwrctrl: tc9563: Power off only the external ports in ↵Manivannan Sadhasivam
tc9563_pwrctrl_disable_port() TC9563 supports powering off only the external facing ports like DSP1 and DSP2. It is not recommended to power off USP and DSP3 as they have fixed ports/endpoint connected. Fix tc9563_pwrctrl_disable_port() to power off only DSP1 and DSP2. Fixes: 4c9c7be47310 ("PCI: pwrctrl: Add power control driver for TC9563") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Alex Elder <elder@riscstar.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260725-tc9563-fix-v1-3-ec4286e31331@oss.qualcomm.com
2026-07-27PCI/pwrctrl: tc9563: Fix parsing the integrated Ethernet MAC Endpoint nodeManivannan Sadhasivam
DSP3 has an integrated Ethernet MAC Endpoint which has its own set of config registers for configuring settings such as ASPM. The Endpoint device has two physical functions and those two functions share the same settings. Parse the Endpoint node under DSP3 instead of parsing both functions. The existing parsing logic also has one OOB issue as parsing both functions will result in accessing past the tc9563_pwrctrl->cfg array. Fixes: 4c9c7be47310 ("PCI: pwrctrl: Add power control driver for TC9563") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Alex Elder <elder@riscstar.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20260725-tc9563-fix-v1-2-ec4286e31331@oss.qualcomm.com
2026-07-27arm64: dts: s32g: Add GPR syscon regionDan Carpenter
Add the GPR syscon region for the s32 chipset. Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> [jkangas@redhat.com: GPR syscon resized from 0x3000 to 0x100] Signed-off-by: Jared Kangas <jkangas@redhat.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27dt-bindings: PCI: toshiba,tc9563: Restrict Tx Amplitude, DFE and N_FTS to ↵Manivannan Sadhasivam
USP, DSP1 and DSP2 TC9563 switch allows configuring Tx Amplitude, DFE and N_FTS settings only to USP, DSP1 and DSP2 ports. These settings don't apply to DSP3 or the integrated Ethernet MAC Endpoint. Restrict these properties and move 'toshiba,tx-amplitude-microvolt' to DSP2 in the example to conform to the binding. Fixes: 26f3ac884835 ("dt-bindings: PCI: Add binding for Toshiba TC9563 PCIe switch") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> [bhelgaas: commit log] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Alex Elder <elder@riscstar.com> Link: https://patch.msgid.link/20260725-tc9563-fix-v1-1-ec4286e31331@oss.qualcomm.com
2026-07-27mmc: omap_hsmmc: use platform_get_irq_optional for wake IRQRosen Penev
Replace irq_of_parse_and_map() with platform_get_irq_optional() to get the wake IRQ. This is a more portable approach that works with both DT and non-DT platforms, and follows the modern platform API conventions for optional IRQ resources. The wake IRQ is now fetched earlier in the probe function alongside the main IRQ, and the -EPROBE_DEFER case is handled properly before the deferred probe can be triggered. Signed-off-by: Rosen Penev <rosenp@gmail.com> Signed-off-by: Ulf Hansson <ulfh@kernel.org>
2026-07-27mmc: via-sdmmc: cancel card-detect work on removeFan Wu
Disabling the device interrupt and freeing the IRQ prevents new card-detect work from being queued, but carddet_work already queued by the handler can still run after via_sd_remove() returns. via_sdc_card_detect() recovers the host through container_of() and dereferences its MMIO base; once remove() returns the host can be freed, so that work would touch freed memory. Cancel carddet_work after freeing the IRQ and before cancelling finish_bh_work, which the card-detect handler can also queue. carddet_work can re-enable the interrupt through via_reset_pcictrl(); mask it again afterwards. This issue was found by an in-house static analysis tool and confirmed by manual code review. Fixes: f0bf7f61b840 ("mmc: Add new via-sdmmc host controller driver") Cc: stable@vger.kernel.org Assisted-by: Codex:gpt-5.6 Signed-off-by: Fan Wu <fanwu01@zju.edu.cn> Signed-off-by: Ulf Hansson <ulfh@kernel.org>
2026-07-27mmc: via-sdmmc: stop card-detect handling on probe failureFan Wu
request_irq() registers the SD card-detect interrupt and the probe enables it before mmc_add_host() runs. If mmc_add_host() fails, the error path only unmaps the registers and returns: the interrupt stays registered, so the handler keeps running against the host once it is freed. via_sdc_isr() dereferences sdhost and its MMIO base and schedules carddet_work, which via_sdc_card_detect() also runs against freed memory through its container_of() dereference. Add a probe-error path that disables and frees the interrupt and cancels carddet_work before unmapping. carddet_work can re-enable the device interrupt via via_reset_pcictrl(), which restores PCIINTCTRL, so mask it again after cancelling the work. This issue was found by an in-house static analysis tool and confirmed by manual code review. Fixes: e4e46fb61e3b ("mmc: via-sdmmc: fix return value check of mmc_add_host()") Cc: stable@vger.kernel.org Assisted-by: Codex:gpt-5.6 Signed-off-by: Fan Wu <fanwu01@zju.edu.cn> Signed-off-by: Ulf Hansson <ulfh@kernel.org>
2026-07-27udf: Fix i_lenExtents truncation on 32-bit kernelsZhan Xusheng
In udf_do_extend_file() the total extent length is rounded up to a block boundary with: iinfo->i_lenExtents = (iinfo->i_lenExtents + sb->s_blocksize - 1) & ~(sb->s_blocksize - 1); i_lenExtents is a __u64, but sb->s_blocksize is unsigned long. On 32-bit kernels unsigned long is 32-bit, so ~(sb->s_blocksize - 1) is a 32-bit value (e.g. 0xfffff800 for a 2 KiB block) that is zero-extended in the AND, clearing the upper 32 bits of i_lenExtents. For UDF files whose total extent length exceeds 4 GiB this truncates i_lenExtents when the file is extended, corrupting the tracked extent length. Cast the block size to 64-bit before forming the mask. 64-bit kernels are unaffected. Fixes: 48d6d8ff7dca ("udf: cache struct udf_inode_info") Cc: stable@vger.kernel.org Signed-off-by: Zhan Xusheng <zhanxusheng@xiaomi.com> Link: https://patch.msgid.link/20260722082425.213311-1-zhanxusheng@xiaomi.com Signed-off-by: Jan Kara <jack@suse.cz>
2026-07-27arm64: dts: ls1088a: describe the Lynx 10G SerDes blocksIoana Ciornei
Describe the two Lynx 10G SerDes blocks and their associated lanes found on the LS1088A SoC. The nodes are left disabled at the SoC level; board DTs will enable them once there are consumers. Note that the SerDes block #2 is non-networking, meaning that it will not get probed by the Lynx10G SerDes PHY driver and it's only added for a complete hardware description. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27arm64: dts: ls208xa: describe the Lynx 10G SerDes blocksVladimir Oltean
Describe the two Lynx 10G SerDes blocks and their associated lanes found on the LS208xA SoC. The nodes are left disabled at the SoC level; board DTs will enable them once there are consumers. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27arm64: dts: ls1046a: describe the Lynx 10G SerDes blocksVladimir Oltean
Describe the two Lynx 10G SerDes blocks and their associated lanes found on the LS1046A SoC. The nodes are left disabled at the SoC level; board DTs will be expected to enable them once the consumer Ethernet nodes appear. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27arm64: dts: ls1028a: describe the Lynx 10G SerDesVladimir Oltean
Describe the Lynx 10G SerDes block and its 4 SerDes lanes found on the LS1028A SoC. The node is left disabled at the SoC level; board DTs will be expected to enable it once the consumer Ethernet nodes use it. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27arm64: dts: lx2162a: transition to device-specific SerDes compatible stringsIoana Ciornei
Align to the modern fsl,lynx-28g.yaml binding for the LX2162A SoC, where the SoC and SerDes instance is present in the compatible string, to allow reliable per-lane capability detection and per-lane customization of electrical properties. Since one of the major differences between LX2162A and LX2160A is the SerDes, add the necessary nodes to its own fsl-lx2162a-serdes.dtsi file. Also mark the serdes_1 node as disabled by default since any dts using it enables it explicitly now. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27arm64: dts: lx2160a: transition to device-specific SerDes compatible stringsIoana Ciornei
Align to the modern fsl,lynx-28g.yaml binding, where the SoC and SerDes instance is present in the compatible string, to allow reliable per-lane capability detection and per-lane customization of electrical properties. The modern bindings are backward-incompatible with old kernels, due to the consumer phandles being either in one form or in another, as explained here: https://lore.kernel.org/lkml/20250930140735.mvo3jii7wgmzh2bs@skbuf/ Also mark the serdes_1 node as disabled by default since any dts using it enables it explicitly now. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27arm64: dts: lx2160a: split the dtsi to avoid delete-propertyIoana Ciornei
Reorganize the LX216XA related dts/dtsi files with the intent to avoid any delete-property usage. Taken into consideration the differences between the LX2160A Rev1, LX2160A Rev2 and LX2162A SoCs, the following structure is created: fsl-lx216x.dtsi ---> fsl-lx2160a-rev1.dtsi (PCIe gen4, 3 SerDes blocks) (no PCIe, no SerDes) ---> fsl-lx2160a-rev2.dtsi (PCIe gen3, 3 SerDes blocks) ---> fsl-lx2162a.dtsi (PCIe gen3, 2 SerDes blocks) Each PCIe integration or SerDes block instantiation has its own dtsi file which gets to be included only by the necessary SoC level dtsi file. The dtsi file describing the PCIe controllers found on LX2160A Rev2 is also changed so that it does not work on a already defined node but rather it describes it entirely. In order to decouple the LX2162A from LX2160A, a new dtsi fsl-lx2162a-serdes.dtsi file is added which, for the moment, only duplicates the SerDes related nodes found already for LX2160A. Any dts which previously included fsl-lx2160a.dtsi now includes the -rev1 version and any dts which is clearly intended for LX2162A based board now includes the fsl-lx2162a.dtsi. No changes for the final dtbs. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27arm64: dts: lx2160a: extract the PCIe from LX2160A Rev2 into a separate fileIoana Ciornei
The LX2160A Rev2 SoC changed the PCIe controllers used. This difference is reflected in the fsl-lx2160a-rev2.dtsi file which modifies the relevant dt nodes so that they match the actual HW. Extract these modifications into a separate dtsi file as a first step into a complete overhaul of the LX216xA related dts files with the intent to not use delete-node or delete-property. No final dtb changes are expected with this patch. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27Merge tag 'pinctrl-v7.2-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: "The most interesting commit is the S4 fix for AMD, which probably is helpful to a whole bunch of important machines. - Wakeup nits on the Qualcomm SC8280XP - Double-free issues on the device tree parsing error path - Fixup of the S4 sleep state handling on AMD pin control - Missing Kconfig select REGMAP_MMIO for the Microchip driver leading to compile stalls - Missing Kconfig select GENERIC_PINCONF for the Bitmain BM1880 leading to compile stalls" * tag 'pinctrl-v7.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: bm1880: add missing select GENERIC_PINCONF pinctrl-amd: Don't clear S4 wake bits at probe pinctrl: microchip-sgpio: add missing select REGMAP_MMIO pinctrl: devicetree: don't free uninitialized dev_name on error path pinctrl: qcom: sc8280xp: Add missing wakeup entries for GPIO143/151 pinctrl: qcom: Unconditionally mark gpio as wakeup enable
2026-07-27arm64: dts: lx2160a: extract the SerDes nodes into a separate dtsiIoana Ciornei
In terms of its SerDes blocks, the LX2162A is not properly described since it just inherits the LX2160A SerDes nodes, which is not correct. In order to fix this but also avoid the usage of delete-node, extract the SerDes nodes currently found in fsl-lx2160a.dtsi into a separate dtsi. No any actual changes in the final dtb files, only a dt node move. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27arm64: dts: lx2160a: extract the PCIe nodes into a separate dtsiIoana Ciornei
One of the major differences between LX2160A Rev1 and Rev2 is the PCIe controller used. With the final goal of removing any usage of delete-node or delete-property from the current LX2160A related dts files, move the PCIe nodes found on the LX2160A Rev1 into a separate dtsi file. This will make it easier to include the appropriate dtsi file describing the PCIe controller depending on the SoC revision in a follow-up patch. No actual change in the DT nodes found in the final DTBs is intended. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27arm64: dts: lx2160a: explicitly enable serdes_1 nodeIoana Ciornei
Explicitly enable the serdes_1 node in all board DT files. This is needed in order to be able to change the default status of the node to "disabled" from the SoC DT file. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-27drm/vmwgfx: validate external BO copy bounds for both stride pathsZack Rusin
vmw_external_bo_copy() trusts caller-supplied offsets, strides, and heights and operates on imported dma-buf vmaps: - The equal-stride memcpy() bound was clamped after subtracting the offsets from dst_size and src_size; an offset larger than the BO size wraps the unsigned subtraction to a huge value and the resulting memcpy() runs off the end of the vmap. dst_stride * height is also a u32 multiplication that can overflow. - The non-equal-stride row-by-row path had no bound at all. The loop touches bytes through offset + (height - 1) * stride + width_in_bytes, with only a WARN_ON(dst_stride < width_in_bytes), and could likewise step past the end of either mapping. The offsets and strides are derived from STDU/SOU plane state, so a configured CRTC submitting a crafted atomic commit on an imported framebuffer can reach this path. Validate the exact row-copy endpoint against each BO's size up front using check_mul_overflow() and check_add_overflow(). Use the bulk memcpy() path only when width_in_bytes covers the whole stride; otherwise copy one row at a time so partial-row updates near the bottom of a framebuffer remain valid. Also reject zero strides and stride < width_in_bytes, both of which the row-by-row path cannot represent safely. Fixes: 50f119925091 ("drm/vmwgfx: Fix prime with external buffers") Cc: stable@vger.kernel.org Assisted-by: Claude:claude-opus-4.7 Signed-off-by: Zack Rusin <zack.rusin@broadcom.com> Reviewed-by: Ian Forbes <ian.forbes@broadcom.com> Link: https://patch.msgid.link/20260505222728.519626-13-zack.rusin@broadcom.com
2026-07-27drm/vmwgfx: use check_add_overflow for shader size+offset boundZack Rusin
vmw_shader_define() validates the user-supplied shader window against its backing buffer with (u64)buffer->tbo.base.size < (u64)size + (u64)offset drm_vmw_shader_create_arg::offset is __u64 in the uapi; when it is near U64_MAX the unsigned addition wraps and the resulting tiny value passes the check. The unbounded offset is then stored in res->guest_memory_offset and forwarded to host SVGA shader-create commands. Use check_add_overflow() to detect the wrap and compare the resulting endpoint against the buffer size. Fixes: 668b206601c5 ("drm/vmwgfx: Stop using raw ttm_buffer_object's") Cc: stable@vger.kernel.org Assisted-by: Claude:claude-opus-4.7 Signed-off-by: Zack Rusin <zack.rusin@broadcom.com> Reviewed-by: Ian Forbes <ian.forbes@broadcom.com> Link: https://patch.msgid.link/20260505222728.519626-12-zack.rusin@broadcom.com
2026-07-27drm/vmwgfx: skip hash_del_rcu when validation context has no hash tableZack Rusin
vmw_validation_add_resource() calls hash_add_rcu() only when ctx->sw_context is non-NULL, but the doomed-resource error path calls hash_del_rcu() unconditionally. The validation contexts declared with DECLARE_VAL_CONTEXT(_, NULL, 0) in vmwgfx_kms.c, vmwgfx_scrn.c, vmwgfx_stdu.c and vmwgfx_execbuf.c consequently reach a delete for a node that was never added to any hash chain. That is harmless today, but only incidentally so. hash_del_rcu() is hlist_del_init_rcu(), which is guarded by hlist_unhashed(), and vmw_validation_mem_alloc() hands out memory from __GFP_ZERO pages that are never recycled within a context's lifetime, so node->hash.head.pprev is always NULL and the delete does nothing. Neither property is apparent at the call site, and the asymmetry with the add side invites a real bug the first time either one changes. Mirror the condition from the add side so the node is only unlinked when it was actually linked. No functional change. Assisted-by: Claude:claude-opus-4.7 Signed-off-by: Zack Rusin <zack.rusin@broadcom.com> Reviewed-by: Ian Forbes <ian.forbes@broadcom.com> Link: https://patch.msgid.link/20260505222728.519626-11-zack.rusin@broadcom.com
2026-07-27drm/vmwgfx: enforce cursor size limits for MOB cursorsZack Rusin
vmw_cursor_plane_atomic_check() bounds cursor width and height only on the legacy update path; the SVGA_CAP2_CURSOR_MOB path -- the default on modern hosts -- accepts any size. When the requested size exceeds SVGA_REG_CURSOR_MAX_DIMENSION or SVGA_REG_MOB_MAX_SIZE, vmw_cursor_mob_get() returns -EINVAL and leaves vps->cursor.mob NULL. Its return value is then discarded in vmw_cursor_plane_prepare_fb(), so the subsequent vmw_cursor_update_mob() calls vmw_bo_map_and_cache(NULL) and oopses inside vmw_bo_map_and_cache_size() on the tbo.base.size load. Reachable from any DRM master via DRM_IOCTL_MODE_CURSOR2 with a sufficiently large width or height (e.g. cursor_max_dim + 1). Reject oversized cursors in atomic_check for both MOB-backed cursor update types. The MOB byte-size limit only applies to the SVGA_CAP2_CURSOR_MOB path (vmw_cursor_mob_size() returns 0 for GB_ONLY); compute the required MOB size in 64-bit to avoid overflow when very large dimensions are requested. In prepare_fb only call vmw_cursor_mob_get()/_map() for VMW_CURSOR_UPDATE_MOB -- the GB_ONLY path uses bo->map.virtual directly and would otherwise be silently downgraded to NONE on hosts without SVGA_CAP2_CURSOR_MOB (where vmw_cursor_mob_get() always returns -EINVAL). Degrade the update to NONE if vmw_cursor_mob_get() or vmw_cursor_mob_map() fails so the update path does not run with a NULL backing MOB. Fixes: 965544150d1c ("drm/vmwgfx: Refactor cursor handling") Cc: stable@vger.kernel.org Assisted-by: Claude:claude-opus-4.7 Signed-off-by: Zack Rusin <zack.rusin@broadcom.com> Reviewed-by: Ian Forbes <ian.forbes@broadcom.com> Link: https://patch.msgid.link/20260505222728.519626-10-zack.rusin@broadcom.com
2026-07-27drm/vmwgfx: avoid destroy_workqueue(NULL) on vkms init failureZack Rusin
Two paths through vmw_vkms_init() can leave vmw->crc_workq NULL while still leaving the rest of the driver in a state that calls vmw_vkms_cleanup() at module unload: 1. vmw_host_get_guestinfo(GUESTINFO_VBLANK, ...) failing or returning an oversized buffer -- the common case on hosts without a VBLANK guestinfo entry -- early-returned before the workqueue allocation. 2. alloc_ordered_workqueue() returning NULL on memory pressure. vmw_vkms_cleanup() then calls destroy_workqueue(NULL), which dereferences wq->name and panics. Fix the first case by removing the early return: vmw->vkms_enabled is already false on the rpci-failure path so no work will ever be queued, and allocating the workqueue unconditionally keeps the control flow simple. Fix the second case by guarding the cleanup with a NULL check, since alloc_ordered_workqueue() can still fail under low memory. Fixes: 7b0062036c3b ("drm/vmwgfx: Implement virtual crc generation") Cc: stable@vger.kernel.org Assisted-by: Claude:claude-opus-4.7 Signed-off-by: Zack Rusin <zack.rusin@broadcom.com> Reviewed-by: Ian Forbes <ian.forbes@broadcom.com> Link: https://patch.msgid.link/20260505222728.519626-9-zack.rusin@broadcom.com
2026-07-27drm/vmwgfx: bound DMA command body size against suffix pointerZack Rusin
vmw_cmd_dma() locates the DMA suffix at (unsigned long) &cmd->body + header->size - sizeof(*suffix) without checking that header->size is large enough to contain both cmd->body and the suffix. An undersized header makes the suffix pointer underflow back into the previous command in the bounce buffer. The verifier later writes suffix->maximumOffset, clobbering verified fields of an already-relocated earlier command -- a TOCTOU on the device-visible command stream that lets one command rewrite another's GMR id, surface id, or other authenticated fields. Reject the command if the body is too small for the suffix to fit. Fixes: 4e4ddd477743 ("drm/vmwgfx: Fix queries if no dma buffer thrashing is occuring.") Cc: stable@vger.kernel.org Assisted-by: Claude:claude-opus-4.7 Signed-off-by: Zack Rusin <zack.rusin@broadcom.com> Reviewed-by: Ian Forbes <ian.forbes@broadcom.com> Link: https://patch.msgid.link/20260505222728.519626-8-zack.rusin@broadcom.com
2026-07-27drm/vmwgfx: validate DRAW_PRIMITIVES header size before divisionZack Rusin
vmw_cmd_draw() computes maxnum = (header->size - sizeof(cmd->body)) / sizeof(*decl); where header->size is u32 and is taken straight from the user-supplied command stream. When header->size is less than sizeof(cmd->body) the unsigned subtraction wraps to nearly 4 GiB, producing a huge maxnum. Any user-controlled cmd->body.numVertexDecls then passes the bound and the loop dereferences decl[i] far past the end of the kernel command bounce buffer, producing an out-of-bounds read of kernel memory. Reject undersized headers up front. Fixes: 7a73ba7469cb ("drm/vmwgfx: Use TTM handles instead of SIDs as user-space surface handles.") Cc: stable@vger.kernel.org Assisted-by: Claude:claude-opus-4.7 Signed-off-by: Zack Rusin <zack.rusin@broadcom.com> Reviewed-by: Ian Forbes <ian.forbes@broadcom.com> Link: https://patch.msgid.link/20260505222728.519626-7-zack.rusin@broadcom.com
2026-07-27drm/vmwgfx: drop dma_buf reference on foreign-fd prime importZack Rusin
ttm_prime_fd_to_handle() returns -ENOSYS when the imported fd's dma_buf->ops do not match the ttm_object_device's ops, but does so without releasing the reference acquired by dma_buf_get(). Any unprivileged renderD client passing a non-vmwgfx prime fd through the DRM_VMW_GB_SURFACE_REF{,_EXT} path leaks one dma_buf reference per call and indefinitely pins the foreign exporter's GEM resources. Funnel the error path through the existing dma_buf_put() so the reference is always dropped. Fixes: 65981f7681ab ("drm/ttm: Add a minimal prime implementation for ttm base objects") Cc: stable@vger.kernel.org Assisted-by: Claude:claude-opus-4.7 Signed-off-by: Zack Rusin <zack.rusin@broadcom.com> Reviewed-by: Ian Forbes <ian.forbes@broadcom.com> Link: https://patch.msgid.link/20260505222728.519626-6-zack.rusin@broadcom.com
2026-07-27drm/vmwgfx: take fman->lock around fence list mutation in fifo_downZack Rusin
vmw_fence_fifo_down() drops fman->lock to wait on a fence and, on timeout, mutates fman->fence_list via list_del_init() and signals the fence without re-acquiring the lock. __vmw_fences_update() walks and removes entries from the same list under fman->lock from any other waiter, the fence-IRQ thread, or vmw_fences_update(), so the unlocked list_del_init() can corrupt the list head. Re-take fman->lock before manipulating fence->head and use dma_fence_signal_locked(). Wrap the locked signalling in dma_fence_begin_signalling() / dma_fence_end_signalling() so the lockdep annotation that dma_fence_signal() previously provided is preserved (the same pattern as __vmw_fences_update()). dma_fence_put() is moved outside the lock to avoid a recursive acquire from vmw_fence_obj_destroy(), which also takes fman->lock. Fixes: ae2a104058e2 ("vmwgfx: Implement fence objects") Cc: stable@vger.kernel.org Assisted-by: Claude:claude-opus-4.7 Signed-off-by: Zack Rusin <zack.rusin@broadcom.com> Reviewed-by: Ian Forbes <ian.forbes@broadcom.com> Link: https://patch.msgid.link/20260505222728.519626-5-zack.rusin@broadcom.com
2026-07-27drm/vmwgfx: clamp dirty-page range with min, not maxZack Rusin
vmw_bo_dirty_transfer_to_res() and vmw_bo_dirty_clear() compute the intersection of a resource's page range with the BO's tracked dirty range, but clamp res_end against dirty->end with max() instead of min(). When dirty->end exceeds the resource end, the loop walks past the resource's pages, calls vmw_resource_dirty_update() for ranges owned by other resources sharing the same backing MOB and clears their pending dirty bits via bitmap_clear(). The result is silent loss of writeback for unrelated resources whenever two resources share a MOB. Use min() in both functions so the loop is bounded to the intersection of the resource and dirty ranges. Fixes: b7468b15d271 ("drm/vmwgfx: Implement an infrastructure for write-coherent resources") Fixes: 965544150d1c ("drm/vmwgfx: Refactor cursor handling") Cc: stable@vger.kernel.org Assisted-by: Claude:claude-opus-4.7 Signed-off-by: Zack Rusin <zack.rusin@broadcom.com> Reviewed-by: Ian Forbes <ian.forbes@broadcom.com> Link: https://patch.msgid.link/20260505222728.519626-4-zack.rusin@broadcom.com
2026-07-27drm/vmwgfx: reject DX_BIND_QUERY without a DX contextZack Rusin
vmw_cmd_dx_bind_query() unconditionally dereferences sw_context->dx_ctx_node->ctx. Userspace can trigger a NULL pointer dereference from any render-node fd by submitting an execbuf with dx_context_handle == SVGA3D_INVALID_ID and a SVGA_3D_CMD_DX_BIND_QUERY opcode in the command stream: dx_ctx_node is left NULL and the kernel oopses on the assignment. The same NULL is then re-read in vmw_resources_reserve() via vmw_context_get_dx_query_mob(). All sibling DX handlers fail-close on a missing dx_ctx_node using VMW_GET_CTX_NODE(). Use the same pattern here, returning -EINVAL up front before any relocation state is published. Fixes: 9c079b8ce8bf ("drm/vmwgfx: Adapt execbuf to the new validation api") Cc: stable@vger.kernel.org Assisted-by: Claude:claude-opus-4.7 Signed-off-by: Zack Rusin <zack.rusin@broadcom.com> Reviewed-by: Ian Forbes <ian.forbes@broadcom.com> Link: https://patch.msgid.link/20260505222728.519626-3-zack.rusin@broadcom.com
2026-07-27drm/vmwgfx: fix guest_memory_dirty bitfield clobbered as sizeZack Rusin
Two sites in vmwgfx_resource.c assign boolean literals to res->guest_memory_size, which is an unsigned long allocation-size field; the intended target is the adjacent res->guest_memory_dirty bitfield. After the assignments the field holds 0 or 1 instead of the resource's MOB allocation size: - vmw_resource_release() writes 0 (false), and - vmw_resource_unbind_list() writes 1 (true). Subsequent revalidation paths read guest_memory_size when computing the dirty page range (vmw_bo_dirty_transfer_to_res()) and the buffer allocation size (vmw_resource_buf_alloc()), producing zero-length walks or wrap-around ranges that read or write past the MOB bitmap. The dirty-tracking intent of the original code (mark the resource as dirtied since the last sync) is also lost, since guest_memory_dirty is never updated. Rename both assignments to guest_memory_dirty. Fixes: 668b206601c5 ("drm/vmwgfx: Stop using raw ttm_buffer_object's") Cc: stable@vger.kernel.org Assisted-by: Claude:claude-opus-4.7 Signed-off-by: Zack Rusin <zack.rusin@broadcom.com> Reviewed-by: Ian Forbes <ian.forbes@broadcom.com> Link: https://patch.msgid.link/20260505222728.519626-2-zack.rusin@broadcom.com
2026-07-27Merge patch series "fs: add failfs"Christian Brauner
Christian Brauner <brauner@kernel.org> says: nullfs provides a permanently empty and immutable directory. Lookups fail with ENOENT. The directory can be opened, read, stat, mounted upon. It behaves like nothing is there. Add its counterpart failfs where the semantics are not "there is nothing here" but "nothing is supported here". Every operation that reaches the filesystem fails with EOPNOTSUPP. Even statfs()/fstatfs() fail so the filesystem cannot be discovered through an fd to it. EOPNOTSUPP rather than a permission errno keeps that coherent. There is no permission model in which anything could ever be allowed and EACCES or EPERM would merely suggest that different credentials might succeed while EIO would suggest corruption. It also makes hitting the failfs boundary mostly quite dinstinguishable. A task anchoring its lookups at real directory file descriptors may be able to tell a failfs refusal from an ordinary permission failure. I wouldn't go so far as guaranteeing that but it should mostly work. The root cannot be opened at all not even with O_PATH. It is never reached by a lookup in a parent directory. The only way to a path-walk terminal at the root is a jump through a /proc/<pid>/{root,cwd} magic link or by mountpoint traversal. The root also refuses ->d_weak_revalidate() which the VFS calls for jumped terminals. That closes every remaining way to reference it. An O_PATH open is refused and name_to_handle_at() cannot encode it into a file handle, and following a magic link into it fails. A plain readlink() of such a link still works and shows "failfs:/". There is a single instance of failfs mounted during early boot via kern_mount() making it logically distinct from every mount namespace. Since the mount is a member of no mount namespace mounting onto it fails. So nothing can ever be mounted on top of it. It cannot be cloned via OPEN_TREE_CLONE and it does not show up in statmount()/listmount() or /proc/<pid>/mountinfo. The filesystem is not registered so it is not visible in /proc/filesystems and cannot be mounted from userspace. This lets tasks shed their filesystem state completely. A process with its root directory or working directory in failfs must anchor every path lookup at an explicit file descriptor or is doomed to fail any lookup. Absolute paths, absolute symlinks, and AT_FDCWD-relative lookups simply fail. Followup patches will expose it via a new FD_FAILFS_ROOT file descriptor sentinel understood by fchdir() and the new fchroot() system call. Fun fact, because of how dynamic binary execution work with PT_INTERP this also currently prevents execution of dynamic binaries because loaders have absolute paths (see selftests). * patches from https://patch.msgid.link/20260724-work-failfs-v2-0-485dabbae185@kernel.org: Documentation: add failfs documentation selftests/filesystems: add failfs selftests arch: hookup fchroot() system call fs: support FD_FAILFS_ROOT in fchroot() fs: add fchroot() fs: support FD_FAILFS_ROOT in fchdir() fs: add failfs Link: https://patch.msgid.link/20260724-work-failfs-v2-0-485dabbae185@kernel.org Signed-off-by: Christian Brauner (Amutable) <brauner@kernel.org>