<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/tools/testing/selftests/kvm/include/x86, branch v6.16</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>KVM: selftests: Add library support for interacting with SNP</title>
<updated>2025-05-02T19:32:33+00:00</updated>
<author>
<name>Pratik R. Sampat</name>
<email>prsampat@amd.com</email>
</author>
<published>2025-03-05T22:59:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=3bf3e0a521237681d5353cca741474aa8c4e16de'/>
<id>3bf3e0a521237681d5353cca741474aa8c4e16de</id>
<content type='text'>
Extend the SEV library to include support for SNP ioctl() wrappers,
which aid in launching and interacting with a SEV-SNP guest.

Signed-off-by: Pratik R. Sampat &lt;prsampat@amd.com&gt;
Link: https://lore.kernel.org/r/20250305230000.231025-8-prsampat@amd.com
[sean: use BIT()]
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Extend the SEV library to include support for SNP ioctl() wrappers,
which aid in launching and interacting with a SEV-SNP guest.

Signed-off-by: Pratik R. Sampat &lt;prsampat@amd.com&gt;
Link: https://lore.kernel.org/r/20250305230000.231025-8-prsampat@amd.com
[sean: use BIT()]
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>KVM: selftests: Introduce SEV VM type check</title>
<updated>2025-05-02T19:32:33+00:00</updated>
<author>
<name>Pratik R. Sampat</name>
<email>prsampat@amd.com</email>
</author>
<published>2025-03-05T22:59:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4a4e1e8e92eb99611c8988d563e1781b067408b5'/>
<id>4a4e1e8e92eb99611c8988d563e1781b067408b5</id>
<content type='text'>
In preparation for SNP, declutter the vm type check by introducing a
SEV-SNP VM type check as well as a transitive set of helper functions.

The SNP VM type is the subset of SEV-ES. Similarly, the SEV-ES and SNP
types are subset of the SEV VM type check.

Signed-off-by: Pratik R. Sampat &lt;prsampat@amd.com&gt;
Link: https://lore.kernel.org/r/20250305230000.231025-7-prsampat@amd.com
[sean: make the helpers static inlines]
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In preparation for SNP, declutter the vm type check by introducing a
SEV-SNP VM type check as well as a transitive set of helper functions.

The SNP VM type is the subset of SEV-ES. Similarly, the SEV-ES and SNP
types are subset of the SEV VM type check.

Signed-off-by: Pratik R. Sampat &lt;prsampat@amd.com&gt;
Link: https://lore.kernel.org/r/20250305230000.231025-7-prsampat@amd.com
[sean: make the helpers static inlines]
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>KVM: selftests: Add vmgexit helper</title>
<updated>2025-05-02T19:32:32+00:00</updated>
<author>
<name>Pratik R. Sampat</name>
<email>prsampat@amd.com</email>
</author>
<published>2025-03-05T22:59:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c4e1a848d72179136f6ea9626933cb26c9d35eb5'/>
<id>c4e1a848d72179136f6ea9626933cb26c9d35eb5</id>
<content type='text'>
Abstract rep vmmcall coded into the vmgexit helper for the sev
library.

No functional change intended.

Signed-off-by: Pratik R. Sampat &lt;prsampat@amd.com&gt;
Reviewed-by: Pankaj Gupta &lt;pankaj.gupta@amd.com&gt;
Link: https://lore.kernel.org/r/20250305230000.231025-4-prsampat@amd.com
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Abstract rep vmmcall coded into the vmgexit helper for the sev
library.

No functional change intended.

Signed-off-by: Pratik R. Sampat &lt;prsampat@amd.com&gt;
Reviewed-by: Pankaj Gupta &lt;pankaj.gupta@amd.com&gt;
Link: https://lore.kernel.org/r/20250305230000.231025-4-prsampat@amd.com
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>KVM: selftests: SEV-SNP test for KVM_SEV_INIT2</title>
<updated>2025-05-02T19:32:32+00:00</updated>
<author>
<name>Pratik R. Sampat</name>
<email>prsampat@amd.com</email>
</author>
<published>2025-03-05T22:59:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=68ed692e395470a178bfdb6d417c43ebd12861b6'/>
<id>68ed692e395470a178bfdb6d417c43ebd12861b6</id>
<content type='text'>
Add the X86_FEATURE_SEV_SNP CPU feature to the architectural definition
for the SEV-SNP VM type to exercise the KVM_SEV_INIT2 call. Ensure that
the SNP test is skipped in scenarios where CPUID supports it but KVM
does not, preventing reporting of failure in such cases.

Reviewed-by: Nikunj A Dadhania &lt;nikunj@amd.com&gt;
Signed-off-by: Pratik R. Sampat &lt;prsampat@amd.com&gt;
Link: https://lore.kernel.org/r/20250305230000.231025-3-prsampat@amd.com
[sean: use the same pattern as SEV and SEV-ES]
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add the X86_FEATURE_SEV_SNP CPU feature to the architectural definition
for the SEV-SNP VM type to exercise the KVM_SEV_INIT2 call. Ensure that
the SNP test is skipped in scenarios where CPUID supports it but KVM
does not, preventing reporting of failure in such cases.

Reviewed-by: Nikunj A Dadhania &lt;nikunj@amd.com&gt;
Signed-off-by: Pratik R. Sampat &lt;prsampat@amd.com&gt;
Link: https://lore.kernel.org/r/20250305230000.231025-3-prsampat@amd.com
[sean: use the same pattern as SEV and SEV-ES]
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'kvm-x86-selftests-6.15' of https://github.com/kvm-x86/linux into HEAD</title>
<updated>2025-03-19T13:05:34+00:00</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2025-03-19T13:05:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=783e9cd05cd015ac509ffc358e92f1d71f47500c'/>
<id>783e9cd05cd015ac509ffc358e92f1d71f47500c</id>
<content type='text'>
KVM selftests changes for 6.15, part 2

 - Fix a variety of flaws, bugs, and false failures/passes dirty_log_test, and
   improve its coverage by collecting all dirty entries on each iteration.

 - Fix a few minor bugs related to handling of stats FDs.

 - Add infrastructure to make vCPU and VM stats FDs available to tests by
   default (open the FDs during VM/vCPU creation).

 - Relax an assertion on the number of HLT exits in the xAPIC IPI test when
   running on a CPU that supports AMD's Idle HLT (which elides interception of
   HLT if a virtual IRQ is pending and unmasked).

 - Misc cleanups and fixes.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
KVM selftests changes for 6.15, part 2

 - Fix a variety of flaws, bugs, and false failures/passes dirty_log_test, and
   improve its coverage by collecting all dirty entries on each iteration.

 - Fix a few minor bugs related to handling of stats FDs.

 - Add infrastructure to make vCPU and VM stats FDs available to tests by
   default (open the FDs during VM/vCPU creation).

 - Relax an assertion on the number of HLT exits in the xAPIC IPI test when
   running on a CPU that supports AMD's Idle HLT (which elides interception of
   HLT if a virtual IRQ is pending and unmasked).

 - Misc cleanups and fixes.
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'kvm-x86-selftests_6.15-1' of https://github.com/kvm-x86/linux into HEAD</title>
<updated>2025-03-19T13:05:22+00:00</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2025-03-19T13:05:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9b47f288eb67b1081d20456d391ef12a47374e09'/>
<id>9b47f288eb67b1081d20456d391ef12a47374e09</id>
<content type='text'>
KVM selftests changes for 6.15, part 1

 - Misc cleanups and prep work.

 - Annotate _no_printf() with "printf" so that pr_debug() statements are
   checked by the compiler for default builds (and pr_info() when QUIET).

 - Attempt to whack the last LLC references/misses mole in the Intel PMU
   counters test by adding a data load and doing CLFLUSH{OPT} on the data
   instead of the code being executed.  The theory is that modern Intel CPUs
   have learned new code prefetching tricks that bypass the PMU counters.

 - Fix a flaw in the Intel PMU counters test where it asserts that an event is
   counting correctly without actually knowing what the event counts on the
   underlying hardware.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
KVM selftests changes for 6.15, part 1

 - Misc cleanups and prep work.

 - Annotate _no_printf() with "printf" so that pr_debug() statements are
   checked by the compiler for default builds (and pr_info() when QUIET).

 - Attempt to whack the last LLC references/misses mole in the Intel PMU
   counters test by adding a data load and doing CLFLUSH{OPT} on the data
   instead of the code being executed.  The theory is that modern Intel CPUs
   have learned new code prefetching tricks that bypass the PMU counters.

 - Fix a flaw in the Intel PMU counters test where it asserts that an event is
   counting correctly without actually knowing what the event counts on the
   underlying hardware.
</pre>
</div>
</content>
</entry>
<entry>
<title>KVM: selftests: Relax assertion on HLT exits if CPU supports Idle HLT</title>
<updated>2025-02-28T23:42:28+00:00</updated>
<author>
<name>Sean Christopherson</name>
<email>seanjc@google.com</email>
</author>
<published>2025-02-26T23:18:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=62838fa5eade1b23d546e81e7aab6d4c92ec12f2'/>
<id>62838fa5eade1b23d546e81e7aab6d4c92ec12f2</id>
<content type='text'>
If the CPU supports Idle HLT, which elides HLT VM-Exits if the vCPU has an
unmasked pending IRQ or NMI, relax the xAPIC IPI test's assertion on the
number of HLT exits to only require that the number of exits is less than
or equal to the number of HLT instructions that were executed.  I.e. don't
fail the test if Idle HLT does what it's supposed to do.

Note, unfortunately there's no way to determine if *KVM* supports Idle HLT,
as this_cpu_has() checks raw CPU support, and kvm_cpu_has() checks what can
be exposed to L1, i.e. the latter would check if KVM supports nested Idle
HLT.  But, since the assert is purely bonus coverage, checking for CPU
support is good enough.

Cc: Manali Shukla &lt;Manali.Shukla@amd.com&gt;
Tested-by: Manali Shukla &lt;Manali.Shukla@amd.com&gt;
Link: https://lore.kernel.org/r/20250226231809.3183093-1-seanjc@google.com
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
If the CPU supports Idle HLT, which elides HLT VM-Exits if the vCPU has an
unmasked pending IRQ or NMI, relax the xAPIC IPI test's assertion on the
number of HLT exits to only require that the number of exits is less than
or equal to the number of HLT instructions that were executed.  I.e. don't
fail the test if Idle HLT does what it's supposed to do.

Note, unfortunately there's no way to determine if *KVM* supports Idle HLT,
as this_cpu_has() checks raw CPU support, and kvm_cpu_has() checks what can
be exposed to L1, i.e. the latter would check if KVM supports nested Idle
HLT.  But, since the assert is purely bonus coverage, checking for CPU
support is good enough.

Cc: Manali Shukla &lt;Manali.Shukla@amd.com&gt;
Tested-by: Manali Shukla &lt;Manali.Shukla@amd.com&gt;
Link: https://lore.kernel.org/r/20250226231809.3183093-1-seanjc@google.com
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>KVM: selftests: Actually emit forced emulation prefix for kvm_asm_safe_fep()</title>
<updated>2025-02-12T17:00:39+00:00</updated>
<author>
<name>Sean Christopherson</name>
<email>seanjc@google.com</email>
</author>
<published>2025-01-30T16:31:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=89ea56a4043ab6ec598e7969a9b88883815f53a0'/>
<id>89ea56a4043ab6ec598e7969a9b88883815f53a0</id>
<content type='text'>
Use KVM_ASM_SAFE_FEP, not simply KVM_ASM_SAFE, for kvm_asm_safe_fep(), as
the non-FEP version doesn't force emulation (stating the obvious).  Note,
there are currently no users of kvm_asm_safe_fep().

Fixes: ab3b6a7de8df ("KVM: selftests: Add a forced emulation variation of KVM_ASM_SAFE()")
Link: https://lore.kernel.org/r/20250130163135.270770-1-seanjc@google.com
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use KVM_ASM_SAFE_FEP, not simply KVM_ASM_SAFE, for kvm_asm_safe_fep(), as
the non-FEP version doesn't force emulation (stating the obvious).  Note,
there are currently no users of kvm_asm_safe_fep().

Fixes: ab3b6a7de8df ("KVM: selftests: Add a forced emulation variation of KVM_ASM_SAFE()")
Link: https://lore.kernel.org/r/20250130163135.270770-1-seanjc@google.com
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>KVM: selftests: Add helpers for locally (un)blocking IRQs on x86</title>
<updated>2025-01-08T20:57:03+00:00</updated>
<author>
<name>Sean Christopherson</name>
<email>seanjc@google.com</email>
</author>
<published>2024-12-20T01:26:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=983820cb53c0e796777caf85bfc2810ad0c8fb22'/>
<id>983820cb53c0e796777caf85bfc2810ad0c8fb22</id>
<content type='text'>
Copy KVM-Unit-Tests' x86 helpers for emitting STI and CLI, comments and
all, and use them throughout x86 selftests.  The safe_halt() and sti_nop()
logic in particular benefits from centralized comments, as the behavior
isn't obvious unless the reader is already aware of the STI shadow.

Cc: Manali Shukla &lt;Manali.Shukla@amd.com&gt;
Link: https://lore.kernel.org/r/20241220012617.3513898-1-seanjc@google.com
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Copy KVM-Unit-Tests' x86 helpers for emitting STI and CLI, comments and
all, and use them throughout x86 selftests.  The safe_halt() and sti_nop()
logic in particular benefits from centralized comments, as the behavior
isn't obvious unless the reader is already aware of the STI shadow.

Cc: Manali Shukla &lt;Manali.Shukla@amd.com&gt;
Link: https://lore.kernel.org/r/20241220012617.3513898-1-seanjc@google.com
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>KVM: selftests: Add defines for AMD PMU CPUID features and properties</title>
<updated>2025-01-08T20:01:18+00:00</updated>
<author>
<name>Colton Lewis</name>
<email>coltonlewis@google.com</email>
</author>
<published>2024-09-18T20:53:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c76a923828059ac9999e4415dcbd9706ac9540a0'/>
<id>c76a923828059ac9999e4415dcbd9706ac9540a0</id>
<content type='text'>
Add macros for AMD's PMU related CPUID features.  To make it easier to
cross reference selftest code with KVM/kernel code, use the same macro
names as the kernel for the features.

For reference, the AMD APM defines the features/properties as:

  * PerfCtrExtCore (six core counters instead of four)
  * PerfCtrExtNB (four counters for northbridge events)
  * PerfCtrExtL2I (four counters for L2 cache events)
  * PerfMonV2 (support for registers to control multiple
    counters with a single register write)
  * LbrAndPmcFreeze (support for freezing last branch recorded stack on
    performance counter overflow)
  * NumPerfCtrCore (number of core counters)
  * NumPerfCtrNB (number of northbridge counters)

Signed-off-by: Colton Lewis &lt;coltonlewis@google.com&gt;
Link: https://lore.kernel.org/r/20240918205319.3517569-3-coltonlewis@google.com
[sean: massage changelog, use same names as the kernel]
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add macros for AMD's PMU related CPUID features.  To make it easier to
cross reference selftest code with KVM/kernel code, use the same macro
names as the kernel for the features.

For reference, the AMD APM defines the features/properties as:

  * PerfCtrExtCore (six core counters instead of four)
  * PerfCtrExtNB (four counters for northbridge events)
  * PerfCtrExtL2I (four counters for L2 cache events)
  * PerfMonV2 (support for registers to control multiple
    counters with a single register write)
  * LbrAndPmcFreeze (support for freezing last branch recorded stack on
    performance counter overflow)
  * NumPerfCtrCore (number of core counters)
  * NumPerfCtrNB (number of northbridge counters)

Signed-off-by: Colton Lewis &lt;coltonlewis@google.com&gt;
Link: https://lore.kernel.org/r/20240918205319.3517569-3-coltonlewis@google.com
[sean: massage changelog, use same names as the kernel]
Signed-off-by: Sean Christopherson &lt;seanjc@google.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
