<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/sound/soc/sof/intel/tgl.c, branch v6.7</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>ASoC: SOF: ipc4/Intel: Support for firmware exception</title>
<updated>2023-09-19T17:22:11+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2023-09-19T17:22:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=03db12ef1cbc3ad86aaaf3a5e9203a936dba52b8'/>
<id>03db12ef1cbc3ad86aaaf3a5e9203a936dba52b8</id>
<content type='text'>
Merge series from Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;:

When a firmware crashes it creats a panic information into a telemetry
slot.  The panic format is defined by Zephyr, includes stack and
additional information to help to identify the reason for the crash.
Part of the firmware exception handling the firmware also sends an
EXCEPTION_CAUGHT notification.

This series implements the kernel side handling of the exception: print
information into the kernel log export the whole telemetry slot to user
space for tools extract additional information from the panic dump.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Merge series from Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;:

When a firmware crashes it creats a panic information into a telemetry
slot.  The panic format is defined by Zephyr, includes stack and
additional information to help to identify the reason for the crash.
Part of the firmware exception handling the firmware also sends an
EXCEPTION_CAUGHT notification.

This series implements the kernel side handling of the exception: print
information into the kernel log export the whole telemetry slot to user
space for tools extract additional information from the panic dump.
</pre>
</div>
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: Use generic names for IPC types</title>
<updated>2023-09-19T12:49:11+00:00</updated>
<author>
<name>Peter Ujfalusi</name>
<email>peter.ujfalusi@linux.intel.com</email>
</author>
<published>2023-09-19T10:42:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=a8fffb94475fbcced74527a20182741b5ef3e5d4'/>
<id>a8fffb94475fbcced74527a20182741b5ef3e5d4</id>
<content type='text'>
Use the new SOF_IPC_TYPE_3, SOF_IPC_TYPE_4 in core code.

No functional changes, just renaming.

Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Daniel Baluta &lt;daniel.baluta@nxp.com&gt;
Reviewed-by: Rander Wang &lt;rander.wang@intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20230919104226.32239-8-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use the new SOF_IPC_TYPE_3, SOF_IPC_TYPE_4 in core code.

No functional changes, just renaming.

Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Daniel Baluta &lt;daniel.baluta@nxp.com&gt;
Reviewed-by: Rander Wang &lt;rander.wang@intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20230919104226.32239-8-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: hda: add ipc4 FW panic support on CAVS 2.5+ platforms</title>
<updated>2023-09-19T12:48:51+00:00</updated>
<author>
<name>Rander Wang</name>
<email>rander.wang@intel.com</email>
</author>
<published>2023-09-19T09:24:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=eb6e5dab11401c64f5d5576c71e5fc0a4c7b321a'/>
<id>eb6e5dab11401c64f5d5576c71e5fc0a4c7b321a</id>
<content type='text'>
Get the FW panic information from telemetry data in memory window and
dump it to kernel log. The old platforms before CAVS 2.5+ don't support
it since there is no support in FW for them.

Signed-off-by: Rander Wang &lt;rander.wang@intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Kai Vehmanen &lt;kai.vehmanen@linux.intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Guennadi Liakhovetski &lt;guennadi.liakhovetski@linux.intel.com&gt;
Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20230919092416.4137-9-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Get the FW panic information from telemetry data in memory window and
dump it to kernel log. The old platforms before CAVS 2.5+ don't support
it since there is no support in FW for them.

Signed-off-by: Rander Wang &lt;rander.wang@intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Kai Vehmanen &lt;kai.vehmanen@linux.intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Guennadi Liakhovetski &lt;guennadi.liakhovetski@linux.intel.com&gt;
Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20230919092416.4137-9-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: add abstraction for SoundWire wake-ups</title>
<updated>2023-08-07T22:09:45+00:00</updated>
<author>
<name>Pierre-Louis Bossart</name>
<email>pierre-louis.bossart@linux.intel.com</email>
</author>
<published>2023-08-07T21:09:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9362ab78f175db2003674e008ef1b8917725d502'/>
<id>9362ab78f175db2003674e008ef1b8917725d502</id>
<content type='text'>
The existing code cannot work for LunarLake, let's add a layer of
abstraction.

No functional change in this patch.

Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Reviewed-by: Rander Wang &lt;rander.wang@intel.com&gt;
Link: https://lore.kernel.org/r/20230807210959.506849-17-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The existing code cannot work for LunarLake, let's add a layer of
abstraction.

No functional change in this patch.

Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Reviewed-by: Rander Wang &lt;rander.wang@intel.com&gt;
Link: https://lore.kernel.org/r/20230807210959.506849-17-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: tgl: unify core_put on IPC3 &amp; IPC4 path</title>
<updated>2023-05-23T12:56:00+00:00</updated>
<author>
<name>Rander Wang</name>
<email>rander.wang@intel.com</email>
</author>
<published>2023-05-23T10:32:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=1b167ba8a20152041d3af0c0cbbfd710f1e93e4b'/>
<id>1b167ba8a20152041d3af0c0cbbfd710f1e93e4b</id>
<content type='text'>
Firmware may do context saving before powering off primary core, so driver
needs to send ipc msg by set_core_state. In IPC4 path, firmware needs to
save current context to IMR before powering off primary core. Firmware
does nothing for set_core_state message in IPC3 path. So IPC4 and IPC3
can share the same operation sequence.

Signed-off-by: Rander Wang &lt;rander.wang@intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20230523103217.20412-4-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Firmware may do context saving before powering off primary core, so driver
needs to send ipc msg by set_core_state. In IPC4 path, firmware needs to
save current context to IMR before powering off primary core. Firmware
does nothing for set_core_state message in IPC3 path. So IPC4 and IPC3
can share the same operation sequence.

Signed-off-by: Rander Wang &lt;rander.wang@intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20230523103217.20412-4-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: Split the set_power_op for IPC3 and IPC4</title>
<updated>2023-04-20T11:52:02+00:00</updated>
<author>
<name>Ranjani Sridharan</name>
<email>ranjani.sridharan@linux.intel.com</email>
</author>
<published>2023-04-20T10:47:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=996b07efe49620325332081afdb0dc0bd6fe5cd0'/>
<id>996b07efe49620325332081afdb0dc0bd6fe5cd0</id>
<content type='text'>
Suspending to S0iX with IPC3 requires the PM_GATE IPC to be sent again
to stop the DMA trace. But with IPC4, this is not needed as the trace is
stopped with the LARGE_CONFIG_SET IPC. Also, sending the MOD_D0IX IPC to
set the D0I3 state again when the DSP is in D0I3 already results in an
imbalance in PM runtime states in the firmware. So split the
set_power_state ops for IPC3 and IPC4 to avoid sending the MOD_D0IX IPC
when the DSP is already in D0I3 with IPC4.

Signed-off-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Reviewed-by: Rander Wang &lt;rander.wang@intel.com&gt;
Reviewed-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20230420104714.29573-1-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Suspending to S0iX with IPC3 requires the PM_GATE IPC to be sent again
to stop the DMA trace. But with IPC4, this is not needed as the trace is
stopped with the LARGE_CONFIG_SET IPC. Also, sending the MOD_D0IX IPC to
set the D0I3 state again when the DSP is in D0I3 already results in an
imbalance in PM runtime states in the firmware. So split the
set_power_state ops for IPC3 and IPC4 to avoid sending the MOD_D0IX IPC
when the DSP is already in D0I3 with IPC4.

Signed-off-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Reviewed-by: Rander Wang &lt;rander.wang@intel.com&gt;
Reviewed-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20230420104714.29573-1-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: pci-tgl: unblock S5 entry if DMA stop has failed"</title>
<updated>2022-12-12T15:44:20+00:00</updated>
<author>
<name>Kai Vehmanen</name>
<email>kai.vehmanen@linux.intel.com</email>
</author>
<published>2022-12-09T11:45:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2aa2a5ead0ee0a358bf80a2984a641d1bf2adc2a'/>
<id>2aa2a5ead0ee0a358bf80a2984a641d1bf2adc2a</id>
<content type='text'>
If system shutdown has not been completed cleanly, it is possible the
DMA stream shutdown has not been done, or was not clean.

If this is the case, Intel TGL/ADL HDA platforms may fail to shutdown
cleanly due to pending HDA DMA transactions. To avoid this, detect this
scenario in the shutdown callback, and perform an additional controller
reset. This has been tested to unblock S5 entry if this condition is
hit.

Co-developed-by: Archana Patni &lt;archana.patni@intel.com&gt;
Signed-off-by: Archana Patni &lt;archana.patni@intel.com&gt;
Signed-off-by: Kai Vehmanen &lt;kai.vehmanen@linux.intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20221209114529.3909192-2-kai.vehmanen@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
If system shutdown has not been completed cleanly, it is possible the
DMA stream shutdown has not been done, or was not clean.

If this is the case, Intel TGL/ADL HDA platforms may fail to shutdown
cleanly due to pending HDA DMA transactions. To avoid this, detect this
scenario in the shutdown callback, and perform an additional controller
reset. This has been tested to unblock S5 entry if this condition is
hit.

Co-developed-by: Archana Patni &lt;archana.patni@intel.com&gt;
Signed-off-by: Archana Patni &lt;archana.patni@intel.com&gt;
Signed-off-by: Kai Vehmanen &lt;kai.vehmanen@linux.intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20221209114529.3909192-2-kai.vehmanen@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: hda: add callback to check SoundWire lcount information</title>
<updated>2022-11-23T15:32:05+00:00</updated>
<author>
<name>Pierre-Louis Bossart</name>
<email>pierre-louis.bossart@linux.intel.com</email>
</author>
<published>2022-11-11T04:26:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=625339caaea15c0e69d833227652d2f5b6e365cc'/>
<id>625339caaea15c0e69d833227652d2f5b6e365cc</id>
<content type='text'>
The number of links is stored in different registers depending on the
IP version, add sdw_check_lcount() callback. This callback only checks
that the number of links supported in hardware is compatible with the
number of links exposed in ACPI _DSD properties.

Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Signed-off-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20221111042653.45520-6-yung-chuan.liao@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The number of links is stored in different registers depending on the
IP version, add sdw_check_lcount() callback. This callback only checks
that the number of links supported in hardware is compatible with the
number of links exposed in ACPI _DSD properties.

Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Signed-off-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20221111042653.45520-6-yung-chuan.liao@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: hda: add per-chip enable_sdw_irq() callback</title>
<updated>2022-11-23T15:32:02+00:00</updated>
<author>
<name>Pierre-Louis Bossart</name>
<email>pierre-louis.bossart@linux.intel.com</email>
</author>
<published>2022-11-11T04:26:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8ebc90741e96646af7320336ac4433eea175390a'/>
<id>8ebc90741e96646af7320336ac4433eea175390a</id>
<content type='text'>
Different generations of Intel hardware rely on different programming
sequences to enable SoundWire IP. In existing hardware, the SoundWire
interrupt is enabled with a register field in the DSP register
space. With HDaudio multi-link extensions registers, the SoundWire
interrupt will be enabled with a generic interrupt enable field in
LCTL, without any dependency on the DSP being enabled.

Add a per-chip callback following the example of the check_sdw_irq()
model already upstream.

Note that the callback is not populated yet for MeteorLake (MTL) since
the interrupts are already enabled in the init. A follow-up patch will
move the functionality to this callback after a couple of cleanups.

Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Signed-off-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20221111042653.45520-3-yung-chuan.liao@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Different generations of Intel hardware rely on different programming
sequences to enable SoundWire IP. In existing hardware, the SoundWire
interrupt is enabled with a register field in the DSP register
space. With HDaudio multi-link extensions registers, the SoundWire
interrupt will be enabled with a generic interrupt enable field in
LCTL, without any dependency on the DSP being enabled.

Add a per-chip callback following the example of the check_sdw_irq()
model already upstream.

Note that the callback is not populated yet for MeteorLake (MTL) since
the interrupts are already enabled in the init. A follow-up patch will
move the functionality to this callback after a couple of cleanups.

Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Péter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Signed-off-by: Bard Liao &lt;yung-chuan.liao@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20221111042653.45520-3-yung-chuan.liao@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ASoC: SOF: Intel: add d0i3_offset in chip_info</title>
<updated>2022-11-07T17:10:07+00:00</updated>
<author>
<name>Rander Wang</name>
<email>rander.wang@intel.com</email>
</author>
<published>2022-11-07T16:41:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f8632adc53e25501c74f25794cddac4dbe3f1c59'/>
<id>f8632adc53e25501c74f25794cddac4dbe3f1c59</id>
<content type='text'>
MTL has different d0i3 offset compared to cavs platforms.
Use d0i3_offset to unify the setting.

Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Signed-off-by: Rander Wang &lt;rander.wang@intel.com&gt;
Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20221107164154.21925-3-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
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MTL has different d0i3 offset compared to cavs platforms.
Use d0i3_offset to unify the setting.

Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Signed-off-by: Rander Wang &lt;rander.wang@intel.com&gt;
Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20221107164154.21925-3-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
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