linux.git/sound/soc/sof/intel/hda.h, branch v5.8

ASoC: SOF/Intel: clarify SPDX license with GPL-2.0-only

2020-05-01T16:45:24+00:00

Remove the ambiguity with GPL-2.0 and use an explicit GPL-2.0-only
tag.

Signed-off-by: Pierre-Louis Bossart 
Reviewed-by: Daniel Baluta 
Reviewed-by: Kai Vehmanen 
Reviewed-by: Guennadi Liakhovetski 
Link: https://lore.kernel.org/r/20200501145850.15178-1-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown

Asoc: SOF: Intel: hda: check SoundWire wakeen interrupt in irq thread

2020-03-27T15:16:36+00:00

If pci device is in D0, wakeen interrupt will be
aggregated at cAVS level as interrupt. This commit
check the wakeen status and process it in irq thread

Signed-off-by: Pierre-Louis Bossart 
Signed-off-by: Rander Wang 
Link: https://lore.kernel.org/r/20200325215027.28716-11-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown

ASoC: SOF: Intel: hda: add WAKEEN interrupt support for SoundWire

2020-03-27T15:16:35+00:00

When a SoundWire link is in clock stop state, a Slave device may wake
up the Master for some events such as jack detection. The WAKEEN
interrupt will be triggered and processed by the audio pci device.

If audio device is in D3, the interrupt will be routed to PME, or
aggregated at cAVS level as interrupt when audio device is in D0. This
patch only supports D3 case, where the audio pci device will be
resumed by a PME event and the WAKEEN interrupt will be processed
after audio pci device is powered up and ROM is initialized
successfully.

The WAKEEN handling is only enabled after the first boot due to
dependencies on a shim_lock mutex being initialized.

Signed-off-by: Pierre-Louis Bossart 
Signed-off-by: Rander Wang 
Link: https://lore.kernel.org/r/20200325215027.28716-10-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown

ASoC: SOF: Intel: hda: merge IPC, stream and SoundWire interrupt handlers

2020-03-27T15:16:33+00:00

We have a single irq handler for SOF interrupts. We can further merge
SoundWire ones to completely remove MSI interrupts handling issues
leading to timeouts.

Signed-off-by: Pierre-Louis Bossart 
Signed-off-by: Bard Liao 
Link: https://lore.kernel.org/r/20200325215027.28716-8-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown

ASoC: SOF: Intel: add SoundWire configuration interface

2020-03-27T15:16:29+00:00

Now that the SoundWire core supports the multi-step initialization,
call the relevant APIs.

The actual hardware enablement can be done in two places, ideally we'd
want to startup the SoundWire IP as soon as possible (while still
taking power rail dependencies into account)

However when suspend/resume is implemented, the DSP device will be
resumed first, and only when the DSP firmware is downloaded/booted
would the SoundWire child devices be resumed, so there are only
marginal benefits in starting the IP earlier for the first probe.

Signed-off-by: Pierre-Louis Bossart 
Link: https://lore.kernel.org/r/20200325215027.28716-3-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown

ASoC: SOF: Intel: remove unnecessary waitq before loading firmware

2020-03-13T15:13:25+00:00

The HDA_DSP_IPC_PURGE_FW IPC from ROM is already handled in
cl_dsp_init(), and it will never be received in the IRQ thread,
so the wait condition on this IPC will never be satisfied. The
wait before loading firmware is redundant and can be removed safely.

Signed-off-by: Amery Song 
Signed-off-by: Pierre-Louis Bossart 
Reviewed-by: Keyon Jie 
Reviewed-by: Kai Vehmanen 
Reviewed-by: Pierre Bossart 
Reviewed-by: Ranjani Sridharan 
Reviewed-by: Guennadi Liakhovetski 
Link: https://lore.kernel.org/r/20200312200622.24477-6-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown

ASoC: SOF: Intel: Add Probe compress CPU DAIs

2020-02-18T21:52:11+00:00

Declare extraction CPU DAI as well as sof_probe_compr_ops. FE DAIs can
link against these new CPU DAI to create new compress devices.

Signed-off-by: Cezary Rojewski 
Acked-by: Pierre-Louis Bossart 
Link: https://lore.kernel.org/r/20200218143924.10565-10-cezary.rojewski@intel.com
Signed-off-by: Mark Brown

ASoC: SOF: Intel: Probe compress operations

2020-02-18T21:52:09+00:00

Add HDA handlers for soc_compr_ops and snd_compr_ops which cover probe
related operations. Implementation supports both connection purposes.
These merely define stream setups as core flow is covered by SOF
compress core.

Signed-off-by: Cezary Rojewski 
Acked-by: Pierre-Louis Bossart 
Link: https://lore.kernel.org/r/20200218143924.10565-8-cezary.rojewski@intel.com
Signed-off-by: Mark Brown

ASoC: SOF: Intel: Expose SDnFMT helpers

2020-02-18T21:52:08+00:00

Hda stream is setup in similar fashion for compress as it is for pcm
operations. To reuse existing code in compress path, expose SDnFMT
helper routines.

Signed-off-by: Cezary Rojewski 
Acked-by: Pierre-Louis Bossart 
Link: https://lore.kernel.org/r/20200218143924.10565-7-cezary.rojewski@intel.com
Signed-off-by: Mark Brown

ASoC: SOF: Intel: cnl: Implement feature to support DSP D0i3 in S0

2020-02-11T11:48:07+00:00

This patch implements support for DSP D0i3 when the system
is in S0. The basic idea is to schedule a delayed work after
every successful IPC TX that checks if there are only
D0I3-compatible streams active and if so transition
the DSP to D0I3.

With the introduction of DSP D0I3 in S0, we need to
ensure that the DSP is in D0I0 before sending any new
IPCs. The exception for this would be the
compact IPCs that are used to set the DSP in
D0I3/D0I0 states.

Signed-off-by: Keyon Jie 
Signed-off-by: Ranjani Sridharan 
Signed-off-by: Pierre-Louis Bossart 
Link: https://lore.kernel.org/r/20200129220726.31792-9-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown