linux.git/sound/soc/sof/intel/apl.c, branch v6.7 Linux kernel source tree ASoC: SOF: Intel: Use generic names for IPC types 2023-09-19T12:49:11+00:00 Peter Ujfalusi peter.ujfalusi@linux.intel.com 2023-09-19T10:42:24+00:00 a8fffb94475fbcced74527a20182741b5ef3e5d4 Use the new SOF_IPC_TYPE_3, SOF_IPC_TYPE_4 in core code. No functional changes, just renaming. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Reviewed-by: Rander Wang <rander.wang@intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20230919104226.32239-8-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org> 
Use the new SOF_IPC_TYPE_3, SOF_IPC_TYPE_4 in core code.

No functional changes, just renaming.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20230919104226.32239-8-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
ASoC: SOF: Intel: Split the set_power_op for IPC3 and IPC4 2023-04-20T11:52:02+00:00 Ranjani Sridharan ranjani.sridharan@linux.intel.com 2023-04-20T10:47:14+00:00 996b07efe49620325332081afdb0dc0bd6fe5cd0 Suspending to S0iX with IPC3 requires the PM_GATE IPC to be sent again to stop the DMA trace. But with IPC4, this is not needed as the trace is stopped with the LARGE_CONFIG_SET IPC. Also, sending the MOD_D0IX IPC to set the D0I3 state again when the DSP is in D0I3 already results in an imbalance in PM runtime states in the firmware. So split the set_power_state ops for IPC3 and IPC4 to avoid sending the MOD_D0IX IPC when the DSP is already in D0I3 with IPC4. Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Rander Wang <rander.wang@intel.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Link: https://lore.kernel.org/r/20230420104714.29573-1-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org> 
Suspending to S0iX with IPC3 requires the PM_GATE IPC to be sent again
to stop the DMA trace. But with IPC4, this is not needed as the trace is
stopped with the LARGE_CONFIG_SET IPC. Also, sending the MOD_D0IX IPC to
set the D0I3 state again when the DSP is in D0I3 already results in an
imbalance in PM runtime states in the firmware. So split the
set_power_state ops for IPC3 and IPC4 to avoid sending the MOD_D0IX IPC
when the DSP is already in D0I3 with IPC4.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Link: https://lore.kernel.org/r/20230420104714.29573-1-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
ASoC: SOF: Intel: add d0i3_offset in chip_info 2022-11-07T17:10:07+00:00 Rander Wang rander.wang@intel.com 2022-11-07T16:41:53+00:00 f8632adc53e25501c74f25794cddac4dbe3f1c59 MTL has different d0i3 offset compared to cavs platforms. Use d0i3_offset to unify the setting. Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Signed-off-by: Rander Wang <rander.wang@intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20221107164154.21925-3-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org> 
MTL has different d0i3 offset compared to cavs platforms.
Use d0i3_offset to unify the setting.

Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Rander Wang <rander.wang@intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20221107164154.21925-3-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
ASoC: SOF: Intel: Add ipc4 library loading implementation 2022-10-21T12:05:07+00:00 Peter Ujfalusi peter.ujfalusi@linux.intel.com 2022-10-20T12:12:34+00:00 3ab2c21e65188cac151de1fbe6adf841f2ecb082 On Intel HDA platforms the library loading is done via DMA and an IPC message is also need to be sent to initiate the downloading of the new library. Co-developed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Chao Song <chao.song@intel.com> Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Link: https://lore.kernel.org/r/20221020121238.18339-16-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org> 
On Intel HDA platforms the library loading is done via DMA and an IPC
message is also need to be sent to initiate the downloading of the new
library.

Co-developed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Chao Song <chao.song@intel.com>
Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Link: https://lore.kernel.org/r/20221020121238.18339-16-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
ASoC: SOF: ipc4/Intel: Improve and enable IPC error dump 2022-09-23T19:46:25+00:00 Mark Brown broonie@kernel.org 2022-09-23T19:46:25+00:00 e9b0ff9336850863e608c2df0dde512adecb4a20 Merge series from Peter Ujfalusi <peter.ujfalusi@linux.intel.com>: On Intel platforms the registers for DSP communications are used differently, the IPC dump information is not correct since important registers are not printed and existing ones are used a bit differently for IPC4. As a last step, enable the IPC timeout 'handling' and allow the printout of the now usefull IPC dump. 
Merge series from Peter Ujfalusi <peter.ujfalusi@linux.intel.com>:

On Intel platforms the registers for DSP communications are used differently,
the IPC dump information is not correct since important registers are not
printed and existing ones are used a bit differently for IPC4.

As a last step, enable the IPC timeout 'handling' and allow the printout of
the now usefull IPC dump.
ASoC: SOF: Intel: hda: Add separate ops for ipc_dump for IPC4 2022-09-23T13:53:18+00:00 Peter Ujfalusi peter.ujfalusi@linux.intel.com 2022-09-23T13:36:12+00:00 32b97c07c2a3b7cccc0c7e9a5b23970bd9a52c5d The use of the IPC registers are different between IPC3 and IPC4. The ipc_dump needs to use different prints depending on the used IPC protocol. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Reviewed-by: Rander Wang <rander.wang@intel.com> Link: https://lore.kernel.org/r/20220923133616.26267-3-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org> 
The use of the IPC registers are different between IPC3 and IPC4.
The ipc_dump needs to use different prints depending on the used IPC
protocol.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Link: https://lore.kernel.org/r/20220923133616.26267-3-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
ASoC: SOF: Intel: define and set the disable_interrupts op for cavs platforms 2022-09-23T12:56:17+00:00 Ranjani Sridharan ranjani.sridharan@linux.intel.com 2022-09-22T21:36:40+00:00 b2520dbcb0d3646e70fedcaab2bdfb33df1c8508 Disable the IPC and SDW nterrupts in the disable_interrupts op for cavs platforms. Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Reviewed-by: Rander Wang <rander.wang@intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20220922213644.666315-7-ranjani.sridharan@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org> 
Disable the IPC and SDW nterrupts in the disable_interrupts op for
cavs platforms.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20220922213644.666315-7-ranjani.sridharan@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
ASoC: SOF: Intel: define and set power_down_dsp op for HDA platforms 2022-09-23T12:56:13+00:00 Fred Oh fred.oh@linux.intel.com 2022-09-22T21:36:36+00:00 c714031f936e11ef9e5695efdb73cd1f45eedb69 hda_power_down_dsp is set for power_down_dsp op for all HDA platforms. Signed-off-by: Fred Oh <fred.oh@linux.intel.com> Reviewed-by: Rander Wang <rander.wang@intel.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Link: https://lore.kernel.org/r/20220922213644.666315-3-ranjani.sridharan@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org> 
hda_power_down_dsp is set for power_down_dsp op for all HDA platforms.

Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Link: https://lore.kernel.org/r/20220922213644.666315-3-ranjani.sridharan@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
ASoC: SOF: Intel: Add mtrace type information for IPC4 2022-09-09T17:48:50+00:00 Peter Ujfalusi peter.ujfalusi@linux.intel.com 2022-09-09T11:43:32+00:00 cc4a3a19b986aa13a488c8f319e413e85308f403 Set the mtrace type for platforms supported by IPC4. Note: currently only SOF_IPC4_MTRACE_INTEL_CAVS_2 type is supported by the ipc4-mtrace driver, which is used by CAVS 2.x platforms (ICL, TGL, ADL) and ACE (MTL). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Rander Wang <rander.wang@intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Link: https://lore.kernel.org/r/20220909114332.31393-8-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org> 
Set the mtrace type for platforms supported by IPC4.

Note: currently only SOF_IPC4_MTRACE_INTEL_CAVS_2 type is supported by
the ipc4-mtrace driver, which is used by CAVS 2.x platforms (ICL, TGL, ADL)
and ACE (MTL).

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Link: https://lore.kernel.org/r/20220909114332.31393-8-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
ASoC: SOC: Intel: introduce cl_init callback 2022-06-15T08:56:56+00:00 Bard Liao yung-chuan.liao@linux.intel.com 2022-06-15T08:43:47+00:00 ab222a4aaecfafece1516c775143e1cb9eb31612 The code loader init sequences are different between versions of Intel platforms. Have a cl_init callback allows us to reuse the common code. No function changed. Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com> Reviewed-by: Rander Wang <rander.wang@intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Link: https://lore.kernel.org/r/20220615084348.3489-2-yung-chuan.liao@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org> 
The code loader init sequences are different between versions of
Intel platforms. Have a cl_init callback allows us to reuse the
common code.
No function changed.

Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Link: https://lore.kernel.org/r/20220615084348.3489-2-yung-chuan.liao@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>