<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/sound/soc/sof/amd/acp-loader.c, branch v6.7</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>ASoC: SOF: amd: add option to use sram for data bin loading</title>
<updated>2023-10-23T12:29:56+00:00</updated>
<author>
<name>Vijendar Mukunda</name>
<email>Vijendar.Mukunda@amd.com</email>
</author>
<published>2023-10-20T06:28:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=145d7e5ae8f4e553478232fe3095379b60fa5496'/>
<id>145d7e5ae8f4e553478232fe3095379b60fa5496</id>
<content type='text'>
Provide an option to load DSP data bin to ACP SRAM.

Signed-off-by: Vijendar Mukunda &lt;Vijendar.Mukunda@amd.com&gt;
Link: https://lore.kernel.org/r/20231020062822.3913760-5-Vijendar.Mukunda@amd.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Provide an option to load DSP data bin to ACP SRAM.

Signed-off-by: Vijendar Mukunda &lt;Vijendar.Mukunda@amd.com&gt;
Link: https://lore.kernel.org/r/20231020062822.3913760-5-Vijendar.Mukunda@amd.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ASoC: SOF: amd: refactor acp dram usage for data bin loading</title>
<updated>2023-10-23T12:29:56+00:00</updated>
<author>
<name>Vijendar Mukunda</name>
<email>Vijendar.Mukunda@amd.com</email>
</author>
<published>2023-10-20T06:28:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=135e0d49cde383395afcaf285d6304be9230a06f'/>
<id>135e0d49cde383395afcaf285d6304be9230a06f</id>
<content type='text'>
DSP data bin can be loaded in to ACP DRAM or ACP SRAM.
Add conditional check for ACP DRAM usage for data bin loading.
Rename DRAM base address macro to have symmetry.

Signed-off-by: Vijendar Mukunda &lt;Vijendar.Mukunda@amd.com&gt;
Link: https://lore.kernel.org/r/20231020062822.3913760-4-Vijendar.Mukunda@amd.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
DSP data bin can be loaded in to ACP DRAM or ACP SRAM.
Add conditional check for ACP DRAM usage for data bin loading.
Rename DRAM base address macro to have symmetry.

Signed-off-by: Vijendar Mukunda &lt;Vijendar.Mukunda@amd.com&gt;
Link: https://lore.kernel.org/r/20231020062822.3913760-4-Vijendar.Mukunda@amd.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ASoC: SOF: amd: add module parameter for firmware debug</title>
<updated>2023-08-23T12:27:15+00:00</updated>
<author>
<name>Vijendar Mukunda</name>
<email>Vijendar.Mukunda@amd.com</email>
</author>
<published>2023-08-23T07:33:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=60eb816ed850b33f5410b1223c5d4d935a6ceb79'/>
<id>60eb816ed850b33f5410b1223c5d4d935a6ceb79</id>
<content type='text'>
Add module parameter for firmware debug. If firmware debug
flag is enabled, clear the fusion stall bit which is required
for enabling firmware debugging through JTAG.

Signed-off-by: Vijendar Mukunda &lt;Vijendar.Mukunda@amd.com&gt;
Link: https://lore.kernel.org/r/20230823073340.2829821-3-Vijendar.Mukunda@amd.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add module parameter for firmware debug. If firmware debug
flag is enabled, clear the fusion stall bit which is required
for enabling firmware debugging through JTAG.

Signed-off-by: Vijendar Mukunda &lt;Vijendar.Mukunda@amd.com&gt;
Link: https://lore.kernel.org/r/20230823073340.2829821-3-Vijendar.Mukunda@amd.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ASoC: SOF: amd: Add support for signed fw image loading</title>
<updated>2023-08-21T15:05:48+00:00</updated>
<author>
<name>Venkata Prasad Potturu</name>
<email>venkataprasad.potturu@amd.com</email>
</author>
<published>2023-08-09T12:35:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6a69b724b2f82b1c44852b432010fbe25f0e2b75'/>
<id>6a69b724b2f82b1c44852b432010fbe25f0e2b75</id>
<content type='text'>
Add support for signed firmware code bin and data bin
loading for amd platforms.

Signed-off-by: Venkata Prasad Potturu &lt;venkataprasad.potturu@amd.com&gt;
Link: https://lore.kernel.org/r/20230809123534.287707-2-venkataprasad.potturu@amd.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for signed firmware code bin and data bin
loading for amd platforms.

Signed-off-by: Venkata Prasad Potturu &lt;venkataprasad.potturu@amd.com&gt;
Link: https://lore.kernel.org/r/20230809123534.287707-2-venkataprasad.potturu@amd.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ASoC: SOF: amd: Enable cache for AMD Rembrandt platform</title>
<updated>2022-12-25T23:33:27+00:00</updated>
<author>
<name>V sujith kumar Reddy</name>
<email>Vsujithkumar.Reddy@amd.com</email>
</author>
<published>2022-12-13T07:16:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b5ba646142195d63dd1aae69bc15457fca5aeb78'/>
<id>b5ba646142195d63dd1aae69bc15457fca5aeb78</id>
<content type='text'>
Enable DSP cache for ACP memory

Signed-off-by: V sujith kumar Reddy &lt;Vsujithkumar.Reddy@amd.com&gt;
Link: https://lore.kernel.org/r/20221213071640.3038853-1-Vsujithkumar.Reddy@amd.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Enable DSP cache for ACP memory

Signed-off-by: V sujith kumar Reddy &lt;Vsujithkumar.Reddy@amd.com&gt;
Link: https://lore.kernel.org/r/20221213071640.3038853-1-Vsujithkumar.Reddy@amd.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ASoC: SOF: amd: Use the basefw firmware container directly</title>
<updated>2022-10-21T12:04:55+00:00</updated>
<author>
<name>Peter Ujfalusi</name>
<email>peter.ujfalusi@linux.intel.com</email>
</author>
<published>2022-10-20T12:12:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b9bed09aa97f90a40695eb472b1baba81242e3ed'/>
<id>b9bed09aa97f90a40695eb472b1baba81242e3ed</id>
<content type='text'>
Switch to access to the firmware struct via sdev-&gt;basefw container to
unblock the removal of the firmware information from plat_data.

Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Chao Song &lt;chao.song@intel.com&gt;
Reviewed-by: Kai Vehmanen &lt;kai.vehmanen@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20221020121238.18339-4-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Switch to access to the firmware struct via sdev-&gt;basefw container to
unblock the removal of the firmware information from plat_data.

Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@linux.intel.com&gt;
Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Reviewed-by: Chao Song &lt;chao.song@intel.com&gt;
Reviewed-by: Kai Vehmanen &lt;kai.vehmanen@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20221020121238.18339-4-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ASoC: SOF: amd: Add support for Rembrandt plaform.</title>
<updated>2022-09-20T18:38:02+00:00</updated>
<author>
<name>V sujith kumar Reddy</name>
<email>Vsujithkumar.Reddy@amd.com</email>
</author>
<published>2022-09-13T14:43:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=41cb85bc4b526bb228579c04857bc58213e5f9b5'/>
<id>41cb85bc4b526bb228579c04857bc58213e5f9b5</id>
<content type='text'>
Add pci driver and platform driver to enable SOF support on ACP6x
architecture based Rembrandt platform.

Signed-off-by: Ajit Kumar Pandey &lt;AjitKumar.Pandey@amd.com&gt;
Signed-off-by: V sujith kumar Reddy &lt;Vsujithkumar.Reddy@amd.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220913144319.1055302-3-Vsujithkumar.Reddy@amd.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add pci driver and platform driver to enable SOF support on ACP6x
architecture based Rembrandt platform.

Signed-off-by: Ajit Kumar Pandey &lt;AjitKumar.Pandey@amd.com&gt;
Signed-off-by: V sujith kumar Reddy &lt;Vsujithkumar.Reddy@amd.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220913144319.1055302-3-Vsujithkumar.Reddy@amd.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ASoC: SOF: amd: Make ACP core code generic for newer SOC transition</title>
<updated>2022-09-20T18:38:01+00:00</updated>
<author>
<name>Ajit Kumar Pandey</name>
<email>AjitKumar.Pandey@amd.com</email>
</author>
<published>2022-09-13T14:43:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4da6b033f5454ccbac2d5795d7edfb3f2a777104'/>
<id>4da6b033f5454ccbac2d5795d7edfb3f2a777104</id>
<content type='text'>
Newer AMD SOC differs slightly in terms of few registers offset and
configuration. Add offsets into chip_info struct to make core ACP
code more generic and resusable on newer SOC.

Signed-off-by: Ajit Kumar Pandey &lt;AjitKumar.Pandey@amd.com&gt;
Signed-off-by: V sujith kumar Reddy &lt;Vsujithkumar.Reddy@amd.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220913144319.1055302-2-Vsujithkumar.Reddy@amd.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Newer AMD SOC differs slightly in terms of few registers offset and
configuration. Add offsets into chip_info struct to make core ACP
code more generic and resusable on newer SOC.

Signed-off-by: Ajit Kumar Pandey &lt;AjitKumar.Pandey@amd.com&gt;
Signed-off-by: V sujith kumar Reddy &lt;Vsujithkumar.Reddy@amd.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220913144319.1055302-2-Vsujithkumar.Reddy@amd.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ASoC: SOF: amd: Move group register configuration to acp-loader</title>
<updated>2022-03-07T13:12:50+00:00</updated>
<author>
<name>Ajit Kumar Pandey</name>
<email>AjitKumar.Pandey@amd.com</email>
</author>
<published>2022-03-04T20:57:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7cf467ac9cf33f0975095f080a79f6ec6d9be5b6'/>
<id>7cf467ac9cf33f0975095f080a79f6ec6d9be5b6</id>
<content type='text'>
We are using PTE_GRP1 for DMA operations to load firmware binaries
but we are enabling PTE_GRP and flushing ATU cache much before in
probe callbacks. This can cause issue if we try to load firmware
runtime during system resume as probe callback will not be invoked
hence PTE_GRP will not be enabled. Moreover it makes more sense to
flush the cache after register configuration.

Move PTE group register configuration to acp-loader within pre_fw_run
callback to avoid such issue.

Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Signed-off-by: Ajit Kumar Pandey &lt;AjitKumar.Pandey@amd.com&gt;
Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220304205733.62233-7-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We are using PTE_GRP1 for DMA operations to load firmware binaries
but we are enabling PTE_GRP and flushing ATU cache much before in
probe callbacks. This can cause issue if we try to load firmware
runtime during system resume as probe callback will not be invoked
hence PTE_GRP will not be enabled. Moreover it makes more sense to
flush the cache after register configuration.

Move PTE group register configuration to acp-loader within pre_fw_run
callback to avoid such issue.

Reviewed-by: Ranjani Sridharan &lt;ranjani.sridharan@linux.intel.com&gt;
Signed-off-by: Ajit Kumar Pandey &lt;AjitKumar.Pandey@amd.com&gt;
Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20220304205733.62233-7-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ASoC: SOF: amd: Add fw loader and renoir dsp ops to load firmware</title>
<updated>2021-11-17T17:35:46+00:00</updated>
<author>
<name>Ajit Kumar Pandey</name>
<email>AjitKumar.Pandey@amd.com</email>
</author>
<published>2021-11-17T09:37:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7e51a9e38ab204eba2844b8773486392d7444435'/>
<id>7e51a9e38ab204eba2844b8773486392d7444435</id>
<content type='text'>
Add acp-loader module with ops callback to load and run firmware
on ACP DSP block on Renoir platform.

Signed-off-by: Ajit Kumar Pandey &lt;AjitKumar.Pandey@amd.com&gt;
Reviewed-by: Bard Liao &lt;bard.liao@intel.com&gt;
Reviewed-by: Kai Vehmanen &lt;kai.vehmanen@linux.intel.com&gt;
Signed-off-by: Daniel Baluta &lt;daniel.baluta@nxp.com&gt;
Link: https://lore.kernel.org/r/20211117093734.17407-4-daniel.baluta@oss.nxp.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add acp-loader module with ops callback to load and run firmware
on ACP DSP block on Renoir platform.

Signed-off-by: Ajit Kumar Pandey &lt;AjitKumar.Pandey@amd.com&gt;
Reviewed-by: Bard Liao &lt;bard.liao@intel.com&gt;
Reviewed-by: Kai Vehmanen &lt;kai.vehmanen@linux.intel.com&gt;
Signed-off-by: Daniel Baluta &lt;daniel.baluta@nxp.com&gt;
Link: https://lore.kernel.org/r/20211117093734.17407-4-daniel.baluta@oss.nxp.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
