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<title>linux.git/kernel/irq, branch v3.1-rc3</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>irqdesc: fix new kernel-doc warning</title>
<updated>2011-08-18T21:12:48+00:00</updated>
<author>
<name>Randy Dunlap</name>
<email>rdunlap@xenotime.net</email>
</author>
<published>2011-08-18T19:19:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d522a0d17963e9c2e556db2cbd60c96d40505b6c'/>
<id>d522a0d17963e9c2e556db2cbd60c96d40505b6c</id>
<content type='text'>
Fix kernel-doc warning in irqdesc.c:

  Warning(kernel/irq/irqdesc.c:353): No description found for parameter 'owner'

Signed-off-by: Randy Dunlap &lt;rdunlap@xenotime.net&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
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<pre>
Fix kernel-doc warning in irqdesc.c:

  Warning(kernel/irq/irqdesc.c:353): No description found for parameter 'owner'

Signed-off-by: Randy Dunlap &lt;rdunlap@xenotime.net&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip</title>
<updated>2011-08-17T17:23:50+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2011-08-17T17:23:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=950d0a10d12578a270f3dfa9fd76fe5c2deb343f'/>
<id>950d0a10d12578a270f3dfa9fd76fe5c2deb343f</id>
<content type='text'>
* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  irq: Track the owner of irq descriptor
  irq: Always set IRQF_ONESHOT if no primary handler is specified
  genirq: Fix wrong bit operation
</content>
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<pre>
* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  irq: Track the owner of irq descriptor
  irq: Always set IRQF_ONESHOT if no primary handler is specified
  genirq: Fix wrong bit operation
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'imx/dt' into next/dt</title>
<updated>2011-07-28T15:25:46+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2011-07-28T15:25:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6124a4e430b64d1577438c8648c59e996d02e73e'/>
<id>6124a4e430b64d1577438c8648c59e996d02e73e</id>
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</content>
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<pre>
</pre>
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</entry>
<entry>
<title>irq: Track the owner of irq descriptor</title>
<updated>2011-07-28T09:23:21+00:00</updated>
<author>
<name>Sebastian Andrzej Siewior</name>
<email>sebastian@breakpoint.cc</email>
</author>
<published>2011-07-11T10:17:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b6873807a7143b7d6d8b06809295e559d07d7deb'/>
<id>b6873807a7143b7d6d8b06809295e559d07d7deb</id>
<content type='text'>
Interrupt descriptors can be allocated from modules. The interrupts
are used by other modules, but we have no refcount on the module which
provides the interrupts and there is no way to establish one on the
device level as the interrupt using module is agnostic to the fact
that the interrupt is provided by a module rather than by some builtin
interrupt controller.

To prevent removal of the interrupt providing module, we can track the
owner of the interrupt descriptor, which also provides the relevant
irq chip functions in the irq descriptor.

request/setup_irq() can now acquire a refcount on the owner module to
prevent unloading. free_irq() drops the refcount.

Signed-off-by: Sebastian Andrzej Siewior &lt;sebastian@breakpoint.cc&gt;
Link: http://lkml.kernel.org/r/20110711101731.GA13804@Chamillionaire.breakpoint.cc
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
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<pre>
Interrupt descriptors can be allocated from modules. The interrupts
are used by other modules, but we have no refcount on the module which
provides the interrupts and there is no way to establish one on the
device level as the interrupt using module is agnostic to the fact
that the interrupt is provided by a module rather than by some builtin
interrupt controller.

To prevent removal of the interrupt providing module, we can track the
owner of the interrupt descriptor, which also provides the relevant
irq chip functions in the irq descriptor.

request/setup_irq() can now acquire a refcount on the owner module to
prevent unloading. free_irq() drops the refcount.

Signed-off-by: Sebastian Andrzej Siewior &lt;sebastian@breakpoint.cc&gt;
Link: http://lkml.kernel.org/r/20110711101731.GA13804@Chamillionaire.breakpoint.cc
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>irq: Always set IRQF_ONESHOT if no primary handler is specified</title>
<updated>2011-07-28T09:23:21+00:00</updated>
<author>
<name>Sebastian Andrzej Siewior</name>
<email>bigeasy@linutronix.de</email>
</author>
<published>2011-07-07T20:32:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f3637a5f2e2eb391ff5757bc83fb5de8f9726464'/>
<id>f3637a5f2e2eb391ff5757bc83fb5de8f9726464</id>
<content type='text'>
If no primary handler is specified then a default one is assigned
which always returns IRQ_WAKE_THREAD. This handler requires the
IRQF_ONESHOT flag on LEVEL / EIO typed irqs because the source of
interrupt is not disabled. Since it is required for those users and
there is no difference for others it makes sense to add this flag
unconditionally.

Signed-off-by: Sebastian Andrzej Siewior &lt;bigeasy@linutronix.de&gt;
Link: http://lkml.kernel.org/r/1310070737-18514-1-git-send-email-bigeasy@linutronix.de
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
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<pre>
If no primary handler is specified then a default one is assigned
which always returns IRQ_WAKE_THREAD. This handler requires the
IRQF_ONESHOT flag on LEVEL / EIO typed irqs because the source of
interrupt is not disabled. Since it is required for those users and
there is no difference for others it makes sense to add this flag
unconditionally.

Signed-off-by: Sebastian Andrzej Siewior &lt;bigeasy@linutronix.de&gt;
Link: http://lkml.kernel.org/r/1310070737-18514-1-git-send-email-bigeasy@linutronix.de
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt/irq: add irq_domain_generate_simple() helper</title>
<updated>2011-07-28T07:32:04+00:00</updated>
<author>
<name>Grant Likely</name>
<email>grant.likely@secretlab.ca</email>
</author>
<published>2011-07-26T09:19:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7e71330169d8056536b299290544980bccc6b300'/>
<id>7e71330169d8056536b299290544980bccc6b300</id>
<content type='text'>
irq_domain_generate_simple() is an easy way to generate an irq translation
domain for simple irq controllers.  It assumes a flat 1:1 mapping from
hardware irq number to an offset of the first linux irq number assigned
to the controller

Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
irq_domain_generate_simple() is an easy way to generate an irq translation
domain for simple irq controllers.  It assumes a flat 1:1 mapping from
hardware irq number to an offset of the first linux irq number assigned
to the controller

Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>irq: add irq_domain translation infrastructure</title>
<updated>2011-07-28T07:32:04+00:00</updated>
<author>
<name>Grant Likely</name>
<email>grant.likely@secretlab.ca</email>
</author>
<published>2011-07-26T09:19:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=08a543ad33fc188650801bd36eed4ffe272643e1'/>
<id>08a543ad33fc188650801bd36eed4ffe272643e1</id>
<content type='text'>
This patch adds irq_domain infrastructure for translating from
hardware irq numbers to linux irqs.  This is particularly important
for architectures adding device tree support because the current
implementation (excluding PowerPC and SPARC) cannot handle
translation for more than a single interrupt controller.  irq_domain
supports device tree translation for any number of interrupt
controllers.

This patch converts x86, Microblaze, ARM and MIPS to use irq_domain
for device tree irq translation.  x86 is untested beyond compiling it,
irq_domain is enabled for MIPS and Microblaze, but the old behaviour is
preserved until the core code is modified to actually register an
irq_domain yet.  On ARM it works and is required for much of the new
ARM device tree board support.

PowerPC has /not/ been converted to use this new infrastructure.  It
is still missing some features before it can replace the virq
infrastructure already in powerpc (see documentation on
irq_domain_map/unmap for details).  Followup patches will add the
missing pieces and migrate PowerPC to use irq_domain.

SPARC has its own method of managing interrupts from the device tree
and is unaffected by this change.

Acked-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds irq_domain infrastructure for translating from
hardware irq numbers to linux irqs.  This is particularly important
for architectures adding device tree support because the current
implementation (excluding PowerPC and SPARC) cannot handle
translation for more than a single interrupt controller.  irq_domain
supports device tree translation for any number of interrupt
controllers.

This patch converts x86, Microblaze, ARM and MIPS to use irq_domain
for device tree irq translation.  x86 is untested beyond compiling it,
irq_domain is enabled for MIPS and Microblaze, but the old behaviour is
preserved until the core code is modified to actually register an
irq_domain yet.  On ARM it works and is required for much of the new
ARM device tree board support.

PowerPC has /not/ been converted to use this new infrastructure.  It
is still missing some features before it can replace the virq
infrastructure already in powerpc (see documentation on
irq_domain_map/unmap for details).  Followup patches will add the
missing pieces and migrate PowerPC to use irq_domain.

SPARC has its own method of managing interrupts from the device tree
and is unaffected by this change.

Acked-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>genirq: Fix wrong bit operation</title>
<updated>2011-07-26T14:24:02+00:00</updated>
<author>
<name>jhbird.choi@samsung.com</name>
<email>jhbird.choi@samsung.com</email>
</author>
<published>2011-07-21T06:29:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=1dd75f91ae713049eb6baaa640078f3a6549e522'/>
<id>1dd75f91ae713049eb6baaa640078f3a6549e522</id>
<content type='text'>
(!msk &amp; 0x01) should be !(msk &amp; 0x01)

Signed-off-by: Jonghwan Choi &lt;jhbird.choi@samsung.com&gt;
Link: http://lkml.kernel.org/r/1311229754-6003-1-git-send-email-jhbird.choi@samsung.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: stable@kernel.org
</content>
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<pre>
(!msk &amp; 0x01) should be !(msk &amp; 0x01)

Signed-off-by: Jonghwan Choi &lt;jhbird.choi@samsung.com&gt;
Link: http://lkml.kernel.org/r/1311229754-6003-1-git-send-email-jhbird.choi@samsung.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: stable@kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>devres: fix possible use after free</title>
<updated>2011-07-26T03:57:14+00:00</updated>
<author>
<name>Maxin B John</name>
<email>maxin.john@gmail.com</email>
</author>
<published>2011-07-26T00:12:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=ae891a1b93bf62e9aaa116a7a71312375047fc9f'/>
<id>ae891a1b93bf62e9aaa116a7a71312375047fc9f</id>
<content type='text'>
devres uses the pointer value as key after it's freed, which is safe but
triggers spurious use-after-free warnings on some static analysis tools.
Rearrange code to avoid such warnings.

Signed-off-by: Maxin B. John &lt;maxin.john@gmail.com&gt;
Reviewed-by: Rolf Eike Beer &lt;eike-kernel@sf-tec.de&gt;
Acked-by: Tejun Heo &lt;tj@kernel.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
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<pre>
devres uses the pointer value as key after it's freed, which is safe but
triggers spurious use-after-free warnings on some static analysis tools.
Rearrange code to avoid such warnings.

Signed-off-by: Maxin B. John &lt;maxin.john@gmail.com&gt;
Reviewed-by: Rolf Eike Beer &lt;eike-kernel@sf-tec.de&gt;
Acked-by: Tejun Heo &lt;tj@kernel.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>genirq: replace irq_gc_ack() with {set,clr}_bit variants (fwd)</title>
<updated>2011-07-07T16:02:26+00:00</updated>
<author>
<name>Simon Guinot</name>
<email>sguinot@lacie.com</email>
</author>
<published>2011-07-06T16:41:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=659fb32d1b67476f4ade25e9ea0e2642a5b9c4b5'/>
<id>659fb32d1b67476f4ade25e9ea0e2642a5b9c4b5</id>
<content type='text'>
This fixes a regression introduced by e59347a "arm: orion:
Use generic irq chip".

Depending on the device, interrupts acknowledgement is done by setting
or by clearing a dedicated register. Replace irq_gc_ack() with some
{set,clr}_bit variants allows to handle both cases.

Note that this patch affects the following SoCs: Davinci, Samsung and
Orion. Except for this last, the change is minor: irq_gc_ack() is just
renamed into irq_gc_ack_set_bit().

For the Orion SoCs, the edge GPIO interrupts support is currently
broken. irq_gc_ack() try to acknowledge a such interrupt by setting
the corresponding cause register bit. The Orion GPIO device expect the
opposite. To fix this issue, the irq_gc_ack_clr_bit() variant is used.

Tested on Network Space v2.

Reported-by: Joey Oravec &lt;joravec@drewtech.com&gt;
Signed-off-by: Simon Guinot &lt;sguinot@lacie.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This fixes a regression introduced by e59347a "arm: orion:
Use generic irq chip".

Depending on the device, interrupts acknowledgement is done by setting
or by clearing a dedicated register. Replace irq_gc_ack() with some
{set,clr}_bit variants allows to handle both cases.

Note that this patch affects the following SoCs: Davinci, Samsung and
Orion. Except for this last, the change is minor: irq_gc_ack() is just
renamed into irq_gc_ack_set_bit().

For the Orion SoCs, the edge GPIO interrupts support is currently
broken. irq_gc_ack() try to acknowledge a such interrupt by setting
the corresponding cause register bit. The Orion GPIO device expect the
opposite. To fix this issue, the irq_gc_ack_clr_bit() variant is used.

Tested on Network Space v2.

Reported-by: Joey Oravec &lt;joravec@drewtech.com&gt;
Signed-off-by: Simon Guinot &lt;sguinot@lacie.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
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