<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/kernel/irq/internals.h, branch v6.14</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>genirq: Remove IRQ_MOVE_PCNTXT and related code</title>
<updated>2025-01-15T20:38:53+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2024-12-10T10:34:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f94a18249b7f9131f3ca8eacf07f21050747ebd7'/>
<id>f94a18249b7f9131f3ca8eacf07f21050747ebd7</id>
<content type='text'>
Now that x86 is converted over to use the IRQCHIP_MOVE_DEFERRED flags,
remove IRQ*_MOVE_PCNTXT and related code.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/all/20241210103335.626707225@linutronix.de


</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Now that x86 is converted over to use the IRQCHIP_MOVE_DEFERRED flags,
remove IRQ*_MOVE_PCNTXT and related code.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/all/20241210103335.626707225@linutronix.de


</pre>
</div>
</content>
</entry>
<entry>
<title>genirq: Remove handle_enforce_irqctx() wrapper</title>
<updated>2025-01-15T09:56:22+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2024-12-10T10:20:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9620301cc27f6dc6197236a55a44fac8e64be0a1'/>
<id>9620301cc27f6dc6197236a55a44fac8e64be0a1</id>
<content type='text'>
Now that it is unconditionally available, remove the wrapper.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/all/20241210101811.561078243@linutronix.de

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Now that it is unconditionally available, remove the wrapper.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/all/20241210101811.561078243@linutronix.de

</pre>
</div>
</content>
</entry>
<entry>
<title>genirq: Make handle_enforce_irqctx() unconditionally available</title>
<updated>2025-01-15T09:56:21+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2024-12-10T10:20:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8d187a77f04c14fb459a5301d69f733a5a1396bc'/>
<id>8d187a77f04c14fb459a5301d69f733a5a1396bc</id>
<content type='text'>
Commit 1b57d91b969c ("irqchip/gic-v2, v3: Prevent SW resends entirely")
sett the flag which enforces interrupt handling in interrupt context and
prevents software base resends for ARM GIC v2/v3.

But it missed that the helper function which checks the flag was hidden
behind CONFIG_GENERIC_PENDING_IRQ, which is not set by ARM[64].

Make the helper unconditionally available so that the enforcement actually
works.

Fixes: 1b57d91b969c ("irqchip/gic-v2, v3: Prevent SW resends entirely")
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/all/20241210101811.497716609@linutronix.de

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Commit 1b57d91b969c ("irqchip/gic-v2, v3: Prevent SW resends entirely")
sett the flag which enforces interrupt handling in interrupt context and
prevents software base resends for ARM GIC v2/v3.

But it missed that the helper function which checks the flag was hidden
behind CONFIG_GENERIC_PENDING_IRQ, which is not set by ARM[64].

Make the helper unconditionally available so that the enforcement actually
works.

Fixes: 1b57d91b969c ("irqchip/gic-v2, v3: Prevent SW resends entirely")
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/all/20241210101811.497716609@linutronix.de

</pre>
</div>
</content>
</entry>
<entry>
<title>genirq/debugfs: Print irqdomain flags as human-readable strings</title>
<updated>2024-06-03T10:24:51+00:00</updated>
<author>
<name>Jinjie Ruan</name>
<email>ruanjinjie@huawei.com</email>
</author>
<published>2024-05-29T09:16:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=cb06c9826991c746039d076df10d40819f88a6bc'/>
<id>cb06c9826991c746039d076df10d40819f88a6bc</id>
<content type='text'>
Improve the readability of irqdomain debugging information in debugfs by
printing the flags field of domain files as human-readable strings instead
of a raw bitmask, which aligned with the existing style used for irqchip
flags in the irq debug files.

Before:
	#cat :cpus:cpu@0:interrupt-controller
	name:   :cpus:cpu@0:interrupt-controller
	 size:   0
	 mapped: 2
	 flags:  0x00000003

After:
	#cat :cpus:cpu@0:interrupt-controller
	name:   :cpus:cpu@0:interrupt-controller
	 size:   0
	 mapped: 3
	 flags:  0x00000003
	            IRQ_DOMAIN_FLAG_HIERARCHY
	            IRQ_DOMAIN_NAME_ALLOCATED

Signed-off-by: Jinjie Ruan &lt;ruanjinjie@huawei.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/r/20240529091628.3666379-1-ruanjinjie@huawei.com

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Improve the readability of irqdomain debugging information in debugfs by
printing the flags field of domain files as human-readable strings instead
of a raw bitmask, which aligned with the existing style used for irqchip
flags in the irq debug files.

Before:
	#cat :cpus:cpu@0:interrupt-controller
	name:   :cpus:cpu@0:interrupt-controller
	 size:   0
	 mapped: 2
	 flags:  0x00000003

After:
	#cat :cpus:cpu@0:interrupt-controller
	name:   :cpus:cpu@0:interrupt-controller
	 size:   0
	 mapped: 3
	 flags:  0x00000003
	            IRQ_DOMAIN_FLAG_HIERARCHY
	            IRQ_DOMAIN_NAME_ALLOCATED

Signed-off-by: Jinjie Ruan &lt;ruanjinjie@huawei.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/r/20240529091628.3666379-1-ruanjinjie@huawei.com

</pre>
</div>
</content>
</entry>
<entry>
<title>genirq: Reuse irq_is_nmi()</title>
<updated>2024-04-24T18:42:57+00:00</updated>
<author>
<name>Jinjie Ruan</name>
<email>ruanjinjie@huawei.com</email>
</author>
<published>2024-04-23T02:40:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6678ae1918ff554f7438ff3f1a3be22d6d01f2fb'/>
<id>6678ae1918ff554f7438ff3f1a3be22d6d01f2fb</id>
<content type='text'>
Move irq_is_nmi() to the internal header file and reuse it all over the
place.

Signed-off-by: Jinjie Ruan &lt;ruanjinjie@huawei.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/r/20240423024037.3331215-1-ruanjinjie@huawei.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move irq_is_nmi() to the internal header file and reuse it all over the
place.

Signed-off-by: Jinjie Ruan &lt;ruanjinjie@huawei.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/r/20240423024037.3331215-1-ruanjinjie@huawei.com
</pre>
</div>
</content>
</entry>
<entry>
<title>genirq: Avoid summation loops for /proc/interrupts</title>
<updated>2024-04-12T15:08:05+00:00</updated>
<author>
<name>Bitao Hu</name>
<email>yaoma@linux.alibaba.com</email>
</author>
<published>2024-04-11T07:41:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=25a4a015118037809c97d089d69e927737e589e1'/>
<id>25a4a015118037809c97d089d69e927737e589e1</id>
<content type='text'>
show_interrupts() unconditionally accumulates the per CPU interrupt
statistics to determine whether an interrupt was ever raised.

This can be avoided for all interrupts which are not strictly per CPU
and not of type NMI because those interrupts provide already an
accumulated counter. The required logic is already implemented in
kstat_irqs().

Split the inner access logic out of kstat_irqs() and use it for
kstat_irqs() and show_interrupts() to avoid the accumulation loop
when possible.

Originally-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Bitao Hu &lt;yaoma@linux.alibaba.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Liu Song &lt;liusong@linux.alibaba.com&gt;
Reviewed-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Link: https://lore.kernel.org/r/20240411074134.30922-4-yaoma@linux.alibaba.com

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
show_interrupts() unconditionally accumulates the per CPU interrupt
statistics to determine whether an interrupt was ever raised.

This can be avoided for all interrupts which are not strictly per CPU
and not of type NMI because those interrupts provide already an
accumulated counter. The required logic is already implemented in
kstat_irqs().

Split the inner access logic out of kstat_irqs() and use it for
kstat_irqs() and show_interrupts() to avoid the accumulation loop
when possible.

Originally-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Bitao Hu &lt;yaoma@linux.alibaba.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Liu Song &lt;liusong@linux.alibaba.com&gt;
Reviewed-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Link: https://lore.kernel.org/r/20240411074134.30922-4-yaoma@linux.alibaba.com

</pre>
</div>
</content>
</entry>
<entry>
<title>genirq: Convert kstat_irqs to a struct</title>
<updated>2024-04-12T15:08:05+00:00</updated>
<author>
<name>Bitao Hu</name>
<email>yaoma@linux.alibaba.com</email>
</author>
<published>2024-04-11T07:41:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=86d2a2f51fbada84e377665df06b5a479a1edc99'/>
<id>86d2a2f51fbada84e377665df06b5a479a1edc99</id>
<content type='text'>
The irq_desc::kstat_irqs member is a per-CPU variable of type int, which is
only capable of counting. A snapshot mechanism for interrupt statistics
will be added soon, which requires an additional variable to store the
snapshot.

To facilitate expansion, convert kstat_irqs here to a struct containing
only the count.

Originally-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Bitao Hu &lt;yaoma@linux.alibaba.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/r/20240411074134.30922-2-yaoma@linux.alibaba.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The irq_desc::kstat_irqs member is a per-CPU variable of type int, which is
only capable of counting. A snapshot mechanism for interrupt statistics
will be added soon, which requires an additional variable to store the
snapshot.

To facilitate expansion, convert kstat_irqs here to a struct containing
only the count.

Originally-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Bitao Hu &lt;yaoma@linux.alibaba.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/r/20240411074134.30922-2-yaoma@linux.alibaba.com
</pre>
</div>
</content>
</entry>
<entry>
<title>genirq: Remove unused extern declaration</title>
<updated>2023-07-31T15:27:16+00:00</updated>
<author>
<name>YueHaibing</name>
<email>yuehaibing@huawei.com</email>
</author>
<published>2023-07-20T14:36:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=51a5acce7162185a9b9d695b314a12fc067562b4'/>
<id>51a5acce7162185a9b9d695b314a12fc067562b4</id>
<content type='text'>
commit 3795de236d67 ("genirq: Distangle kernel/irq/handle.c")
left behind this.

Signed-off-by: YueHaibing &lt;yuehaibing@huawei.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/r/20230720143625.29176-1-yuehaibing@huawei.com

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 3795de236d67 ("genirq: Distangle kernel/irq/handle.c")
left behind this.

Signed-off-by: YueHaibing &lt;yuehaibing@huawei.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/r/20230720143625.29176-1-yuehaibing@huawei.com

</pre>
</div>
</content>
</entry>
<entry>
<title>genirq: Prevent nested thread vs synchronize_hardirq() deadlock</title>
<updated>2023-07-31T15:24:22+00:00</updated>
<author>
<name>Vincent Whitchurch</name>
<email>vincent.whitchurch@axis.com</email>
</author>
<published>2023-07-06T14:22:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e2c12739ccf76aae12e9e949526a475b9d17adaa'/>
<id>e2c12739ccf76aae12e9e949526a475b9d17adaa</id>
<content type='text'>
There is a possibility of deadlock if synchronize_hardirq() is called
when the nested threaded interrupt is active.  The following scenario
was observed on a uniprocessor PREEMPT_NONE system:

 Thread 1                      Thread 2

 handle_nested_thread()
  Set INPROGRESS
  Call -&gt;thread_fn()
   thread_fn goes to sleep

                              free_irq()
                               __synchronize_hardirq()
                                Busy-loop forever waiting for INPROGRESS
                                to be cleared

The INPROGRESS flag is only supposed to be used for hard interrupt
handlers.  Remove the incorrect usage in the nested threaded interrupt
case and instead re-use the threads_active / wait_for_threads mechanism
to wait for nested threaded interrupts to complete.

Signed-off-by: Vincent Whitchurch &lt;vincent.whitchurch@axis.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/r/20230613-genirq-nested-v3-1-ae58221143eb@axis.com

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There is a possibility of deadlock if synchronize_hardirq() is called
when the nested threaded interrupt is active.  The following scenario
was observed on a uniprocessor PREEMPT_NONE system:

 Thread 1                      Thread 2

 handle_nested_thread()
  Set INPROGRESS
  Call -&gt;thread_fn()
   thread_fn goes to sleep

                              free_irq()
                               __synchronize_hardirq()
                                Busy-loop forever waiting for INPROGRESS
                                to be cleared

The INPROGRESS flag is only supposed to be used for hard interrupt
handlers.  Remove the incorrect usage in the nested threaded interrupt
case and instead re-use the threads_active / wait_for_threads mechanism
to wait for nested threaded interrupts to complete.

Signed-off-by: Vincent Whitchurch &lt;vincent.whitchurch@axis.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/r/20230613-genirq-nested-v3-1-ae58221143eb@axis.com

</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'irqchip-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core</title>
<updated>2023-06-26T09:05:49+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2023-06-26T09:05:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f121ab7f4ac32ed2aa51035534926f9507a8308b'/>
<id>f121ab7f4ac32ed2aa51035534926f9507a8308b</id>
<content type='text'>
Pull irqchip updates from Marc Zyngier:

  - A number of Loogson/Loogarch fixes

  - Allow the core code to retrigger an interrupt that has
    fired while the same interrupt is being handled on another
    CPU, papering over a GICv3 architecture issue

  - Work around an integration problem on ASR8601, where the CPU
    numbering isn't representable in the GIC implementation...

  - Add some missing interrupt to the STM32 irqchip

  - A bunch of warning squashing triggered by W=1 builds

Link: https://lore.kernel.org/r/20230623224345.3577134-1-maz@kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull irqchip updates from Marc Zyngier:

  - A number of Loogson/Loogarch fixes

  - Allow the core code to retrigger an interrupt that has
    fired while the same interrupt is being handled on another
    CPU, papering over a GICv3 architecture issue

  - Work around an integration problem on ASR8601, where the CPU
    numbering isn't representable in the GIC implementation...

  - Add some missing interrupt to the STM32 irqchip

  - A bunch of warning squashing triggered by W=1 builds

Link: https://lore.kernel.org/r/20230623224345.3577134-1-maz@kernel.org
</pre>
</div>
</content>
</entry>
</feed>
