linux.git/include/soc/amlogic, branch vsnprintf Linux kernel source tree reset: amlogic: add auxiliary reset driver support 2024-10-01T08:40:32+00:00 Jerome Brunet jbrunet@baylibre.com 2024-09-10T16:32:51+00:00 fb4c31587adfa9cd50661a535bdbfcc4da57ee38 Add support for the reset controller present in the audio clock controller of the g12 and sm1 SoC families, using the auxiliary bus. This is expected to replace the driver currently present directly within the related clock driver. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20240910-meson-rst-aux-v5-9-60be62635d3e@baylibre.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> 
Add support for the reset controller present in the audio clock
controller of the g12 and sm1 SoC families, using the auxiliary bus.

This is expected to replace the driver currently present directly
within the related clock driver.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20240910-meson-rst-aux-v5-9-60be62635d3e@baylibre.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver 2022-11-21T18:28:45+00:00 Jiucheng Xu jiucheng.xu@amlogic.com 2022-11-21T02:15:58+00:00 2016e2113d35ba06866961a39e9a9c822f2ffabd Add support for Amlogic Meson G12 Series SOC - DDR bandwidth PMU driver framework and interfaces. The PMU can not only monitor the total DDR bandwidth, but also individual IP module bandwidth. Signed-off-by: Jiucheng Xu <jiucheng.xu@amlogic.com> Tested-by: Chris Healy <healych@amazon.com> Link: https://lore.kernel.org/r/20221121021602.3306998-1-jiucheng.xu@amlogic.com Signed-off-by: Will Deacon <will@kernel.org> 
Add support for Amlogic Meson G12 Series SOC - DDR bandwidth PMU driver
framework and interfaces. The PMU can not only monitor the total DDR
bandwidth, but also individual IP module bandwidth.

Signed-off-by: Jiucheng Xu <jiucheng.xu@amlogic.com>
Tested-by: Chris Healy <healych@amazon.com>
Link: https://lore.kernel.org/r/20221121021602.3306998-1-jiucheng.xu@amlogic.com
Signed-off-by: Will Deacon <will@kernel.org>