<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/include/linux/mmc, branch v3.1</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>mmc: remove unused "ddr" parameter in struct mmc_ios</title>
<updated>2011-08-13T18:50:32+00:00</updated>
<author>
<name>Jaehoon Chung</name>
<email>jh80.chung@samsung.com</email>
</author>
<published>2011-08-08T09:10:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7fd781e8f9b72544a1c7f04456eb33d5ffaed592'/>
<id>7fd781e8f9b72544a1c7f04456eb33d5ffaed592</id>
<content type='text'>
"mmc: dw_mmc: Fix DDR mode support" removed the last user.

Signed-off-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Signed-off-by: Kyungmin Park &lt;kyungmin.park@samsung.com&gt;
Signed-off-by: Chris Ball &lt;cjb@laptop.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
"mmc: dw_mmc: Fix DDR mode support" removed the last user.

Signed-off-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Signed-off-by: Kyungmin Park &lt;kyungmin.park@samsung.com&gt;
Signed-off-by: Chris Ball &lt;cjb@laptop.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mmc: core: Set non-default Drive Strength via platform hook</title>
<updated>2011-07-20T21:21:16+00:00</updated>
<author>
<name>Philip Rakity</name>
<email>prakity@marvell.com</email>
</author>
<published>2011-07-06T15:51:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=ca8e99b32e3863c98ac958617cc157a00bf445b8'/>
<id>ca8e99b32e3863c98ac958617cc157a00bf445b8</id>
<content type='text'>
Non default Drive Strength cannot be set automatically.  It is a function
of the board design and only if there is a specific platform handler can
it be set.  The platform handler needs to take into account the board
design.  Pass to the platform code the necessary information.

For example:  The card and host controller may indicate they support HIGH
and LOW drive strength.  There is no way to know what should be chosen
without specific board knowledge.  Setting HIGH may lead to reflections
and setting LOW may not suffice.  There is no mechanism (like ethernet
duplex or speed pulses) to determine what should be done automatically.

If no platform handler is defined -- use the default value.

Signed-off-by: Philip Rakity &lt;prakity@marvell.com&gt;
Reviewed-by: Arindam Nath &lt;arindam.nath@amd.com&gt;
Signed-off-by: Chris Ball &lt;cjb@laptop.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Non default Drive Strength cannot be set automatically.  It is a function
of the board design and only if there is a specific platform handler can
it be set.  The platform handler needs to take into account the board
design.  Pass to the platform code the necessary information.

For example:  The card and host controller may indicate they support HIGH
and LOW drive strength.  There is no way to know what should be chosen
without specific board knowledge.  Setting HIGH may lead to reflections
and setting LOW may not suffice.  There is no mechanism (like ethernet
duplex or speed pulses) to determine what should be done automatically.

If no platform handler is defined -- use the default value.

Signed-off-by: Philip Rakity &lt;prakity@marvell.com&gt;
Reviewed-by: Arindam Nath &lt;arindam.nath@amd.com&gt;
Signed-off-by: Chris Ball &lt;cjb@laptop.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mmc: core: add non-blocking mmc request function</title>
<updated>2011-07-20T21:21:10+00:00</updated>
<author>
<name>Per Forlin</name>
<email>per.forlin@linaro.org</email>
</author>
<published>2011-07-01T16:55:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=aa8b683a7d392271ed349c6ab9f36b8c313794b7'/>
<id>aa8b683a7d392271ed349c6ab9f36b8c313794b7</id>
<content type='text'>
Previously there has only been one function mmc_wait_for_req()
to start and wait for a request. This patch adds:

 * mmc_start_req() - starts a request wihtout waiting
   If there is on ongoing request wait for completion
   of that request and start the new one and return.
   Does not wait for the new command to complete.

This patch also adds new function members in struct mmc_host_ops
only called from core.c:

 * pre_req - asks the host driver to prepare for the next job
 * post_req - asks the host driver to clean up after a completed job

The intention is to use pre_req() and post_req() to do cache maintenance
while a request is active. pre_req() can be called while a request is
active to minimize latency to start next job. post_req() can be used after
the next job is started to clean up the request. This will minimize the
host driver request end latency. post_req() is typically used before
ending the block request and handing over the buffer to the block layer.

Add a host-private member in mmc_data to be used by pre_req to mark the
data. The host driver will then check this mark to see if the data is
prepared or not.

Signed-off-by: Per Forlin &lt;per.forlin@linaro.org&gt;
Acked-by: Kyungmin Park &lt;kyungmin.park@samsung.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Reviewed-by: Venkatraman S &lt;svenkatr@ti.com&gt;
Tested-by: Sourav Poddar &lt;sourav.poddar@ti.com&gt;
Tested-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Chris Ball &lt;cjb@laptop.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Previously there has only been one function mmc_wait_for_req()
to start and wait for a request. This patch adds:

 * mmc_start_req() - starts a request wihtout waiting
   If there is on ongoing request wait for completion
   of that request and start the new one and return.
   Does not wait for the new command to complete.

This patch also adds new function members in struct mmc_host_ops
only called from core.c:

 * pre_req - asks the host driver to prepare for the next job
 * post_req - asks the host driver to clean up after a completed job

The intention is to use pre_req() and post_req() to do cache maintenance
while a request is active. pre_req() can be called while a request is
active to minimize latency to start next job. post_req() can be used after
the next job is started to clean up the request. This will minimize the
host driver request end latency. post_req() is typically used before
ending the block request and handing over the buffer to the block layer.

Add a host-private member in mmc_data to be used by pre_req to mark the
data. The host driver will then check this mark to see if the data is
prepared or not.

Signed-off-by: Per Forlin &lt;per.forlin@linaro.org&gt;
Acked-by: Kyungmin Park &lt;kyungmin.park@samsung.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Reviewed-by: Venkatraman S &lt;svenkatr@ti.com&gt;
Tested-by: Sourav Poddar &lt;sourav.poddar@ti.com&gt;
Tested-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Chris Ball &lt;cjb@laptop.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mmc: dw_mmc: fix stop when fallen back to PIO</title>
<updated>2011-07-20T21:21:05+00:00</updated>
<author>
<name>James Hogan</name>
<email>james.hogan@imgtec.com</email>
</author>
<published>2011-06-29T08:28:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=03e8cb534e7cc3f71a07528a44da7ce68e5b5708'/>
<id>03e8cb534e7cc3f71a07528a44da7ce68e5b5708</id>
<content type='text'>
There are several situations when dw_mci_submit_data_dma() decides to
fall back to PIO mode instead of using DMA, due to a short (to avoid
overhead) or "complex" (e.g. with unaligned buffers) transaction, even
though host-&gt;use_dma is set. However dw_mci_stop_dma() decides whether
to stop DMA or set the EVENT_XFER_COMPLETE event based on host-&gt;use_dma.
When falling back to PIO mode this results in data timeout errors
getting missed and the driver locking up.

Therefore add host-&gt;using_dma to indicate whether the current
transaction is using dma or not, and adjust dw_mci_stop_dma() to use
that instead.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Acked-by: Will Newton &lt;will.newton@imgtec.com&gt;
Tested-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Signed-off-by: Chris Ball &lt;cjb@laptop.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There are several situations when dw_mci_submit_data_dma() decides to
fall back to PIO mode instead of using DMA, due to a short (to avoid
overhead) or "complex" (e.g. with unaligned buffers) transaction, even
though host-&gt;use_dma is set. However dw_mci_stop_dma() decides whether
to stop DMA or set the EVENT_XFER_COMPLETE event based on host-&gt;use_dma.
When falling back to PIO mode this results in data timeout errors
getting missed and the driver locking up.

Therefore add host-&gt;using_dma to indicate whether the current
transaction is using dma or not, and adjust dw_mci_stop_dma() to use
that instead.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Acked-by: Will Newton &lt;will.newton@imgtec.com&gt;
Tested-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Signed-off-by: Chris Ball &lt;cjb@laptop.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mmc: queue: let host controllers specify maximum discard timeout</title>
<updated>2011-07-20T21:21:03+00:00</updated>
<author>
<name>Adrian Hunter</name>
<email>adrian.hunter@intel.com</email>
</author>
<published>2011-06-28T14:16:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e056a1b5b67b4e4bfad00bf143ab14f634777705'/>
<id>e056a1b5b67b4e4bfad00bf143ab14f634777705</id>
<content type='text'>
Some host controllers will not operate without a hardware
timeout that is limited in value.  However large discards
require large timeouts, so there needs to be a way to
specify the maximum discard size.

A host controller driver may now specify the maximum discard
timeout possible so that max_discard_sectors can be calculated.

However, for eMMC when the High Capacity Erase Group Size
is not in use, the timeout calculation depends on clock
rate which may change.  For that case Preferred Erase Size
is used instead.

Signed-off-by: Adrian Hunter &lt;adrian.hunter@intel.com&gt;
Signed-off-by: Chris Ball &lt;cjb@laptop.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some host controllers will not operate without a hardware
timeout that is limited in value.  However large discards
require large timeouts, so there needs to be a way to
specify the maximum discard size.

A host controller driver may now specify the maximum discard
timeout possible so that max_discard_sectors can be calculated.

However, for eMMC when the High Capacity Erase Group Size
is not in use, the timeout calculation depends on clock
rate which may change.  For that case Preferred Erase Size
is used instead.

Signed-off-by: Adrian Hunter &lt;adrian.hunter@intel.com&gt;
Signed-off-by: Chris Ball &lt;cjb@laptop.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mmc: dw_mmc: handle unaligned buffers and sizes</title>
<updated>2011-07-20T21:21:00+00:00</updated>
<author>
<name>James Hogan</name>
<email>james.hogan@imgtec.com</email>
</author>
<published>2011-06-24T12:57:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=34b664a20e2664de0d0d7990ca60276b96c08c75'/>
<id>34b664a20e2664de0d0d7990ca60276b96c08c75</id>
<content type='text'>
Update functions for PIO pushing and pulling data to and from the FIFO
so that they can handle unaligned output buffers and unaligned buffer
lengths. This makes more of the tests in mmc_test pass.

Unaligned lengths in pulls are handled by reading the full FIFO item,
and storing the remaining bytes in a small internal buffer (part_buf).
The next data pull will copy data out of this buffer first before
accessing the FIFO again. Similarly, for pushes the final bytes that
don't fill a FIFO item are stored in the part_buf (or sent anyway if
it's the last transfer), and then the part_buf is included at the
beginning of the next buffer pushed.

Unaligned buffers in pulls are handled specially if the architecture
cannot do efficient unaligned accesses, by reading FIFO items into a
aligned local buffer, and memcpy'ing them into the output buffer, again
storing any remaining bytes in the internal buffer. Similarly for pushes
the buffer is memcpy'd into an aligned local buffer then written to the
FIFO.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Acked-by: Will Newton &lt;will.newton@imgtec.com&gt;
Signed-off-by: Chris Ball &lt;cjb@laptop.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Update functions for PIO pushing and pulling data to and from the FIFO
so that they can handle unaligned output buffers and unaligned buffer
lengths. This makes more of the tests in mmc_test pass.

Unaligned lengths in pulls are handled by reading the full FIFO item,
and storing the remaining bytes in a small internal buffer (part_buf).
The next data pull will copy data out of this buffer first before
accessing the FIFO again. Similarly, for pushes the final bytes that
don't fill a FIFO item are stored in the part_buf (or sent anyway if
it's the last transfer), and then the part_buf is included at the
beginning of the next buffer pushed.

Unaligned buffers in pulls are handled specially if the architecture
cannot do efficient unaligned accesses, by reading FIFO items into a
aligned local buffer, and memcpy'ing them into the output buffer, again
storing any remaining bytes in the internal buffer. Similarly for pushes
the buffer is memcpy'd into an aligned local buffer then written to the
FIFO.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Acked-by: Will Newton &lt;will.newton@imgtec.com&gt;
Signed-off-by: Chris Ball &lt;cjb@laptop.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mmc: dw_mmc: don't hard code fifo depth, fix usage</title>
<updated>2011-07-20T21:20:59+00:00</updated>
<author>
<name>James Hogan</name>
<email>james.hogan@imgtec.com</email>
</author>
<published>2011-06-24T12:57:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b86d825323b4c5d0c406e5b1a85af614acf0cf5a'/>
<id>b86d825323b4c5d0c406e5b1a85af614acf0cf5a</id>
<content type='text'>
The FIFO_DEPTH hardware configuration parameter can be found from the
power-on value of RX_WMark in the FIFOTH register. This is used to
initialise the watermarks, but when calculating the number of free fifo
spaces a preprocessor definition is used which is hard coded to 32.

Fix reading the value out of FIFOTH (the default value in the RX_WMark
field is FIFO_DEPTH-1 not FIFO_DEPTH). Allow the fifo depth to be
overriden by platform data (since a bootloader may have changed FIFOTH
making auto-detection unreliable). Store the fifo_depth for later use.
Also fix the calculation to find the number of free bytes in the fifo to
include the fifo depth in the left shift by the data shift, since the
fifo depth is measured in fifo items not bytes.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Acked-by: Will Newton &lt;will.newton@imgtec.com&gt;
Signed-off-by: Chris Ball &lt;cjb@laptop.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The FIFO_DEPTH hardware configuration parameter can be found from the
power-on value of RX_WMark in the FIFOTH register. This is used to
initialise the watermarks, but when calculating the number of free fifo
spaces a preprocessor definition is used which is hard coded to 32.

Fix reading the value out of FIFOTH (the default value in the RX_WMark
field is FIFO_DEPTH-1 not FIFO_DEPTH). Allow the fifo depth to be
overriden by platform data (since a bootloader may have changed FIFOTH
making auto-detection unreliable). Store the fifo_depth for later use.
Also fix the calculation to find the number of free bytes in the fifo to
include the fifo depth in the left shift by the data shift, since the
fifo depth is measured in fifo items not bytes.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Acked-by: Will Newton &lt;will.newton@imgtec.com&gt;
Signed-off-by: Chris Ball &lt;cjb@laptop.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mmc: dw_mmc: convert card tasklet to workqueue</title>
<updated>2011-07-20T21:20:58+00:00</updated>
<author>
<name>James Hogan</name>
<email>james.hogan@imgtec.com</email>
</author>
<published>2011-06-24T12:55:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=1791b13ea4d97a6a7c162edd54485e932ad92f1b'/>
<id>1791b13ea4d97a6a7c162edd54485e932ad92f1b</id>
<content type='text'>
Convert the card insert/remove tasklet to a workqueue, and call the
setpower platform specific callback without the spinlock held. This
means neither of the setpower or get_cd callbacks are called from atomic
context which allows them to sleep.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Acked-by: Will Newton &lt;will.newton@imgtec.com&gt;
Signed-off-by: Chris Ball &lt;cjb@laptop.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Convert the card insert/remove tasklet to a workqueue, and call the
setpower platform specific callback without the spinlock held. This
means neither of the setpower or get_cd callbacks are called from atomic
context which allows them to sleep.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Acked-by: Will Newton &lt;will.newton@imgtec.com&gt;
Signed-off-by: Chris Ball &lt;cjb@laptop.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mmc: sdhi: Add write16_hook</title>
<updated>2011-07-20T21:20:57+00:00</updated>
<author>
<name>Simon Horman</name>
<email>horms@verge.net.au</email>
</author>
<published>2011-06-20T23:00:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=973ed3af1a570612771ed10dec6506c757767668'/>
<id>973ed3af1a570612771ed10dec6506c757767668</id>
<content type='text'>
Some controllers require waiting for the bus to become idle
before writing to some registers. I have implemented this
by adding a hook to sd_ctrl_write16() and implementing
a hook for SDHI which waits for the bus to become idle.

Cc: Guennadi Liakhovetski &lt;g.liakhovetski@gmx.de&gt;
Cc: Magnus Damm &lt;magnus.damm@gmail.com&gt;
Signed-off-by: Simon Horman &lt;horms@verge.net.au&gt;
Signed-off-by: Chris Ball &lt;cjb@laptop.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some controllers require waiting for the bus to become idle
before writing to some registers. I have implemented this
by adding a hook to sd_ctrl_write16() and implementing
a hook for SDHI which waits for the bus to become idle.

Cc: Guennadi Liakhovetski &lt;g.liakhovetski@gmx.de&gt;
Cc: Magnus Damm &lt;magnus.damm@gmail.com&gt;
Signed-off-by: Simon Horman &lt;horms@verge.net.au&gt;
Signed-off-by: Chris Ball &lt;cjb@laptop.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mmc: tmio: name 0xd8 as CTL_DMA_ENABLE</title>
<updated>2011-07-20T21:20:55+00:00</updated>
<author>
<name>Simon Horman</name>
<email>horms@verge.net.au</email>
</author>
<published>2011-06-20T23:00:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=95c7348d948dc4832434ddfaeba804ac14732f02'/>
<id>95c7348d948dc4832434ddfaeba804ac14732f02</id>
<content type='text'>
This reflects at least the current usage of this register
and I think it improves the readability of the code ever so slightly.

Cc: Guennadi Liakhovetski &lt;g.liakhovetski@gmx.de&gt;
Cc: Magnus Damm &lt;magnus.damm@gmail.com&gt;
Signed-off-by: Simon Horman &lt;horms@verge.net.au&gt;
Signed-off-by: Chris Ball &lt;cjb@laptop.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This reflects at least the current usage of this register
and I think it improves the readability of the code ever so slightly.

Cc: Guennadi Liakhovetski &lt;g.liakhovetski@gmx.de&gt;
Cc: Magnus Damm &lt;magnus.damm@gmail.com&gt;
Signed-off-by: Simon Horman &lt;horms@verge.net.au&gt;
Signed-off-by: Chris Ball &lt;cjb@laptop.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
