linux.git/include/linux/clk/sunxi.h, branch master Linux kernel source tree clk: sunxi: Remove custom phase function 2015-01-14T09:45:27+00:00 Maxime Ripard maxime.ripard@free-electrons.com 2014-07-12T10:10:04+00:00 a7d19057e7160a566bad9b2ba070a391fb78df96 Now that we don't have any user left for our custom phase function, we can safely remove this hack from the code. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Chen-Yu Tsai <wens@csie.org> 
Now that we don't have any user left for our custom phase function, we can
safely remove this hack from the code.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Chen-Yu Tsai <wens@csie.org>
clk: sunxi: Fixup clk_sunxi_mmc_phase_control to take a clk rather then a hw_clk 2014-05-14T23:58:21+00:00 Hans de Goede hdegoede@redhat.com 2014-05-12T12:04:47+00:00 a97181adf1502128e2945b4fef2591249c565467 __clk_get_hw is supposed to be used by clk providers, not clk consumers. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org> 
__clk_get_hw is supposed to be used by clk providers, not clk consumers.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
clk: sunxi: Implement MMC phase control 2014-05-05T22:55:57+00:00 Emilio López emilio@elopez.com.ar 2014-05-02T15:57:16+00:00 95713978b0a2929b72933235bb07c0a793e71afa HdG: add header exporting clk_sunxi_mmc_phase_control Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> 
HdG: add header exporting clk_sunxi_mmc_phase_control

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
clk: sunxi: declare OF clock provider 2013-09-29T19:07:16+00:00 Sebastian Hesselbarth sebastian.hesselbarth@gmail.com 2013-09-06T12:59:57+00:00 be0804513a506de96925f9ed1aa8dc1facd4c180 Common clock framework allows to register clock providers to get called on of_clk_init() by using CLK_OF_DECLARE. This converts sunxi clock providers to make use of it and get rid of the mach specific clk init call. As sunxi has a bunch of independent clk provider nodes, we hook current clock init to board compatible to make it called once. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org> 
Common clock framework allows to register clock providers to get called
on of_clk_init() by using CLK_OF_DECLARE. This converts sunxi clock
providers to make use of it and get rid of the mach specific clk init
call. As sunxi has a bunch of independent clk provider nodes, we hook
current clock init to board compatible to make it called once.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
clk: arm: sunxi: Add a new clock driver for sunxi SOCs 2013-03-27T15:35:34+00:00 Emilio López emilio@elopez.com.ar 2013-02-25T14:44:26+00:00 e874a6697710f52fa8ab29487a99034d5d96fdcc This commit implements the base CPU clocks for sunxi devices. It has been tested using a slightly modified cpufreq driver from the linux-sunxi 3.0 tree. Additionally, document the new bindings introduced by this patch. Idling: / # cat /sys/kernel/debug/clk/clk_summary clock enable_cnt prepare_cnt rate --------------------------------------------------------------------- osc32k 0 0 32768 osc24M_fixed 0 0 24000000 osc24M 0 0 24000000 apb1_mux 0 0 24000000 apb1 0 0 24000000 pll1 0 0 60000000 cpu 0 0 60000000 axi 0 0 60000000 ahb 0 0 60000000 apb0 0 0 30000000 dummy 0 0 0 After "yes >/dev/null &": / # cat /sys/kernel/debug/clk/clk_summary clock enable_cnt prepare_cnt rate --------------------------------------------------------------------- osc32k 0 0 32768 osc24M_fixed 0 0 24000000 osc24M 0 0 24000000 apb1_mux 0 0 24000000 apb1 0 0 24000000 pll1 0 0 1008000000 cpu 0 0 1008000000 axi 0 0 336000000 ahb 0 0 168000000 apb0 0 0 84000000 dummy 0 0 0 Signed-off-by: Emilio López <emilio@elopez.com.ar> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> 
This commit implements the base CPU clocks for sunxi devices. It has
been tested using a slightly modified cpufreq driver from the
linux-sunxi 3.0 tree.

Additionally, document the new bindings introduced by this patch.

Idling:
    / # cat /sys/kernel/debug/clk/clk_summary
       clock                        enable_cnt  prepare_cnt  rate
    ---------------------------------------------------------------------
     osc32k                         0           0            32768
     osc24M_fixed                   0           0            24000000
        osc24M                      0           0            24000000
           apb1_mux                 0           0            24000000
              apb1                  0           0            24000000
           pll1                     0           0            60000000
              cpu                   0           0            60000000
                 axi                0           0            60000000
                    ahb             0           0            60000000
                       apb0         0           0            30000000
     dummy                          0           0            0

After "yes >/dev/null &":
    / # cat /sys/kernel/debug/clk/clk_summary
       clock                        enable_cnt  prepare_cnt  rate
    ---------------------------------------------------------------------
     osc32k                         0           0            32768
     osc24M_fixed                   0           0            24000000
        osc24M                      0           0            24000000
           apb1_mux                 0           0            24000000
              apb1                  0           0            24000000
           pll1                     0           0            1008000000
              cpu                   0           0            1008000000
                 axi                0           0            336000000
                    ahb             0           0            168000000
                       apb0         0           0            84000000
     dummy                          0           0            0

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
clk: sunxi: Use common of_clk_init() function 2013-01-24T19:12:23+00:00 Prashant Gaikwad pgaikwad@nvidia.com 2013-01-04T07:00:54+00:00 85a181986c9cf8bbd2c4f2fb6f2add7ac5db1f76 Use common of_clk_init() function to initialize clocks. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Acked-by: Maxime Ripard <maxime.ripard@anandra.org> Signed-off-by: Mike Turquette <mturquette@linaro.org> 
Use common of_clk_init() function to initialize clocks.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Acked-by: Maxime Ripard <maxime.ripard@anandra.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
clk: sunxi: Add dummy fixed rate clock for Allwinner A1X SoCs 2012-11-16T20:46:39+00:00 Maxime Ripard maxime.ripard@free-electrons.com 2012-11-16T20:21:43+00:00 404525d5a7ecc847b5ac178dad96402f1e102ccc Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Mike Turquette <mturquette@ti.com> 
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Mike Turquette <mturquette@ti.com>