linux.git/include/linux/bcma, branch v3.12-rc2

bcma: add bcma_core_pci_power_save()

2013-08-26T18:09:03+00:00

This enables or disables power saving on the PCIe bus when the wifi is
in operation or not.

Signed-off-by: Hauke Mehrtens 
Signed-off-by: John W. Linville

bcma: do not export bcma_core_pci_extend_L1timer()

2013-08-26T18:09:03+00:00

This is not called any more, do not export it.

Signed-off-by: Hauke Mehrtens 
Signed-off-by: John W. Linville

bcma: add method to power up and down the PCIe core by wifi driver

2013-08-26T18:09:02+00:00

The wifi driver should tell the PCIe core that it is now in operation
so that some workarounds can be applied and the power state is changed.
This should replace the call to bcma_core_pci_extend_L1timer by the
brcmsmac driver.

Signed-off-by: Hauke Mehrtens 
Signed-off-by: John W. Linville

bcma: add constants for new ARM based SoCs

2013-07-22T20:54:40+00:00

These are the chipIDs of some ARM based SoCs from the BCM47xx line.

Signed-off-by: Hauke Mehrtens 
Signed-off-by: John W. Linville

bcma: add some more core names

2013-07-22T20:54:39+00:00

These cores were found on a BCM4708 (chipid 53010), this is a ARM SoC
with two Cortex A9 cores.

bcma: bus0: Found chip with id 0xCF12, rev 0x00 and package 0x02
bcma: bus0: Core 0 found: ChipCommon (manuf 0x4BF, id 0x800, rev 0x2A, class 0x0)
bcma: bus0: Core 1 found: DMA (manuf 0x4BF, id 0x502, rev 0x01, class 0x0)
bcma: bus0: Core 2 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x04, class 0x0)
bcma: bus0: Core 3 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x04, class 0x0)
bcma: bus0: Core 4 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x04, class 0x0)
bcma: bus0: Core 5 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x04, class 0x0)
bcma: bus0: Core 6 found: PCIe Gen 2 (manuf 0x4BF, id 0x501, rev 0x01, class 0x0)
bcma: bus0: Core 7 found: PCIe Gen 2 (manuf 0x4BF, id 0x501, rev 0x01, class 0x0)
bcma: bus0: Core 8 found: ARM Cortex A9 core (ihost) (manuf 0x4BF, id 0x510, rev 0x01, class 0x0)
bcma: bus0: Core 9 found: USB 2.0 (manuf 0x4BF, id 0x504, rev 0x01, class 0x0)
bcma: bus0: Core 10 found: USB 3.0 (manuf 0x4BF, id 0x505, rev 0x01, class 0x0)
bcma: bus0: Core 11 found: SDIO3 (manuf 0x4BF, id 0x503, rev 0x01, class 0x0)
bcma: bus0: Core 12 found: ARM Cortex A9 JTAG (manuf 0x4BF, id 0x506, rev 0x01, class 0x0)
bcma: bus0: Core 13 found: Denali DDR2/DDR3 memory controller (manuf 0x4BF, id 0x507, rev 0x01, class 0x0)
bcma: bus0: Core 14 found: ROM (manuf 0x4BF, id 0x508, rev 0x01, class 0x0)
bcma: bus0: Core 15 found: NAND flash controller (manuf 0x4BF, id 0x509, rev 0x01, class 0x0)
bcma: bus0: Core 16 found: SPI flash controller (manuf 0x4BF, id 0x50A, rev 0x01, class 0x0)

Signed-off-by: Hauke Mehrtens 
Signed-off-by: John W. Linville

bcma: add support for BCM43142

2013-06-27T17:42:16+00:00

Signed-off-by: Rafał Miłecki 
Signed-off-by: John W. Linville

bcma: add more core IDs

2013-05-17T18:31:05+00:00

PCIe and ARM CR4 cores were found on 14e4:43b1 AKA BCM4352.

Reported-by: Gabriel Thörnblad 
Signed-off-by: Rafał Miłecki 
Signed-off-by: John W. Linville

brcmfmac: setup SDIO reset behavior

2013-04-12T18:27:55+00:00

Set device in a manner that SDIO I/O card reset
will lead to WLAN backplane and PMU state reset.

Reviewed-by: Hante Meuleman 
Reviewed-by: Arend van Spriel 
Reviewed-by: Pieter-Paul Giesberts 
Reviewed-by: Franky (Zhenhui) Lin 
Signed-off-by: Piotr Haber 
Signed-off-by: Arend van Spriel 
Signed-off-by: John W. Linville

brcmfmac: add support for dongle ARM CR4 core

2013-04-12T18:27:54+00:00

Newer WiFi chip use ARM CR4 core to achieve higher performance. Add necessary
code for host driver in order to support CR4 core.

Reviewed-by: Arend van Spriel 
Reviewed-by: Pieter-Paul Giesberts 
Signed-off-by: Franky Lin 
Signed-off-by: Arend van Spriel 
Signed-off-by: John W. Linville

bcma: export bcma_chipco_get_alp_clock()

2013-03-27T17:39:09+00:00

This function will be used by brcmsmac.

Signed-off-by: Hauke Mehrtens 
Signed-off-by: John W. Linville