<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/include/dt-bindings/soc, branch v5.17</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>dt-bindings: soc: samsung: Add Exynos USI bindings</title>
<updated>2021-12-13T11:03:22+00:00</updated>
<author>
<name>Sam Protsenko</name>
<email>semen.protsenko@linaro.org</email>
</author>
<published>2021-12-04T19:57:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e522ae91b8ff7bf89d22d9322308aba1a6326996'/>
<id>e522ae91b8ff7bf89d22d9322308aba1a6326996</id>
<content type='text'>
Add constants for choosing USIv2 configuration mode in device tree.
Those are further used in USI driver to figure out which value to write
into SW_CONF register. Also document USIv2 IP-core bindings.

Signed-off-by: Sam Protsenko &lt;semen.protsenko@linaro.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20211204195757.8600-2-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add constants for choosing USIv2 configuration mode in device tree.
Those are further used in USI driver to figure out which value to write
into SW_CONF register. Also document USIv2 IP-core bindings.

Signed-off-by: Sam Protsenko &lt;semen.protsenko@linaro.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20211204195757.8600-2-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: dt-bindings: qcom: add gpr bindings</title>
<updated>2021-09-28T03:10:07+00:00</updated>
<author>
<name>Srinivas Kandagatla</name>
<email>srinivas.kandagatla@linaro.org</email>
</author>
<published>2021-09-27T13:55:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=974c6faf7667e551d202712470ca210c14ca249d'/>
<id>974c6faf7667e551d202712470ca210c14ca249d</id>
<content type='text'>
Qualcomm Generic Packet router aka GPR is the IPC mechanism found
in AudioReach next generation signal processing framework to perform
command and response messages between various processors.

GPR has concepts of static and dynamic port, all static services like
APM (Audio Processing Manager), PRM (Proxy resource manager) have
fixed port numbers where as dynamic services like graphs have dynamic
port numbers which are allocated at runtime. All GPR packet messages
will have source and destination domain and port along with opcode
and payload.

This support is added using existing APR driver to reuse most of
the code.

Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20210927135559.738-5-srinivas.kandagatla@linaro.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Qualcomm Generic Packet router aka GPR is the IPC mechanism found
in AudioReach next generation signal processing framework to perform
command and response messages between various processors.

GPR has concepts of static and dynamic port, all static services like
APM (Audio Processing Manager), PRM (Proxy resource manager) have
fixed port numbers where as dynamic services like graphs have dynamic
port numbers which are allocated at runtime. All GPR packet messages
will have source and destination domain and port along with opcode
and payload.

This support is added using existing APR driver to reuse most of
the code.

Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20210927135559.738-5-srinivas.kandagatla@linaro.org
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: soc: remove obsolete zte zx header</title>
<updated>2021-08-23T18:52:10+00:00</updated>
<author>
<name>Zenghui Yu</name>
<email>yuzenghui@huawei.com</email>
</author>
<published>2021-08-21T03:09:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=cc8c99613290126663f7f968f07d2535a6cc235a'/>
<id>cc8c99613290126663f7f968f07d2535a6cc235a</id>
<content type='text'>
The zte zx platform had been removed in commit 89d4f98ae90d ("ARM: remove
zte zx platform"), so this header is no longer needed.

Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Jun Nie &lt;jun.nie@linaro.org&gt;
Cc: Shawn Guo &lt;shawnguo@kernel.org&gt;
Signed-off-by: Zenghui Yu &lt;yuzenghui@huawei.com&gt;
Link: https://lore.kernel.org/r/20210821030924.192-2-yuzenghui@huawei.com
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The zte zx platform had been removed in commit 89d4f98ae90d ("ARM: remove
zte zx platform"), so this header is no longer needed.

Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Jun Nie &lt;jun.nie@linaro.org&gt;
Cc: Shawn Guo &lt;shawnguo@kernel.org&gt;
Signed-off-by: Zenghui Yu &lt;yuzenghui@huawei.com&gt;
Link: https://lore.kernel.org/r/20210821030924.192-2-yuzenghui@huawei.com
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: bcm: bcm-pmb: add BCM63138 SATA support</title>
<updated>2021-03-25T21:24:43+00:00</updated>
<author>
<name>Rafał Miłecki</name>
<email>rafal@milecki.pl</email>
</author>
<published>2021-01-14T17:53:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=be6d99420306bb6b0abfff7a814564a614690db6'/>
<id>be6d99420306bb6b0abfff7a814564a614690db6</id>
<content type='text'>
BCM63138 has SATA controller that needs to be powered up using PMB.

Signed-off-by: Rafał Miłecki &lt;rafal@milecki.pl&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
BCM63138 has SATA controller that needs to be powered up using PMB.

Signed-off-by: Rafał Miłecki &lt;rafal@milecki.pl&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: power: document Broadcom's PMB binding</title>
<updated>2021-01-13T04:45:57+00:00</updated>
<author>
<name>Rafał Miłecki</name>
<email>rafal@milecki.pl</email>
</author>
<published>2020-12-14T18:07:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=82853543057f78d8a331272b70bc3f1e8cb0cbf4'/>
<id>82853543057f78d8a331272b70bc3f1e8cb0cbf4</id>
<content type='text'>
Broadcom's PMB is power controller used for disabling and enabling SoC
devices.

Signed-off-by: Rafał Miłecki &lt;rafal@milecki.pl&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Acked-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Acked-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Broadcom's PMB is power controller used for disabling and enabling SoC
devices.

Signed-off-by: Rafał Miłecki &lt;rafal@milecki.pl&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Acked-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Acked-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: BMIPS: add BCM6318 power domain definitions</title>
<updated>2020-08-17T16:14:04+00:00</updated>
<author>
<name>Álvaro Fernández Rojas</name>
<email>noltari@gmail.com</email>
</author>
<published>2020-06-13T08:21:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8bf86a155688f3acbc5919cdf58c59378d62a663'/>
<id>8bf86a155688f3acbc5919cdf58c59378d62a663</id>
<content type='text'>
BCM6318 SoCs have a power domain controller to enable/disable certain
components in order to save power.

Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;F.fainelli@gmail.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
BCM6318 SoCs have a power domain controller to enable/disable certain
components in order to save power.

Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;F.fainelli@gmail.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: BMIPS: add BCM63268 power domain definitions</title>
<updated>2020-08-17T16:14:04+00:00</updated>
<author>
<name>Álvaro Fernández Rojas</name>
<email>noltari@gmail.com</email>
</author>
<published>2020-06-13T08:21:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=5a3be0d0ccfb21d1223f77746d260450d94df9e4'/>
<id>5a3be0d0ccfb21d1223f77746d260450d94df9e4</id>
<content type='text'>
BCM63268 SoCs have a power domain controller to enable/disable certain
components in order to save power.

Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;F.fainelli@gmail.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
BCM63268 SoCs have a power domain controller to enable/disable certain
components in order to save power.

Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;F.fainelli@gmail.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: BMIPS: add BCM6362 power domain definitions</title>
<updated>2020-08-17T16:14:04+00:00</updated>
<author>
<name>Álvaro Fernández Rojas</name>
<email>noltari@gmail.com</email>
</author>
<published>2020-06-13T08:21:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9f9fd9766a288e259ad7cefbf3e45e1ec117b50b'/>
<id>9f9fd9766a288e259ad7cefbf3e45e1ec117b50b</id>
<content type='text'>
BCM6362 SoCs have a power domain controller to enable/disable certain
components in order to save power.

Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;F.fainelli@gmail.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
BCM6362 SoCs have a power domain controller to enable/disable certain
components in order to save power.

Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;F.fainelli@gmail.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: BMIPS: add BCM6328 power domain definitions</title>
<updated>2020-08-17T16:14:04+00:00</updated>
<author>
<name>Álvaro Fernández Rojas</name>
<email>noltari@gmail.com</email>
</author>
<published>2020-06-13T08:21:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=5292481134b2c4d64e1279158917dc9b53713721'/>
<id>5292481134b2c4d64e1279158917dc9b53713721</id>
<content type='text'>
BCM6328 SoCs have a power domain controller to enable/disable certain
components in order to save power.

Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;F.fainelli@gmail.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
BCM6328 SoCs have a power domain controller to enable/disable certain
components in order to save power.

Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;F.fainelli@gmail.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: soc: tegra-pmc: Add ID for Tegra PMC 32 kHz blink clock</title>
<updated>2020-02-17T09:09:19+00:00</updated>
<author>
<name>Sowjanya Komatineni</name>
<email>skomatineni@nvidia.com</email>
</author>
<published>2020-01-14T07:24:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=cd88f16792011a90aa9cda12233f136a528acab3'/>
<id>cd88f16792011a90aa9cda12233f136a528acab3</id>
<content type='text'>
Tegra PMC has blink functionality that allows 32 kHz clock out to
blink pin of the Tegra.

This patch adds id for this blink clock to use for enabling or
disabling blink output through device tree.

Tested-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Sowjanya Komatineni &lt;skomatineni@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Tegra PMC has blink functionality that allows 32 kHz clock out to
blink pin of the Tegra.

This patch adds id for this blink clock to use for enabling or
disabling blink output through device tree.

Tested-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Sowjanya Komatineni &lt;skomatineni@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
