linux.git/include/dt-bindings/reset, branch v5.4-rc2 Linux kernel source tree Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux 2019-09-20T22:45:07+00:00 Linus Torvalds torvalds@linux-foundation.org 2019-09-20T22:45:07+00:00 a703d279c57e1bfe2b6536c3a17c1c498b416d24 Pull clk updates from Stephen Boyd: "We have a small collection of core framework updates this time, mostly around clk registration by clk providers and debugfs "nice to haves" for rate constraints. I'll highlight that we're now setting the clk_init_data pointer inside struct clk_hw to NULL during clk_register(), which may break some drivers that thought they could use that pointer during normal operations. That change has been sitting in next for a while now but maybe something is still broken. We'l see. Other than that the core framework changes aren't invasive and they're fixing bugs, simplifying, and making things better. On the clk driver side we got the usual addition of new SoC support, new features for existing drivers, and bug fixes scattered throughout. The biggest diffstat is the Amlogic driver that gained CPU clk support in addition to migrating to the new way of specifying clk parents. After that the Qualcomm, i.MX, Mediatek, and Rockchip clk drivers got support for various new SoCs and clock controllers from those vendors. Core: - Drop NULL checks in clk debugfs - Add min/max rates to clk debugfs - Set clk_init_data pointer inside clk_hw to NULL after registration - Make clk_bulk_get_all() return an 'id' corresponding to clock-names - Evict parents from parent cache when they're unregistered New Drivers: - Add clock driver for i.MX8MN SoCs - Support aspeed AST2600 SoCs - Support for Mediatek MT6779 SoCs - Support qcom SM8150 GCC and RPMh clks - Support qcom QCS404 WCSS clks - Add CPU clock support for Armada 7K/8K (specifically AP806 and AP807) - Addition of clock driver for Rockchip rk3308 SoCs Updates: - Add regulator support to the cdce925 clk driver - Add support for Raspberry Pi 4 bcm2711 SoCs - Add SDIO gate support to aspeed driver - Add missing of_node_put() calls in various clk drivers - Migrate Amlogic driver to new clock parent description method - Add DVFS support to Amlogic Meson g12 - Add Amlogic Meson g12a reset support to the axg audio clock controller - Add sm1 support to the Amlogic Meson g12a clock controller - Switch i.MX8MM clock driver to platform driver - Add Hifi4 DSP related clocks for i.MX8QXP SoC - Fix Audio PLL setting and parent clock for USB - Misc i.MX8 clock driver improvements and corrections - Set floor ops for Qualcomm SD clks so that rounding works - Fix "always-on" Clock Domains on Renesas R-Car M1A, RZ/A1, RZ/A2, and RZ/N1 - Enable the Allwinner V3 SoC and fix the i2s clock for H6" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (137 commits) clk: Drop !clk checks in debugfs dumping clk: imx: imx8mn: fix pll mux bit clk: imx: imx8mm: fix pll mux bit clk: imx: clk-pll14xx: unbypass PLL by default clk: imx: pll14xx: avoid glitch when set rate clk: mvebu: ap80x: add AP807 clock support clk: mvebu: ap806: Prepare the introduction of AP807 clock support clk: mvebu: ap806: add AP-DCLK (hclk) to system controller driver clk: mvebu: ap806: be more explicit on what SaR is clk: mvebu: ap80x-cpu: add AP807 CPU clock support clk: mvebu: ap806-cpu: prepare mapping of AP807 CPU clock dt-bindings: ap806: Document AP807 clock compatible dt-bindings: ap80x: Document AP807 CPU clock compatible clk: sprd: add missing kfree clk: at91: allow 24 Mhz clock as input for PLL clk: Make clk_bulk_get_all() return a valid "id" clk: actions: Fix factor clk struct member access clk: qcom: rcg: Return failure for RCG update clk: remove extra ---help--- tags in Kconfig clk: add include guard to clk-conf.h ... 
Pull clk updates from Stephen Boyd:
 "We have a small collection of core framework updates this time, mostly
  around clk registration by clk providers and debugfs "nice to haves"
  for rate constraints. I'll highlight that we're now setting the
  clk_init_data pointer inside struct clk_hw to NULL during
  clk_register(), which may break some drivers that thought they could
  use that pointer during normal operations. That change has been
  sitting in next for a while now but maybe something is still broken.
  We'l see. Other than that the core framework changes aren't invasive
  and they're fixing bugs, simplifying, and making things better.

  On the clk driver side we got the usual addition of new SoC support,
  new features for existing drivers, and bug fixes scattered throughout.
  The biggest diffstat is the Amlogic driver that gained CPU clk support
  in addition to migrating to the new way of specifying clk parents.
  After that the Qualcomm, i.MX, Mediatek, and Rockchip clk drivers got
  support for various new SoCs and clock controllers from those vendors.

  Core:
   - Drop NULL checks in clk debugfs
   - Add min/max rates to clk debugfs
   - Set clk_init_data pointer inside clk_hw to NULL after registration
   - Make clk_bulk_get_all() return an 'id' corresponding to clock-names
   - Evict parents from parent cache when they're unregistered

  New Drivers:
   - Add clock driver for i.MX8MN SoCs
   - Support aspeed AST2600 SoCs
   - Support for Mediatek MT6779 SoCs
   - Support qcom SM8150 GCC and RPMh clks
   - Support qcom QCS404 WCSS clks
   - Add CPU clock support for Armada 7K/8K (specifically AP806 and AP807)
   - Addition of clock driver for Rockchip rk3308 SoCs

  Updates:
   - Add regulator support to the cdce925 clk driver
   - Add support for Raspberry Pi 4 bcm2711 SoCs
   - Add SDIO gate support to aspeed driver
   - Add missing of_node_put() calls in various clk drivers
   - Migrate Amlogic driver to new clock parent description method
   - Add DVFS support to Amlogic Meson g12
   - Add Amlogic Meson g12a reset support to the axg audio clock controller
   - Add sm1 support to the Amlogic Meson g12a clock controller
   - Switch i.MX8MM clock driver to platform driver
   - Add Hifi4 DSP related clocks for i.MX8QXP SoC
   - Fix Audio PLL setting and parent clock for USB
   - Misc i.MX8 clock driver improvements and corrections
   - Set floor ops for Qualcomm SD clks so that rounding works
   - Fix "always-on" Clock Domains on Renesas R-Car M1A, RZ/A1, RZ/A2, and RZ/N1
   - Enable the Allwinner V3 SoC and fix the i2s clock for H6"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (137 commits)
  clk: Drop !clk checks in debugfs dumping
  clk: imx: imx8mn: fix pll mux bit
  clk: imx: imx8mm: fix pll mux bit
  clk: imx: clk-pll14xx: unbypass PLL by default
  clk: imx: pll14xx: avoid glitch when set rate
  clk: mvebu: ap80x: add AP807 clock support
  clk: mvebu: ap806: Prepare the introduction of AP807 clock support
  clk: mvebu: ap806: add AP-DCLK (hclk) to system controller driver
  clk: mvebu: ap806: be more explicit on what SaR is
  clk: mvebu: ap80x-cpu: add AP807 CPU clock support
  clk: mvebu: ap806-cpu: prepare mapping of AP807 CPU clock
  dt-bindings: ap806: Document AP807 clock compatible
  dt-bindings: ap80x: Document AP807 CPU clock compatible
  clk: sprd: add missing kfree
  clk: at91: allow 24 Mhz clock as input for PLL
  clk: Make clk_bulk_get_all() return a valid "id"
  clk: actions: Fix factor clk struct member access
  clk: qcom: rcg: Return failure for RCG update
  clk: remove extra ---help--- tags in Kconfig
  clk: add include guard to clk-conf.h
  ...
Merge branches 'clk-init-destroy', 'clk-doc', 'clk-imx' and 'clk-allwinner' into clk-next 2019-09-19T22:31:27+00:00 Stephen Boyd sboyd@kernel.org 2019-09-19T22:31:27+00:00 a1ff1ce30036eca05bce1239159311bc3ef8f363 - Set clk_init_data pointer inside clk_hw to NULL after registration * clk-init-destroy: clk: Overwrite clk_hw::init with NULL during clk_register() clk: sunxi: Don't call clk_hw_get_name() on a hw that isn't registered clk: ti: Don't reference clk_init_data after registration clk: qcom: Remove error prints from DFS registration rtc: sun6i: Don't reference clk_init_data after registration clk: zx296718: Don't reference clk_init_data after registration clk: milbeaut: Don't reference clk_init_data after registration clk: socfpga: deindent code to proper indentation phy: ti: am654-serdes: Don't reference clk_init_data after registration clk: sprd: Don't reference clk_init_data after registration clk: socfpga: Don't reference clk_init_data after registration clk: sirf: Don't reference clk_init_data after registration clk: qcom: Don't reference clk_init_data after registration clk: meson: axg-audio: Don't reference clk_init_data after registration clk: lochnagar: Don't reference clk_init_data after registration clk: actions: Don't reference clk_init_data after registration * clk-doc: clk: remove extra ---help--- tags in Kconfig clk: add include guard to clk-conf.h clk: Document of_parse_clkspec() some more clk: Remove extraneous 'for' word in comments * clk-imx: (32 commits) clk: imx: imx8mn: fix pll mux bit clk: imx: imx8mm: fix pll mux bit clk: imx: clk-pll14xx: unbypass PLL by default clk: imx: pll14xx: avoid glitch when set rate clk: imx: imx8mn: fix audio pll setting clk: imx8mn: Add necessary frequency support for ARM PLL table clk: imx8mn: Add missing rate_count assignment for each PLL structure clk: imx8mn: fix int pll clk gate clk: imx8mn: Add GIC clock clk: imx8mn: Fix incorrect parents clk: imx8mm: Fix incorrect parents clk: imx8mq: Fix sys3 pll references clk: imx8mq: Unregister clks when of_clk_add_provider failed clk: imx8mm: Unregister clks when of_clk_add_provider failed clk: imx8mq: Mark AHB clock as critical clk: imx8mn: Keep uart clocks on for early console clk: imx: Remove unused function statement clk: imx7ulp: Make sure earlycon's clock is enabled clk: imx8mm: Switch to platform driver clk: imx: imx8mm: fix audio pll setting ... * clk-allwinner: clk: sunxi-ng: h6: Allow I2S to change parent rate clk: sunxi-ng: v3s: add Allwinner V3 support clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocks dt-bindings: clk: sunxi-ccu: add compatible string for V3 CCU clk: sunxi-ng: v3s: add the missing PLL_DDR1 
 - Set clk_init_data pointer inside clk_hw to NULL after registration

* clk-init-destroy:
  clk: Overwrite clk_hw::init with NULL during clk_register()
  clk: sunxi: Don't call clk_hw_get_name() on a hw that isn't registered
  clk: ti: Don't reference clk_init_data after registration
  clk: qcom: Remove error prints from DFS registration
  rtc: sun6i: Don't reference clk_init_data after registration
  clk: zx296718: Don't reference clk_init_data after registration
  clk: milbeaut: Don't reference clk_init_data after registration
  clk: socfpga: deindent code to proper indentation
  phy: ti: am654-serdes: Don't reference clk_init_data after registration
  clk: sprd: Don't reference clk_init_data after registration
  clk: socfpga: Don't reference clk_init_data after registration
  clk: sirf: Don't reference clk_init_data after registration
  clk: qcom: Don't reference clk_init_data after registration
  clk: meson: axg-audio: Don't reference clk_init_data after registration
  clk: lochnagar: Don't reference clk_init_data after registration
  clk: actions: Don't reference clk_init_data after registration

* clk-doc:
  clk: remove extra ---help--- tags in Kconfig
  clk: add include guard to clk-conf.h
  clk: Document of_parse_clkspec() some more
  clk: Remove extraneous 'for' word in comments

* clk-imx: (32 commits)
  clk: imx: imx8mn: fix pll mux bit
  clk: imx: imx8mm: fix pll mux bit
  clk: imx: clk-pll14xx: unbypass PLL by default
  clk: imx: pll14xx: avoid glitch when set rate
  clk: imx: imx8mn: fix audio pll setting
  clk: imx8mn: Add necessary frequency support for ARM PLL table
  clk: imx8mn: Add missing rate_count assignment for each PLL structure
  clk: imx8mn: fix int pll clk gate
  clk: imx8mn: Add GIC clock
  clk: imx8mn: Fix incorrect parents
  clk: imx8mm: Fix incorrect parents
  clk: imx8mq: Fix sys3 pll references
  clk: imx8mq: Unregister clks when of_clk_add_provider failed
  clk: imx8mm: Unregister clks when of_clk_add_provider failed
  clk: imx8mq: Mark AHB clock as critical
  clk: imx8mn: Keep uart clocks on for early console
  clk: imx: Remove unused function statement
  clk: imx7ulp: Make sure earlycon's clock is enabled
  clk: imx8mm: Switch to platform driver
  clk: imx: imx8mm: fix audio pll setting
  ...

* clk-allwinner:
  clk: sunxi-ng: h6: Allow I2S to change parent rate
  clk: sunxi-ng: v3s: add Allwinner V3 support
  clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocks
  dt-bindings: clk: sunxi-ccu: add compatible string for V3 CCU
  clk: sunxi-ng: v3s: add the missing PLL_DDR1
Merge tag 'devicetree-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux 2019-09-19T20:48:37+00:00 Linus Torvalds torvalds@linux-foundation.org 2019-09-19T20:48:37+00:00 e3a008ac1213d99f5f1210adc9d2a1f60da10c3b Pull Devicetree updates from Rob Herring: - a bunch of DT binding conversions to DT schema format - clean-ups of the Arm idle-states binding - support a default number of cells in of_for_each_phandle() when the cells name is missing - expose dtbs_check and dt_binding_check in the make help - convert writting-schema.md to ReST - HiSilicon reset controller binding updates - add documentation for MT8516 RNG * tag 'devicetree-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (46 commits) of: restore old handling of cells_name=NULL in of_*_phandle_with_args() bus: qcom: fix spelling mistake "ambigous" -> "ambiguous" of: Let of_for_each_phandle fallback to non-negative cell_count iommu: pass cell_count = -1 to of_for_each_phandle with cells_name dt-bindings: arm: Convert Realtek board/soc bindings to json-schema dt-bindings: arm: Convert Actions Semi bindings to jsonschema dt-bindings: Correct spelling in example schema dt-bindings: cpu: Add a support cpu type for cortex-a55 dt-bindings: gpu: mali-midgard: Add samsung exynos5250 compatible dt-bindings: arm: idle-states: Move exit-latency-us explanation dt-bindings: arm: idle-states: Add punctuation to improve readability dt-bindings: arm: idle-states: Correct "constraint guarantees" dt-bindings: arm: idle-states: Correct references to wake-up delay dt-bindings: arm: idle-states: Use "e.g." and "i.e." consistently pinctrl-mcp23s08: Fix property-name in dt-example dt-bindings: Clarify interrupts-extended usage dt-bindings: Convert Arm Mali Utgard GPU to DT schema dt-bindings: Convert Arm Mali Bifrost GPU to DT schema dt-bindings: Convert Arm Mali Midgard GPU to DT schema dt-bindings: irq: Convert Allwinner NMI Controller to a schema ... 
Pull Devicetree updates from Rob Herring:

 - a bunch of DT binding conversions to DT schema format

 - clean-ups of the Arm idle-states binding

 - support a default number of cells in of_for_each_phandle() when the
   cells name is missing

 - expose dtbs_check and dt_binding_check in the make help

 - convert writting-schema.md to ReST

 - HiSilicon reset controller binding updates

 - add documentation for MT8516 RNG

* tag 'devicetree-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (46 commits)
  of: restore old handling of cells_name=NULL in of_*_phandle_with_args()
  bus: qcom: fix spelling mistake "ambigous" -> "ambiguous"
  of: Let of_for_each_phandle fallback to non-negative cell_count
  iommu: pass cell_count = -1 to of_for_each_phandle with cells_name
  dt-bindings: arm: Convert Realtek board/soc bindings to json-schema
  dt-bindings: arm: Convert Actions Semi bindings to jsonschema
  dt-bindings: Correct spelling in example schema
  dt-bindings: cpu: Add a support cpu type for cortex-a55
  dt-bindings: gpu: mali-midgard: Add samsung exynos5250 compatible
  dt-bindings: arm: idle-states: Move exit-latency-us explanation
  dt-bindings: arm: idle-states: Add punctuation to improve readability
  dt-bindings: arm: idle-states: Correct "constraint guarantees"
  dt-bindings: arm: idle-states: Correct references to wake-up delay
  dt-bindings: arm: idle-states: Use "e.g." and "i.e." consistently
  pinctrl-mcp23s08: Fix property-name in dt-example
  dt-bindings: Clarify interrupts-extended usage
  dt-bindings: Convert Arm Mali Utgard GPU to DT schema
  dt-bindings: Convert Arm Mali Bifrost GPU to DT schema
  dt-bindings: Convert Arm Mali Midgard GPU to DT schema
  dt-bindings: irq: Convert Allwinner NMI Controller to a schema
  ...
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 2019-09-16T22:56:22+00:00 Linus Torvalds torvalds@linux-foundation.org 2019-09-16T22:56:22+00:00 cef7298262e9af841fb70d8673af45caf55300a1 Pull ARM DT updates from Arnd Bergmann: "This is another huge branch with close to 450 changessets related to devicetree files, roughly half of this for 32-bit and 64-bit respectively. There are lots of cleanups and additional hardware support for platforms we already support based on SoCs from Renesas, ST-Microelectronics, Intel/Altera, Rockchips, Allwinner, Broadcom and other manufacturers. A total of 6 new SoCs and 37 new boards gets added this time, one more SoC will come in a follow-up branch. Most of the new boards are for 64-bit ARM SoCs, the others are typically for the 32-bit Cortex-A7. Going more into details for SoC platforms with new hardware support: - The Snapdragon 855 (SM8150) is Qualcomm's current high-end phone platform, usually paired with an external 5G modem. So far we only support the Qualcomm SM8150 MTP reference platform, but no actual products. - For the slightly older Qualcomm platforms, support for several interesting products is getting added: Three laptops based on Snapdragon 835/MSM8998 (Asus NovaGo, HP Envy X2 and Lenovo Miix 630), one laptop based on Snapdragon 850/sdm850 (Lenovo Yoga C630) and several phones based on the older Snapdragon 410/MSM8916 (Samsung A3 and A5, Longcheer L8150 aka Android One 2nd gen "seed" aka Wileyfox Swift). - Mediatek MT7629 is a new wireless network router chip, similar to the older MT7623. It gets added together with the reference board implementation. - Allwinner V3 is a repackaged version of the existing low-end V3s chip, and is used in the tiny Lichee Pi Zero plus, also added here. There is also a new TV set-top box based on Allwinner H6, the Tanix TX6, and the eMMC variant of the Olimex A64-Olinuxino development board. - NXP i.MX8M Nano is a new member of the ever-expanding i.MX SoC family, similar to the i.MX8M Mini. As usual, there is a large number of new boards for i.MX SoCs: Einfochips i.MX8QXP AI_ML, SolidRun Hummingboard Pulse baseboard and System-on-Module, Boundary Devices i.MX8MQ Nitrogen8M, and TechNexion PICO-PI-IMX8M-DEV for the 64-bit i.MX8 line. For 32-bit, we get the Kontron i.MX6UL N6310 SoM with two baseboards, the PHYTEC phyBOARD-Segin SoM with three baseboards, and the Zodiac Inflight Innovations i.MX7 RMU2 board. - In a different NXP product line, the Layerscape LS1046A "Freeway" reference board gets added. - Amlogic SM1 (S905X3) and G12B (S922X, A311D) are updated chips from their set-top-box line and smart speaker with newer CPU and GPU cores compared to their predecessors. Both are now also supported by the Khadas VIM3 development board series, and the dts files for that get reorganized a bit to better deal with all variants. Another board based on SM1 that gets added is the SEI Robotics SEI610. - There are a handful of new x86 and Power9 server boards using Aspeed BMC chips that are gaining support for running Linux on the BMC through the OpenBMC project: Facebook Minipack/Wedge100/Wedge40, Lenovo Hr855xg2, and Mihawk. Notably these are still new machines using SoCs based on the ARM9 and ARM11 CPU cores, as support for the new Cortex-A7 based AST2600 is still ramping up. - There are three new end-user products using 32-bit Rockchips SoCs: Mecer Xtreme Mini S6 is an Android "mini PC" box based on the low-end RK3229 chip, while the two AOpen products Chromebox Mini (Fievel) and Chromebase Mini (Tiger) run ChromeOS and are meant for commercial settings(digital signage, PoS, ...). - One more single-board computer based on the popular 64-bit RK3399 is added: the Leez RK3399 P710" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (467 commits) arm64: dts: qcom: Add Lenovo Yoga C630 ARM: dts: aspeed-g5: Fixe gpio-ranges upper limit ARM; dts: aspeed: mihawk: File should not be executable ARM: dts: aspeed: swift: Change power supplies to version 2 ARM: dts: aspeed: vesnin: Add secondary SPI flash chip ARM: dts: aspeed: vesnin: Add wdt2 with alt-boot option ARM: dts: aspeed-g4: Add all flash chips ARM: dts: exynos: Enable GPU/Mali T604 on Arndale board ARM: dts: exynos: Enable GPU/Mali T604 on Chromebook Snow ARM: dts: exynos: Add GPU/Mali T604 node to Exynos5250 ARM: dts: exynos: Fix min/max buck4 for GPU on Arndale board ARM: dts: exynos: Mark LDO10 as always-on on Peach Pit/Pi Chromebooks ARM: dts: exynos: Remove not accurate secondary ADC compatible arm64: dts: rockchip: limit clock rate of MMC controllers for RK3328 arm64: dts: meson-sm1-sei610: add stdout-path property back arm64: dts: meson-sm1-sei610: enable DVFS arm64: dts: khadas-vim3: add support for the SM1 based VIM3L dt-bindings: arm: amlogic: add Amlogic SM1 based Khadas VIM3L bindings arm64: dts: khadas-vim3: move common nodes into meson-khadas-vim3.dtsi arm64: dts: meson: g12a: add reset to tdm formatters ... 
Pull ARM DT updates from Arnd Bergmann:
 "This is another huge branch with close to 450 changessets related to
  devicetree files, roughly half of this for 32-bit and 64-bit
  respectively. There are lots of cleanups and additional hardware
  support for platforms we already support based on SoCs from Renesas,
  ST-Microelectronics, Intel/Altera, Rockchips, Allwinner, Broadcom and
  other manufacturers.

  A total of 6 new SoCs and 37 new boards gets added this time, one more
  SoC will come in a follow-up branch. Most of the new boards are for
  64-bit ARM SoCs, the others are typically for the 32-bit Cortex-A7.

  Going more into details for SoC platforms with new hardware support:

   - The Snapdragon 855 (SM8150) is Qualcomm's current high-end phone
     platform, usually paired with an external 5G modem. So far we only
     support the Qualcomm SM8150 MTP reference platform, but no actual
     products.

   - For the slightly older Qualcomm platforms, support for several
     interesting products is getting added: Three laptops based on
     Snapdragon 835/MSM8998 (Asus NovaGo, HP Envy X2 and Lenovo Miix
     630), one laptop based on Snapdragon 850/sdm850 (Lenovo Yoga C630)
     and several phones based on the older Snapdragon 410/MSM8916
     (Samsung A3 and A5, Longcheer L8150 aka Android One 2nd gen "seed"
     aka Wileyfox Swift).

   - Mediatek MT7629 is a new wireless network router chip, similar to
     the older MT7623. It gets added together with the reference board
     implementation.

   - Allwinner V3 is a repackaged version of the existing low-end V3s
     chip, and is used in the tiny Lichee Pi Zero plus, also added here.
     There is also a new TV set-top box based on Allwinner H6, the Tanix
     TX6, and the eMMC variant of the Olimex A64-Olinuxino development
     board.

   - NXP i.MX8M Nano is a new member of the ever-expanding i.MX SoC
     family, similar to the i.MX8M Mini. As usual, there is a large
     number of new boards for i.MX SoCs: Einfochips i.MX8QXP AI_ML,
     SolidRun Hummingboard Pulse baseboard and System-on-Module,
     Boundary Devices i.MX8MQ Nitrogen8M, and TechNexion
     PICO-PI-IMX8M-DEV for the 64-bit i.MX8 line. For 32-bit, we get the
     Kontron i.MX6UL N6310 SoM with two baseboards, the PHYTEC
     phyBOARD-Segin SoM with three baseboards, and the Zodiac Inflight
     Innovations i.MX7 RMU2 board.

   - In a different NXP product line, the Layerscape LS1046A "Freeway"
     reference board gets added.

   - Amlogic SM1 (S905X3) and G12B (S922X, A311D) are updated chips from
     their set-top-box line and smart speaker with newer CPU and GPU
     cores compared to their predecessors. Both are now also supported
     by the Khadas VIM3 development board series, and the dts files for
     that get reorganized a bit to better deal with all variants.
     Another board based on SM1 that gets added is the SEI Robotics
     SEI610.

   - There are a handful of new x86 and Power9 server boards using
     Aspeed BMC chips that are gaining support for running Linux on the
     BMC through the OpenBMC project: Facebook
     Minipack/Wedge100/Wedge40, Lenovo Hr855xg2, and Mihawk. Notably
     these are still new machines using SoCs based on the ARM9 and ARM11
     CPU cores, as support for the new Cortex-A7 based AST2600 is still
     ramping up.

   - There are three new end-user products using 32-bit Rockchips SoCs:
     Mecer Xtreme Mini S6 is an Android "mini PC" box based on the
     low-end RK3229 chip, while the two AOpen products Chromebox Mini
     (Fievel) and Chromebase Mini (Tiger) run ChromeOS and are meant for
     commercial settings(digital signage, PoS, ...).

   - One more single-board computer based on the popular 64-bit RK3399
     is added: the Leez RK3399 P710"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (467 commits)
  arm64: dts: qcom: Add Lenovo Yoga C630
  ARM: dts: aspeed-g5: Fixe gpio-ranges upper limit
  ARM; dts: aspeed: mihawk: File should not be executable
  ARM: dts: aspeed: swift: Change power supplies to version 2
  ARM: dts: aspeed: vesnin: Add secondary SPI flash chip
  ARM: dts: aspeed: vesnin: Add wdt2 with alt-boot option
  ARM: dts: aspeed-g4: Add all flash chips
  ARM: dts: exynos: Enable GPU/Mali T604 on Arndale board
  ARM: dts: exynos: Enable GPU/Mali T604 on Chromebook Snow
  ARM: dts: exynos: Add GPU/Mali T604 node to Exynos5250
  ARM: dts: exynos: Fix min/max buck4 for GPU on Arndale board
  ARM: dts: exynos: Mark LDO10 as always-on on Peach Pit/Pi Chromebooks
  ARM: dts: exynos: Remove not accurate secondary ADC compatible
  arm64: dts: rockchip: limit clock rate of MMC controllers for RK3328
  arm64: dts: meson-sm1-sei610: add stdout-path property back
  arm64: dts: meson-sm1-sei610: enable DVFS
  arm64: dts: khadas-vim3: add support for the SM1 based VIM3L
  dt-bindings: arm: amlogic: add Amlogic SM1 based Khadas VIM3L bindings
  arm64: dts: khadas-vim3: move common nodes into meson-khadas-vim3.dtsi
  arm64: dts: meson: g12a: add reset to tdm formatters
  ...
Merge tag 'amlogic-dt64-2.1' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt 2019-09-03T21:16:39+00:00 Arnd Bergmann arnd@arndb.de 2019-09-03T21:15:56+00:00 f02bd65a5b63bbc8cfbe65073005909833b72bb5 arm64: dts: Amlogic updates for v5.4 (round 2) - new board: Khadas VIM3L (SM1/S905D3 SoC) - support power domains on G12[AB] and SM1 SoCs - DT binding fixups based on YAML schema - add a bunch of remote control keymap - enable DVFS on SM1/SEI610 board * tag 'amlogic-dt64-2.1' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (44 commits) arm64: dts: meson-sm1-sei610: add stdout-path property back arm64: dts: meson-sm1-sei610: enable DVFS arm64: dts: khadas-vim3: add support for the SM1 based VIM3L dt-bindings: arm: amlogic: add Amlogic SM1 based Khadas VIM3L bindings arm64: dts: khadas-vim3: move common nodes into meson-khadas-vim3.dtsi arm64: dts: meson: g12a: add reset to tdm formatters arm64: dts: meson: g12a: audio clock controller provides resets arm64: dts: meson-sm1-sei610: enable DVFS arm64: dts: meson-gxm-khadas-vim2: use rc-khadas keymap arm64: dts: meson-gxl-s905w-tx3-mini: add rc-tx3mini keymap arm64: dts: meson-gxl-s905x-khadas-vim: use rc-khadas keymap arm64: dts: meson-gxbb-wetek-play2: add rc-wetek-play2 keymap arm64: dts: meson-gxbb-wetek-hub: add rc-wetek-hub keymap arm64: dts: meson-g12a-x96-max: add rc-x96max keymap arm64: dts: meson-g12b-odroid-n2: add rc-odroid keymap arm64: dts: meson-sm1-sei610: add USB support arm64: dts: meson-sm1-sei610: add HDMI display support arm64: dts: meson-g12: add Everything-Else power domain controller arm64: dts: meson: fix boards regulators states format arm64: dts: meson-gxbb-p201: fix snps, reset-delays-us format ... Link: https://patchwork.kernel.org/patch/11122331/ Signed-off-by: Arnd Bergmann <arnd@arndb.de> 
arm64: dts: Amlogic updates for v5.4 (round 2)
- new board: Khadas VIM3L (SM1/S905D3 SoC)
- support power domains on G12[AB] and SM1 SoCs
- DT binding fixups based on YAML schema
- add a bunch of remote control keymap
- enable DVFS on SM1/SEI610 board

* tag 'amlogic-dt64-2.1' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (44 commits)
  arm64: dts: meson-sm1-sei610: add stdout-path property back
  arm64: dts: meson-sm1-sei610: enable DVFS
  arm64: dts: khadas-vim3: add support for the SM1 based VIM3L
  dt-bindings: arm: amlogic: add Amlogic SM1 based Khadas VIM3L bindings
  arm64: dts: khadas-vim3: move common nodes into meson-khadas-vim3.dtsi
  arm64: dts: meson: g12a: add reset to tdm formatters
  arm64: dts: meson: g12a: audio clock controller provides resets
  arm64: dts: meson-sm1-sei610: enable DVFS
  arm64: dts: meson-gxm-khadas-vim2: use rc-khadas keymap
  arm64: dts: meson-gxl-s905w-tx3-mini: add rc-tx3mini keymap
  arm64: dts: meson-gxl-s905x-khadas-vim: use rc-khadas keymap
  arm64: dts: meson-gxbb-wetek-play2: add rc-wetek-play2 keymap
  arm64: dts: meson-gxbb-wetek-hub: add rc-wetek-hub keymap
  arm64: dts: meson-g12a-x96-max: add rc-x96max keymap
  arm64: dts: meson-g12b-odroid-n2: add rc-odroid keymap
  arm64: dts: meson-sm1-sei610: add USB support
  arm64: dts: meson-sm1-sei610: add HDMI display support
  arm64: dts: meson-g12: add Everything-Else power domain controller
  arm64: dts: meson: fix boards regulators states format
  arm64: dts: meson-gxbb-p201: fix snps, reset-delays-us format
  ...

Link: https://patchwork.kernel.org/patch/11122331/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arm: dts: mediatek: add basic support for MT7629 SoC 2019-08-22T09:22:17+00:00 Ryder Lee ryder.lee@mediatek.com 2019-07-11T02:14:23+00:00 cc212241df0b8975bb0e6d7f9028405a9c664e49 This adds basic support for MT7629 reference board. Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> 
This adds basic support for MT7629 reference board.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
dt-bindings: reset: hisilicon: Add ao reset controller 2019-08-20T13:13:47+00:00 Peter Griffin peter.griffin@linaro.org 2019-08-19T23:48:40+00:00 5f912f7ced427db56729e6419b1fdff9226e0728 This is required to bring Mali450 gpu out of reset. Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: dri-devel@lists.freedesktop.org Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org> 
This is required to bring Mali450 gpu out of reset.

Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: dri-devel@lists.freedesktop.org
Cc: devicetree@vger.kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
dt-bindings: clock: meson: add resets to the audio clock controller 2019-08-20T09:50:30+00:00 Jerome Brunet jbrunet@baylibre.com 2019-08-12T12:32:52+00:00 0688587a71200911721a0cb025fe805ddc0404b6 Add the documentation and bindings for the resets provided by the g12a audio clock controller Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> 
Add the documentation and bindings for the resets provided by the g12a
audio clock controller

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
clk: sunxi-ng: v3s: add Allwinner V3 support 2019-08-12T08:05:48+00:00 Icenowy Zheng icenowy@aosc.io 2019-07-28T03:12:24+00:00 0ed4c252bf80b35fe768ec6506b2e58986f99687 Allwinner V3 has the same main die with V3s, but with more pins wired. There's a I2S bus on V3 that is not available on V3s. Add the V3-only peripheral's clocks and reset to the V3s CCU driver, bound to a new V3 compatible string. The driver name is not changed because it's part of the device tree binding (the header file name). Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> 
Allwinner V3 has the same main die with V3s, but with more pins wired.
There's a I2S bus on V3 that is not available on V3s.

Add the V3-only peripheral's clocks and reset to the V3s CCU driver,
bound to a new V3 compatible string. The driver name is not changed
because it's part of the device tree binding (the header file name).

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
dt-bindings: reset: amlogic,meson8b-reset: update with SPDX Licence identifier 2019-08-01T09:01:58+00:00 Neil Armstrong narmstrong@baylibre.com 2019-08-01T07:54:54+00:00 fb0d72c7ac5d1a3578e15cb56b4f453730790ba6 Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> 
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>