linux.git/include/dt-bindings/pinctrl, branch v6.16 Linux kernel source tree Merge branch 'ib-amlogic-a4' into devel 2025-02-27T23:03:55+00:00 Linus Walleij linus.walleij@linaro.org 2025-02-27T23:03:55+00:00 3f11be833b653694f995cf117282372f80578fb5 Merge immutable branch into devel for next. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Merge immutable branch into devel for next.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
dt-bindings: pinctrl: Add support for Amlogic A4 SoC 2025-02-27T23:03:17+00:00 Xianwei Zhao xianwei.zhao@amlogic.com 2025-02-12T05:20:50+00:00 7030377acc76c7c70bb78b261f0398dc66ab8993 Add the dt-bindings for Amlogic pin controller, and add a new dt-binding header file which document the GPIO bank names of Amlogic A4 SoC. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20250212-amlogic-pinctrl-v5-1-282bc2516804@amlogic.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add the dt-bindings for Amlogic pin controller, and add a new
dt-binding header file which document the GPIO bank names of
Amlogic A4 SoC.

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20250212-amlogic-pinctrl-v5-1-282bc2516804@amlogic.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
dt-bindings: pinctrl: Add pinctrl for Sophgo SG2042 series SoC 2025-02-27T22:56:18+00:00 Inochi Amaoto inochiama@gmail.com 2025-02-11T05:17:53+00:00 68ea8c87799e420b6073f0a1aea2d094dec684ce SG2042 introduces a simple pinctrl device for all configurable pins. For the SG2042 pinctl register file, each register (32 bits) is responsible for two pins, each occupying the upper 16 bits and lower 16 bits of the register. It supports setting pull up/down, drive strength and input schmitt trigger. Add support for SG2042 pinctrl device. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20250211051801.470800-6-inochiama@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
SG2042 introduces a simple pinctrl device for all configurable pins.
For the SG2042 pinctl register file, each register (32 bits) is
responsible for two pins, each occupying the upper 16 bits and lower
16 bits of the register. It supports setting pull up/down, drive
strength and input schmitt trigger.

Add support for SG2042 pinctrl device.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20250211051801.470800-6-inochiama@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Merge tag 'renesas-r9a09g047-dt-binding-defs-tag2' into renesas-pinctrl-for-v6.14 2025-01-03T20:09:11+00:00 Geert Uytterhoeven geert+renesas@glider.be 2025-01-03T20:09:11+00:00 75ea9cf9b8acf62fcf877106b2f15ab0ea468376 Renesas RZ/G3E Pin Control DT Binding Definitions Pin control DT bindings and binding definitions for the Renesas RZ/G3E (R9A09G047) SoC, shared by driver and DT source files. 
Renesas RZ/G3E Pin Control DT Binding Definitions

Pin control DT bindings and binding definitions for the Renesas RZ/G3E
(R9A09G047) SoC, shared by driver and DT source files.
Merge tag 'renesas-r9a09g057-dt-binding-defs-tag2' into renesas-pinctrl-for-v6.14 2025-01-03T20:08:55+00:00 Geert Uytterhoeven geert+renesas@glider.be 2025-01-03T20:08:55+00:00 4180ca622483d6a93462bf0b171cbb3666af67e0 Renesas RZ/V2H Pin Control DT Binding Definitions Pin control DT binding definitions for the Renesas RZ/V2H (R9A09G057) SoC, shared by driver and DT source files. 
Renesas RZ/V2H Pin Control DT Binding Definitions

Pin control DT binding definitions for the Renesas RZ/V2H (R9A09G057)
SoC, shared by driver and DT source files.
dt-bindings: pinctrl: renesas: Document RZ/G3E SoC 2025-01-03T20:04:44+00:00 Biju Das biju.das.jz@bp.renesas.com 2024-12-16T19:53:12+00:00 5c7fb203d0dbfbfeed51991a4f98499b245634a7 Add documentation for the pin controller found on the Renesas RZ/G3E (R9A09G047) SoC. The RZ/G3E PFC is similar to the RZ/V2H SoC but has more pins(P00-PS3). Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241216195325.164212-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> 
Add documentation for the pin controller found on the Renesas RZ/G3E
(R9A09G047) SoC. The RZ/G3E PFC is similar to the RZ/V2H SoC but has more
pins(P00-PS3).

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241216195325.164212-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
dt-bindings: pinctrl: renesas: Add alpha-numerical port support for RZ/V2H 2025-01-03T19:45:57+00:00 Biju Das biju.das.jz@bp.renesas.com 2024-12-16T19:53:11+00:00 3e4863d24818a41db42b4f2680715f204657839e RZ/V2H has ports P0-P9 and PA-PB. Add support for defining alpha-numerical ports in DT using RZV2H_* macros. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241216195325.164212-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> 
RZ/V2H has ports P0-P9 and PA-PB. Add support for defining alpha-numerical
ports in DT using RZV2H_* macros.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241216195325.164212-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
dt-bindings: pinctrl: Add pinctrl for Sophgo CV1800 series SoC. 2024-08-26T09:09:56+00:00 Inochi Amaoto inochiama@outlook.com 2024-08-02T00:35:16+00:00 64aa494de6fa7289ba9d1de4ba331a1aa8ae094f Add pinctrl support for Sophgo CV1800 series SoC. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/IA1PR20MB4953680DE7977CAD906DBDB4BBB32@IA1PR20MB4953.namprd20.prod.outlook.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add pinctrl support for Sophgo CV1800 series SoC.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/IA1PR20MB4953680DE7977CAD906DBDB4BBB32@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
dt-bindings: pinctrl: samsung: drop unused header with register constants 2024-03-25T10:50:27+00:00 Krzysztof Kozlowski krzysztof.kozlowski@linaro.org 2024-03-12T16:44:28+00:00 4184e4912ca69d4f18a800144539af3b37c6a663 The bindings header for Samsung pin controller DTS pin values (holding register values in fact) was deprecated in v6.1 kernel in commit 9d9292576810 ("dt-bindings: pinctrl: samsung: deprecate header with register constants"). This was enough of time for users to switch to in-DTS headers, so drop the bindings header. Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240312164428.692552-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 
The bindings header for Samsung pin controller DTS pin values (holding
register values in fact) was deprecated in v6.1 kernel in
commit 9d9292576810 ("dt-bindings: pinctrl: samsung: deprecate header
with register constants").  This was enough of time for users to switch
to in-DTS headers, so drop the bindings header.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240312164428.692552-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Merge tag 'pinctrl-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl 2023-06-30T21:57:19+00:00 Linus Torvalds torvalds@linux-foundation.org 2023-06-30T21:57:19+00:00 28968f384be3c064d66954aac4c534a5e76bf973 Pull pin control updates from Linus Walleij: "No core changes this time New drivers: - Tegra234 support - Qualcomm IPQ5018 support - Intel Meteor Lake-S support - Qualcomm SDX75 subdriver - Qualcomm SPMI-based PM8953 support Improvements: - Fix up support for GPIO3 on the AXP209 - Push-pull drive configuration support for the AT91 PIO4 - Fix misc non-urgent bugs in the AMD driver - Misc non-urgent improved error handling - Misc janitorial and minor improvements" * tag 'pinctrl-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits) pinctrl: cherryview: Drop goto label pinctrl: baytrail: invert if condition pinctrl: baytrail: add warning for BYT_VAL_REG retrieval failure pinctrl: baytrail: reduce scope of spinlock in ->dbg_show() hook pinctrl: tegra: avoid duplicate field initializers dt-bindings: pinctrl: qcom,sdx65-tlmm: add pcie_clkreq function pinctrl: mlxbf3: remove broken Kconfig 'select' pinctrl: spear: Remove unused of_gpio.h inclusion pinctrl: lantiq: Remove unused of_gpio.h inclusion pinctrl: at91-pio4: check return value of devm_kasprintf() pinctrl: microchip-sgpio: check return value of devm_kasprintf() pinctrl: freescale: Fix a memory out of bounds when num_configs is 1 pinctrl: intel: refine ->irq_set_type() hook pinctrl: intel: refine ->set_mux() hook pinctrl: baytrail: Use str_hi_lo() helper lib/string_choices: Add str_high_low() helper lib/string_helpers: Split out string_choices.h lib/string_helpers: Add missing header files to MAINTAINERS database pinctrl: npcm7xx: Add missing check for ioremap pinctrl:sunplus: Add check for kmalloc ... 
Pull pin control updates from Linus Walleij:
 "No core changes this time

  New drivers:

   - Tegra234 support

   - Qualcomm IPQ5018 support

   - Intel Meteor Lake-S support

   - Qualcomm SDX75 subdriver

   - Qualcomm SPMI-based PM8953 support

  Improvements:

   - Fix up support for GPIO3 on the AXP209

   - Push-pull drive configuration support for the AT91 PIO4

   - Fix misc non-urgent bugs in the AMD driver

   - Misc non-urgent improved error handling

   - Misc janitorial and minor improvements"

* tag 'pinctrl-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits)
  pinctrl: cherryview: Drop goto label
  pinctrl: baytrail: invert if condition
  pinctrl: baytrail: add warning for BYT_VAL_REG retrieval failure
  pinctrl: baytrail: reduce scope of spinlock in ->dbg_show() hook
  pinctrl: tegra: avoid duplicate field initializers
  dt-bindings: pinctrl: qcom,sdx65-tlmm: add pcie_clkreq function
  pinctrl: mlxbf3: remove broken Kconfig 'select'
  pinctrl: spear: Remove unused of_gpio.h inclusion
  pinctrl: lantiq: Remove unused of_gpio.h inclusion
  pinctrl: at91-pio4: check return value of devm_kasprintf()
  pinctrl: microchip-sgpio: check return value of devm_kasprintf()
  pinctrl: freescale: Fix a memory out of bounds when num_configs is 1
  pinctrl: intel: refine ->irq_set_type() hook
  pinctrl: intel: refine ->set_mux() hook
  pinctrl: baytrail: Use str_hi_lo() helper
  lib/string_choices: Add str_high_low() helper
  lib/string_helpers: Split out string_choices.h
  lib/string_helpers: Add missing header files to MAINTAINERS database
  pinctrl: npcm7xx: Add missing check for ioremap
  pinctrl:sunplus: Add check for kmalloc
  ...