linux.git/include/dt-bindings/gpio, branch v4.13

gpio: Add new flags to control sleep status of GPIOs

2017-05-29T09:07:55+00:00

Add new flags to allow users to specify that they are not concerned with
the status of GPIOs whilst in a sleep/low power state.

Signed-off-by: Charles Keepax 
Acked-by: Rob Herring 
Signed-off-by: Linus Walleij

gpio: core: Decouple open drain/source flag with active low/high

2017-04-07T10:23:29+00:00

Currently, the GPIO interface is said to Open Drain if it is Single
Ended and active LOW. Similarly, it is said as Open Source if it is
Single Ended and active HIGH.

The active HIGH/LOW is used in the interface for setting the pin
state to HIGH or LOW when enabling/disabling the interface.

In Open Drain interface, pin is set to HIGH by putting pin in
high impedance and LOW by driving to the LOW.

In Open Source interface, pin is set to HIGH by driving pin to
HIGH and set to LOW by putting pin in high impedance.

With above, the Open Drain/Source is unrelated to the active LOW/HIGH
in interface. There is interface where the enable/disable of interface
is ether active LOW or HIGH but it is Open Drain type.

Hence decouple the Open Drain with Single Ended + Active LOW and
Open Source with Single Ended + Active HIGH.

Adding different flag for the Open Drain/Open Source which is valid
only when Single ended flag is enabled.

Signed-off-by: Laxman Dewangan 
Signed-off-by: Linus Walleij

pinctrl: meson: Add GXL pinctrl definitions

2016-11-04T22:05:06+00:00

Add support for the Amlogic Meson GXL SoC, this is a partially complete
definition only based on the Amlogic Vendor tree.

This definition differs a lot from the GXBB and needs a separate entry.

Acked-by: Rob Herring 
Signed-off-by: Neil Armstrong 
Acked-by: Kevin Hilman 
Signed-off-by: Linus Walleij

Merge tag 'pinctrl-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2016-05-19T19:50:56+00:00

Pull pin control updates from Linus Walleij:
 "This kernel cycle was quite calm when it comes to pin control and
  there is really just one major change, and that is the introduction of
  devm_pinctrl_register() managed resources.

  Apart from that linear development, details below.

  Core changes:

   - Add the devm_pinctrl_register() API and switch all applicable
     drivers to use it, saving lots of lines of code all over the place.

  New drivers:

   - driver for the Broadcom NS2 SoC

   - subdriver for the PXA25x SoCs

   - subdriver for the AMLogic Meson GXBB SoC

  Driver improvements:

   - the Intel Baytrail driver now properly supports pin control

   - Nomadik, Rockchip, Broadcom BCM2835 support the .get_direction()
     callback in the GPIO portions

   - continued development and stabilization of several SH-PFC SoC
     subdrivers: r8a7795, r8a7790, r8a7794 etc"

* tag 'pinctrl-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (85 commits)
  Revert "pinctrl: tegra: avoid parked_reg and parked_bank"
  pinctrl: meson: Fix eth_tx_en bit index
  pinctrl: tegra: avoid parked_reg and parked_bank
  pinctrl: tegra: Correctly check the supported configuration
  pinctrl: amlogic: Add support for Amlogic Meson GXBB SoC
  pinctrl: rockchip: fix pull setting error for rk3399
  pinctrl: stm32: Implement .pin_config_dbg_show()
  pinctrl: nomadik: hide nmk_gpio_get_mode when unused
  pinctrl: ns2: rename pinctrl_utils_dt_free_map
  pinctrl: at91: Merge clk_prepare and clk_enable into clk_prepare_enable
  pinctrl: at91: Make at91_gpio_template const
  pinctrl: baytrail: fix some error handling in debugfs
  pinctrl: ns2: add pinmux driver support for Broadcom NS2 SoC
  pinctrl: sirf/atlas7: trivial fix of spelling mistake on flagged
  pinctrl: sh-pfc: Kill unused variable in sh_pfc_remove()
  pinctrl: nomadik: implement .get_direction()
  pinctrl: nomadik: use BIT() with offsets consequently
  pinctrl: exynos5440: Use off-stack memory for pinctrl_gpio_range
  pinctrl: zynq: Use devm_pinctrl_register() for pinctrl registration
  pinctrl: u300: Use devm_pinctrl_register() for pinctrl registration
  ...

pinctrl: amlogic: Add support for Amlogic Meson GXBB SoC

2016-05-11T08:47:11+00:00

This patch adds the basic platform file to support the pin controller
found on the Amlogic Meson GXBB SoCs.

Signed-off-by: Carlo Caione 
Reviewed-by: Kevin Hilman 
Tested-by: Kevin Hilman 
Signed-off-by: Linus Walleij

ARM: tegra: Add DT binding for Tegra186 GPIO controllers

2016-04-22T11:32:29+00:00

Tegra186 contains two separate but mostly similar GPIO controllers.
Register layout differs significantly from previous Tegra generations,
and so a new binding is required to describe them in device tree. This
patch adds that binding.

Signed-off-by: Stephen Warren 
Acked-by: Rob Herring 
Acked-by: Linus Walleij 
Signed-off-by: Thierry Reding

ARM: tegra: Fix naming in GPIO DT binding header

2016-04-22T11:23:17+00:00

According to the Tegra TRM, GPIOs are aggregated into /ports/ of 8 GPIOs,
not into /banks/. Fix  to correctly reflect
this naming convention. While this seems like silly churn, it will become
slightly more important once we introduce the GPIO binding for upcoming
Tegra chips.

Signed-off-by: Stephen Warren 
Acked-by: Thierry Reding 
Acked-by: Linus Walleij 
Signed-off-by: Thierry Reding

gpio: add DT bindings for existing consumer flags

2015-10-02T11:25:53+00:00

It is customary for GPIO controllers to support open drain/collector
and open source/emitter configurations. Add standard GPIO line flags
to account for this and augment the documentation to say that these
are the most generic bindings.

Several people approached me to add new flags to the lines, and this
makes sense, but let's first bind up the most common cases before we
start to add exotic stuff.

Thanks to H. Nikolaus Schaller for ideas on how to encode single-ended
wiring such as open drain/source and open collector/emitter.

Cc: Tony Lindgren 
Cc: Grygorii Strashko 
Cc: H. Nikolaus Schaller 
Signed-off-by: Linus Walleij

pinctrl: Add support for Meson8b

2015-04-07T09:44:40+00:00

This patch adds support for the AmLogic Meson8b SoC.

Signed-off-by: Carlo Caione 
Acked-by: Beniamino Galvani 
Signed-off-by: Linus Walleij

pinctrl: add driver for Amlogic Meson SoCs

2015-01-26T08:13:00+00:00

This is a driver for the pinmux and GPIO controller available in
Amlogic Meson SoCs. It currently supports only Meson8, however the
common code should be generic enough to work also for other SoCs after
having defined the proper set of functions and groups.

GPIO interrupts are not supported at the moment due to lack of
documentation.

Signed-off-by: Beniamino Galvani 
Signed-off-by: Linus Walleij