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<title>linux.git/include/dt-bindings/clk, branch v3.14</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>Merge tag 'clk-for-linus-3.14-part1' of git://git.linaro.org/people/mike.turquette/linux</title>
<updated>2014-01-24T02:56:08+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2014-01-24T02:56:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7e21774db5cc9cf8fe93a64a2f0c6cf47db8ab24'/>
<id>7e21774db5cc9cf8fe93a64a2f0c6cf47db8ab24</id>
<content type='text'>
Pull clk framework changes from Mike Turquette:
 "The first half of the clk framework pull request is made up almost
  entirely of new platform/driver support.  There are some conversions
  of existing drivers to the common-clock Device Tree binding, and a few
  non-critical fixes to the framework.

  Due to an entirely unnecessary cyclical dependency with the arm-soc
  tree this pull request is broken into two pieces.  The second piece
  will be sent out after arm-soc sends you the pull request that merged
  in core support for the HiSilicon 3620 platform.  That same pull
  request from arm-soc depends on this pull request to merge in those
  HiSilicon bits without causing build failures"

[ Just did the ARM SoC merges, so getting ready for the second clk tree
  pull request   - Linus ]

* tag 'clk-for-linus-3.14-part1' of git://git.linaro.org/people/mike.turquette/linux: (97 commits)
  devicetree: bindings: Document qcom,mmcc
  devicetree: bindings: Document qcom,gcc
  clk: qcom: Add support for MSM8660's global clock controller (GCC)
  clk: qcom: Add support for MSM8974's multimedia clock controller (MMCC)
  clk: qcom: Add support for MSM8974's global clock controller (GCC)
  clk: qcom: Add support for MSM8960's multimedia clock controller (MMCC)
  clk: qcom: Add support for MSM8960's global clock controller (GCC)
  clk: qcom: Add reset controller support
  clk: qcom: Add support for branches/gate clocks
  clk: qcom: Add support for root clock generators (RCGs)
  clk: qcom: Add support for phase locked loops (PLLs)
  clk: qcom: Add a regmap type clock struct
  clk: Add set_rate_and_parent() op
  reset: Silence warning in reset-controller.h
  clk: sirf: re-arch to make the codes support both prima2 and atlas6
  clk: composite: pass mux_hw into determine_rate
  clk: shmobile: Fix MSTP clock array initialization
  clk: shmobile: Fix MSTP clock index
  ARM: dts: Add clock provider specific properties to max77686 node
  clk: max77686: Register OF clock provider
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull clk framework changes from Mike Turquette:
 "The first half of the clk framework pull request is made up almost
  entirely of new platform/driver support.  There are some conversions
  of existing drivers to the common-clock Device Tree binding, and a few
  non-critical fixes to the framework.

  Due to an entirely unnecessary cyclical dependency with the arm-soc
  tree this pull request is broken into two pieces.  The second piece
  will be sent out after arm-soc sends you the pull request that merged
  in core support for the HiSilicon 3620 platform.  That same pull
  request from arm-soc depends on this pull request to merge in those
  HiSilicon bits without causing build failures"

[ Just did the ARM SoC merges, so getting ready for the second clk tree
  pull request   - Linus ]

* tag 'clk-for-linus-3.14-part1' of git://git.linaro.org/people/mike.turquette/linux: (97 commits)
  devicetree: bindings: Document qcom,mmcc
  devicetree: bindings: Document qcom,gcc
  clk: qcom: Add support for MSM8660's global clock controller (GCC)
  clk: qcom: Add support for MSM8974's multimedia clock controller (MMCC)
  clk: qcom: Add support for MSM8974's global clock controller (GCC)
  clk: qcom: Add support for MSM8960's multimedia clock controller (MMCC)
  clk: qcom: Add support for MSM8960's global clock controller (GCC)
  clk: qcom: Add reset controller support
  clk: qcom: Add support for branches/gate clocks
  clk: qcom: Add support for root clock generators (RCGs)
  clk: qcom: Add support for phase locked loops (PLLs)
  clk: qcom: Add a regmap type clock struct
  clk: Add set_rate_and_parent() op
  reset: Silence warning in reset-controller.h
  clk: sirf: re-arch to make the codes support both prima2 and atlas6
  clk: composite: pass mux_hw into determine_rate
  clk: shmobile: Fix MSTP clock array initialization
  clk: shmobile: Fix MSTP clock index
  ARM: dts: Add clock provider specific properties to max77686 node
  clk: max77686: Register OF clock provider
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: exynos-audss: add support for Exynos 5420</title>
<updated>2014-01-08T17:02:43+00:00</updated>
<author>
<name>Andrew Bresticker</name>
<email>abrestic@chromium.org</email>
</author>
<published>2013-09-25T21:12:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=3538a2cf0e04ad69840d74f46f7f8af920d913b5'/>
<id>3538a2cf0e04ad69840d74f46f7f8af920d913b5</id>
<content type='text'>
The AudioSS block on Exynos 5420 has an additional clock gate for the
ADMA bus clock.

Signed-off-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Acked-by: Mike Turquette &lt;mturquette@linaro.org&gt;
Acked-by: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
Signed-off-by: Tomasz Figa &lt;t.figa@samsung.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The AudioSS block on Exynos 5420 has an additional clock gate for the
ADMA bus clock.

Signed-off-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Acked-by: Mike Turquette &lt;mturquette@linaro.org&gt;
Acked-by: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
Signed-off-by: Tomasz Figa &lt;t.figa@samsung.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: at91: add PMC macro file for dt definitions</title>
<updated>2013-12-02T14:31:21+00:00</updated>
<author>
<name>Boris BREZILLON</name>
<email>b.brezillon@overkiz.com</email>
</author>
<published>2013-10-11T08:41:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7e682b44376e8caa6fc57acbf818b52747b1f922'/>
<id>7e682b44376e8caa6fc57acbf818b52747b1f922</id>
<content type='text'>
This patch adds a new macro file for PMC macros.

This macro file includes the definitions of SR (status register) bit
offsets and will be use to reference PMC irqs.

Signed-off-by: Boris BREZILLON &lt;b.brezillon@overkiz.com&gt;
Acked-by: Mike Turquette &lt;mturquette@linaro.org&gt;
Signed-off-by: Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds a new macro file for PMC macros.

This macro file includes the definitions of SR (status register) bit
offsets and will be use to reference PMC irqs.

Signed-off-by: Boris BREZILLON &lt;b.brezillon@overkiz.com&gt;
Acked-by: Mike Turquette &lt;mturquette@linaro.org&gt;
Signed-off-by: Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: samsung: register audio subsystem clocks using common clock framework</title>
<updated>2013-06-18T18:28:41+00:00</updated>
<author>
<name>Padmavathi Venna</name>
<email>padma.v@samsung.com</email>
</author>
<published>2013-06-17T15:02:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=1241ef94ccc3aeaeecf73b2889efd9bcd6ffa4f7'/>
<id>1241ef94ccc3aeaeecf73b2889efd9bcd6ffa4f7</id>
<content type='text'>
Audio subsystem is introduced in s5pv210 and exynos platforms.
This has seperate clock controller which can control i2s0 and
pcm0 clocks. This patch registers the audio subsystem clocks
with the common clock framework on Exynos family.

Signed-off-by: Padmavathi Venna &lt;padma.v@samsung.com&gt;
Reviewed-by: Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;
Reviewed-by: Doug Anderson &lt;dianders@chromium.org&gt;
Acked-by: Mike Turquette &lt;mturquette@linaro.org&gt;
Signed-off-by: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Audio subsystem is introduced in s5pv210 and exynos platforms.
This has seperate clock controller which can control i2s0 and
pcm0 clocks. This patch registers the audio subsystem clocks
with the common clock framework on Exynos family.

Signed-off-by: Padmavathi Venna &lt;padma.v@samsung.com&gt;
Reviewed-by: Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;
Reviewed-by: Doug Anderson &lt;dianders@chromium.org&gt;
Acked-by: Mike Turquette &lt;mturquette@linaro.org&gt;
Signed-off-by: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
</pre>
</div>
</content>
</entry>
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