linux.git/include/asm-sh/cpu-sh4, branch v2.6.25

sh: add support for sh7366 processor

2008-02-14T05:22:10+00:00

This patch adds sh7366 cpu supports. Just the most basic things like interrupt
controller, clocks and serial port are included at this point.

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

sh: Add support for SH7763 CPU subtype.

2008-01-28T04:19:02+00:00

Signed-off-by: Yoshihiro Shimoda 
Signed-off-by: Paul Mundt

sh: Support denormalization on SH-4 FPU.

2008-01-28T04:18:59+00:00

Signed-off-by: Stuart Menefy 
Signed-off-by: Paul Mundt

sh: Clean up places that make 29-bit physical assumptions.

2008-01-28T04:18:59+00:00

Signed-off-by: Stuart Menefy 
Signed-off-by: Paul Mundt

rtc: rtc-sh: Split out the CPU defs to asm/cpu/.

2008-01-28T04:18:58+00:00

With all of the different CPU types this was getting a but unwieldly.
Since sh64 is now integrated, we don't have to worry about multiple
architectures caring about the header definitions.

Split out the defs for each asm/cpu/ to make rtc-sh slightly less
visually offensive.

Signed-off-by: Paul Mundt

sh: Invalidate the TLB after applying PMB mappings.

2008-01-28T04:18:58+00:00

Signed-off-by: Stuart Menefy 
Signed-off-by: Paul Mundt

sh: Split out cache status bits per-CPU family.

2008-01-28T04:18:38+00:00

Signed-off-by: Paul Mundt

sh: Split out PXSEG segmentation per-CPU family.

2008-01-28T04:18:38+00:00

The CPU family abstraction already exists, so move out the PXSEG
definition for each one. SH-2A already has this special cased,
and SH-5 will as well.

Signed-off-by: Paul Mundt

sh: Fix SH-4 DMAC CHCR masking.

2007-10-07T20:19:36+00:00

This patch fixes the DMA cascade by masking the correct bits.

Tested and working with Dreamcast PVR2 DMA. With this patch applied
the existing mainline code in arch/sh/drivers/dma/dma-sh.c works,
whereas before I was patching that to get round this problem.

Signed-off-by: Adrian McMenamin 
Signed-off-by: Paul Mundt

sh: Fix up extended mode TLB for SH-X2+ cores.

2007-09-21T02:57:55+00:00

The extended mode TLB requires both 64-bit PTEs and a 64-bit pgprot,
correspondingly, the PGD also has to be 64-bits, so fix that up.

The kernel and user permission bits really are decoupled in early
cuts of the silicon, which means that we also have to set corresponding
kernel permissions on user pages or we end up with user pages that the
kernel simply can't touch (!).

Finally, with those things corrected, really enable MMUCR.ME and
correct the PTEA value (this simply needs to be the upper 32-bits
of the PTE, with the size and protection bit encoding).

Signed-off-by: Paul Mundt