linux.git/include/asm-sh/cpu-sh3, branch v2.6.23

sh: remove support for sh7300 and solution engine 7300

2007-07-26T06:37:57+00:00

This patch removes old dead code:
- kill off sh7300 cpu support
- get rid of broken solution engine 7300 board support

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

sh: Fix timer-tmu build for SH-3.

2007-07-06T01:26:03+00:00

With the TMU register definitions being renamed on SH-4, SH-3 ended up
breaking. Update the TSTR define to match the SH-4 convention.

Signed-off-by: Nobuhiro Iwamatsu 
Signed-off-by: Paul Mundt

sh: dma: use __maybe_unused

2007-05-09T19:30:57+00:00

There is no such thing as labeling a variable as __attribute__((used)).  Since
ts_shift is not referenced in inline assembly, we assume that we're simply
suppressing a warning here if the variable is declared but unreferenced.

Cc: Paul Mundt 
Signed-off-by: David Rientjes 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

sh: MS7712SE01 board support.

2007-05-07T02:10:54+00:00

Support the SH7712 (SH3-DSP) Solution Engine reference board.

Signed-off-by: Nobuhiro Iwamatsu 
Signed-off-by: Paul Mundt

sh: Revert lazy dcache writeback changes.

2007-03-05T10:46:47+00:00

These ended up causing too many problems on older parts,
revert for now..

Signed-off-by: Paul Mundt

sh: Lazy dcache writeback optimizations.

2007-02-13T01:54:44+00:00

This converts the lazy dcache handling to the model described in
Documentation/cachetlb.txt and drops the ptep_get_and_clear() hacks
used for the aliasing dcaches on SH-4 and SH7705 in 32kB mode. As a
bonus, this slightly cuts down on the cache flushing frequency.

With that and the PTEA handling out of the way, the update_mmu_cache()
implementations can be consolidated, and we no longer have to worry
about which configuration the cache is in for the SH7705 case.

And finally, explicitly disable the lazy writeback on SMP (SH-4A).

Signed-off-by: Paul Mundt

[PATCH] Optimize D-cache alias handling on fork

2006-12-13T17:27:08+00:00

Virtually index, physically tagged cache architectures can get away
without cache flushing when forking.  This patch adds a new cache
flushing function flush_cache_dup_mm(struct mm_struct *) which for the
moment I've implemented to do the same thing on all architectures
except on MIPS where it's a no-op.

Signed-off-by: Ralf Baechle 
Signed-off-by: Linus Torvalds

sh: Kill off more dead headers.

2006-10-03T04:12:38+00:00

Some old rtc and io headers were left hanging around, kill them off..

Signed-off-by: Paul Mundt

sh: Calculate shm alignment at runtime.

2006-09-27T09:36:17+00:00

Set the SHM alignment at runtime, based off of probed cache desc.
Optimize get_unmapped_area() to only colour align shared mappings.

Signed-off-by: Paul Mundt

sh: Add support for SH7706/SH7710/SH7343 CPUs.

2006-09-27T08:38:11+00:00

This adds support for the aforementioned CPU subtypes, and cleans
up some build issues encountered as a result.

Signed-off-by: Paul Mundt