linux.git/include/asm-ppc/pgtable.h, branch v2.6.16

[PATCH] fix remaining missing includes

2005-11-07T15:53:41+00:00

Fix more include file problems that surfaced since I submitted the previous
fix-missing-includes.patch.  This should now allow not to include sched.h
from module.h, which is done by a followup patch.

Signed-off-by: Tim Schmielau 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

[PATCH] ppc: make phys_mem_access_prot() work with pfns instead of addresses

2005-10-29T04:25:49+00:00

Change the phys_mem_access_prot() function to take a pfn instead of an
address.  This allows mmap64() to work on /dev/mem for addresses above 4G
on 32-bit architectures.  We start with a pfn in mmap_mem(), so there's no
need to convert to an address; in fact, it's actively bad, since the
conversion can overflow when the address is above 4G.

Similarly fix the ppc32 page_is_ram() function to avoid a conversion to an
address by directly comparing to max_pfn.  Working with max_pfn instead of
high_memory fixes page_is_ram() to give the right answer for highmem pages.

Signed-off-by: Roland Dreier 
Cc: Anton Blanchard 
Cc: Benjamin Herrenschmidt 
Signed-off-by: Andrew Morton 
Signed-off-by: Paul Mackerras

[PATCH] feature removal of io_remap_page_range()

2005-09-13T15:22:33+00:00

As written in Documentation/feature-removal-schedule.txt, remove the
io_remap_page_range() kernel API.

Signed-off-by: Randy Dunlap 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

[PATCH] ppc32: ppc440 pagetable attributes (comments updates)

2005-08-06T16:23:57+00:00

Here's an incremental patch with comment updates and some additional
grammar cleanups.

Signed-off-by: Matt Porter 
Signed-off-by: Linus Torvalds

[PATCH] ppc32: fix ppc440 pagetable attributes

2005-08-05T23:53:03+00:00

This patch fixes a bug in the PPC440 pagetable attributes that breaks swap
support.  It also adds some notes on the PPC440 attribute fields.

Signed-off-by: Geoff Levand  for CELF
Signed-off-by: Matt Porter 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

[PATCH] ppc32: Clean up NUM_TLBCAMS usage for Freescale Book-E PPC's

2005-06-22T01:46:24+00:00

Made the number of TLB CAM entries private and converted the board
consumers to use num_tlbcam_entries which is setup at boot time from
configuration registers.  This way the only consumers of the #define
NUM_TLBCAMS are the arrays used to manage the TLB.

Signed-off-by: Kumar Gala 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

[PATCH] freepgt: arch FIRST_USER_ADDRESS 0

2005-04-19T20:29:23+00:00

Replace misleading definition of FIRST_USER_PGD_NR 0 by definition of
FIRST_USER_ADDRESS 0 in all the MMU architectures beyond arm and arm26.

Signed-off-by: Hugh Dickins 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

[PATCH] ppc32: Support 36-bit physical addressing on e500

2005-04-16T22:24:22+00:00

To add support for 36-bit physical addressing on e500 the following changes
have been made.  The changes are generalized to support any physical address
size larger than 32-bits:

* Allow FSL Book-E parts to use a 64-bit PTE, it is 44-bits of pfn, 20-bits
  of flags.

* Introduced new CPU feature (CPU_FTR_BIG_PHYS) to allow runtime handling of
  updating hardware register (SPRN_MAS7) which holds the upper 32-bits of
  physical address that will be written into the TLB.  This is useful since
  not all e500 cores support 36-bit physical addressing.

* Currently have a pass through implementation of fixup_bigphys_addr

* Moved _PAGE_DIRTY in the 64-bit PTE case to free room for three additional
  storage attributes that may exist in future FSL Book-E cores and updated
  fault handler to copy these bits into the hardware TLBs.

Signed-off-by: Kumar Gala 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

[PATCH] ppc32: Allow adjust of pfn offset in pte

2005-04-16T22:24:21+00:00

Allow the pfn to be offset by more than just PAGE_SHIFT in the pte.  Today,
PAGE_SHIFT tends to allow us to have 12-bits of flags in the pte.  In the
future if we have a larger pte we can allocate more bits for flags by
offsetting the pfn even further.

Signed-off-by: Kumar Gala 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

[PATCH] ppc32: Fix pte_update for 64-bit PTEs

2005-04-16T22:24:20+00:00

While the existing pte_update code handled atomically modifying a 64-bit PTE,
it did not return all 64-bits of the PTE before it was modified.  This causes
problems in some places that expect the full PTE to be returned, like
ptep_get_and_clear().

Created a new pte_update function that is conditional on CONFIG_PTE_64BIT.  It
atomically reads the low PTE word which all PTE flags are required to be in
and returns a premodified full 64-bit PTE.

Since we now have an explicit 64-bit PTE version of pte_update we can also
remove the hack that existed to get the low PTE word regardless of size.

Signed-off-by: Kumar Gala 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds