<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/include/asm-powerpc, branch v2.6.26-rc2</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>Merge branch 'for-2.6.26' of master.kernel.org:/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx into merge</title>
<updated>2008-05-09T10:12:06+00:00</updated>
<author>
<name>Paul Mackerras</name>
<email>paulus@samba.org</email>
</author>
<published>2008-05-09T10:12:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2a5f2e3e6cd1ce9fb3f8b186b6bc9aa1f1497a92'/>
<id>2a5f2e3e6cd1ce9fb3f8b186b6bc9aa1f1497a92</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] 4xx: Fix problem with new TLB storage attibute fields on 440x6 core</title>
<updated>2008-05-06T15:36:20+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2008-05-05T06:53:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=a96df496ed1496f3e52a9b3c860cf967aa48adda'/>
<id>a96df496ed1496f3e52a9b3c860cf967aa48adda</id>
<content type='text'>
The new 440x6 core used on AMCC 460EX/GT introduces new storage attibure
fields to the TLB2 word. Those are:

Bit  11   12   13   14   15
     WL1  IL1I IL1D IL2I IL2D

With these bits the cache (L1 and L2) can be configured in a more flexible
way, instruction- and data-cache independently now. The "old" I and W bits
are still available and setting these old bits will automically set these
new bits too (for backward compatibilty).

The current code does not clear these fields resulting in disabling the cache
by chance. This patch now makes sure that these new bits are cleared when
the TLB2 word is written.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Josh Boyer &lt;jwboyer@linux.vnet.ibm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The new 440x6 core used on AMCC 460EX/GT introduces new storage attibure
fields to the TLB2 word. Those are:

Bit  11   12   13   14   15
     WL1  IL1I IL1D IL2I IL2D

With these bits the cache (L1 and L2) can be configured in a more flexible
way, instruction- and data-cache independently now. The "old" I and W bits
are still available and setting these old bits will automically set these
new bits too (for backward compatibilty).

The current code does not clear these fields resulting in disabling the cache
by chance. This patch now makes sure that these new bits are cleared when
the TLB2 word is written.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Josh Boyer &lt;jwboyer@linux.vnet.ibm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] devres: Add devm_ioremap_prot()</title>
<updated>2008-05-05T06:47:14+00:00</updated>
<author>
<name>Emil Medve</name>
<email>Emilian.Medve@Freescale.com</email>
</author>
<published>2008-05-02T20:34:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b41e5fffe8b81fc939067d8c1c195cc79115d5a3'/>
<id>b41e5fffe8b81fc939067d8c1c195cc79115d5a3</id>
<content type='text'>
We provide an ioremap_flags, so this provides a corresponding
devm_ioremap_prot.  The slight name difference is at Ben
Herrenschmidt's request as he plans on changing ioremap_flags to
ioremap_prot in the future.

Signed-off-by: Emil Medve &lt;Emilian.Medve@Freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Tejun Heo &lt;htejun@gmail.com&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We provide an ioremap_flags, so this provides a corresponding
devm_ioremap_prot.  The slight name difference is at Ben
Herrenschmidt's request as he plans on changing ioremap_flags to
ioremap_prot in the future.

Signed-off-by: Emil Medve &lt;Emilian.Medve@Freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Tejun Heo &lt;htejun@gmail.com&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] spufs: handle faults while the context switch pending flag is set</title>
<updated>2008-05-05T03:33:44+00:00</updated>
<author>
<name>Luke Browning</name>
<email>lukebr@linux.vnet.ibm.com</email>
</author>
<published>2008-04-28T07:35:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=de1028927ae3487e2e450dacf50fbf32042aee18'/>
<id>de1028927ae3487e2e450dacf50fbf32042aee18</id>
<content type='text'>
Currently, page fault handlers don't issue a mfc restart if the context
switch pending flag is set, which can leave us with a hanging DMA after
a context restore.

This patch introduces fault pending flag that is set by the fault
handler and read by the context switch code, so that the latter can add
the restart bit at the right spot, after it has successfuly saved the
state of the mfc control register.

Signed-off-by: Luke Browning &lt;lukebr@linux.vnet.ibm.com&gt;
Signed-off-by: Jeremy Kerr &lt;jk@ozlabs.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently, page fault handlers don't issue a mfc restart if the context
switch pending flag is set, which can leave us with a hanging DMA after
a context restore.

This patch introduces fault pending flag that is set by the fault
handler and read by the context switch code, so that the latter can add
the restart bit at the right spot, after it has successfuly saved the
state of the mfc control register.

Signed-off-by: Luke Browning &lt;lukebr@linux.vnet.ibm.com&gt;
Signed-off-by: Jeremy Kerr &lt;jk@ozlabs.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] spufs: fix concurrent delivery of class 0 &amp; 1 exceptions</title>
<updated>2008-05-05T03:33:44+00:00</updated>
<author>
<name>Luke Browning</name>
<email>lukebr@linux.vnet.ibm.com</email>
</author>
<published>2008-04-27T18:41:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f3d69e0507f84903059d456c5d19f10b2df3ac69'/>
<id>f3d69e0507f84903059d456c5d19f10b2df3ac69</id>
<content type='text'>
SPU class 0 &amp; 1 exceptions may occur in parallel, so we may end up
overwriting csa.dsisr.

This change adds dedicated fields for each class to the spu and the spu
context so that fault data is not overwritten.

Signed-off-by: Luke Browning &lt;lukebr@linux.vnet.ibm.com&gt;
Signed-off-by: Jeremy Kerr &lt;jk@ozlabs.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
SPU class 0 &amp; 1 exceptions may occur in parallel, so we may end up
overwriting csa.dsisr.

This change adds dedicated fields for each class to the spu and the spu
context so that fault data is not overwritten.

Signed-off-by: Luke Browning &lt;lukebr@linux.vnet.ibm.com&gt;
Signed-off-by: Jeremy Kerr &lt;jk@ozlabs.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>KVM: ppc: Handle guest idle by emulating MSR[WE] writes</title>
<updated>2008-05-04T11:44:44+00:00</updated>
<author>
<name>Hollis Blanchard</name>
<email>hollisb@us.ibm.com</email>
</author>
<published>2008-04-25T22:55:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=45c5eb67da5a668abe79c23a7e64dbc87a600f90'/>
<id>45c5eb67da5a668abe79c23a7e64dbc87a600f90</id>
<content type='text'>
This reduces host CPU usage when the guest is idle. However, the guest must
set MSR[WE] in its idle loop, which Linux did not do until 2.6.26.

Signed-off-by: Hollis Blanchard &lt;hollisb@us.ibm.com&gt;
Signed-off-by: Jerone Young &lt;jyoung5@us.ibm.com&gt;
Signed-off-by: Avi Kivity &lt;avi@qumranet.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This reduces host CPU usage when the guest is idle. However, the guest must
set MSR[WE] in its idle loop, which Linux did not do until 2.6.26.

Signed-off-by: Hollis Blanchard &lt;hollisb@us.ibm.com&gt;
Signed-off-by: Jerone Young &lt;jyoung5@us.ibm.com&gt;
Signed-off-by: Avi Kivity &lt;avi@qumranet.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>unified (weak) sys_pipe implementation</title>
<updated>2008-05-03T20:50:33+00:00</updated>
<author>
<name>Ulrich Drepper</name>
<email>drepper@redhat.com</email>
</author>
<published>2008-05-03T19:10:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d35c7b0e54a596c5a8134d75999b7f391a9c6550'/>
<id>d35c7b0e54a596c5a8134d75999b7f391a9c6550</id>
<content type='text'>
This replaces the duplicated arch-specific versions of "sys_pipe()" with
one unified implementation.  This removes almost 250 lines of duplicated
code.

It's marked __weak, so that *if* an architecture wants to override the
default implementation it can do so by simply having its own replacement
version, since many architectures use alternate calling conventions for
the 'pipe()' system call for legacy reasons (ie traditional UNIX
implementations often return the two file descriptors in registers)

I still haven't changed the cris version even though Linus says the BKL
isn't needed.  The arch maintainer can easily do it if there are really
no obstacles.

Signed-off-by: Ulrich Drepper &lt;drepper@redhat.com&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This replaces the duplicated arch-specific versions of "sys_pipe()" with
one unified implementation.  This removes almost 250 lines of duplicated
code.

It's marked __weak, so that *if* an architecture wants to override the
default implementation it can do so by simply having its own replacement
version, since many architectures use alternate calling conventions for
the 'pipe()' system call for legacy reasons (ie traditional UNIX
implementations often return the two file descriptors in registers)

I still haven't changed the cris version even though Linus says the BKL
isn't needed.  The arch maintainer can easily do it if there are really
no obstacles.

Signed-off-by: Ulrich Drepper &lt;drepper@redhat.com&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge git://git.kernel.org/pub/scm/linux/kernel/git/hpa/linux-2.6-inttypes</title>
<updated>2008-05-03T17:54:23+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2008-05-03T17:54:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e098675635479e9267cf2b12fb969c463cf506ab'/>
<id>e098675635479e9267cf2b12fb969c463cf506ab</id>
<content type='text'>
* git://git.kernel.org/pub/scm/linux/kernel/git/hpa/linux-2.6-inttypes: (24 commits)
  Make constants in kernel/timeconst.h fixed 64 bits
  types: add C99-style constructors to &lt;asm-generic/int-*.h&gt;
  xtensa: types: use &lt;asm-generic/int-*.h&gt; for the xtensa architecture
  x86: types: use &lt;asm-generic/int-*.h&gt; for the x86 architecture
  v850: types: use &lt;asm-generic/int-*.h&gt; for the v850 architecture
  sparc64: types: use &lt;asm-generic/int-*.h&gt; for the sparc64 architecture
  sparc: types: use &lt;asm-generic/int-*.h&gt; for the sparc architecture
  sh: types: use &lt;asm-generic/int-*.h&gt; for the sh architecture
  s390: types: use &lt;asm-generic/int-*.h&gt; for the s390 architecture
  powerpc: types: use &lt;asm-generic/int-*.h&gt; for the powerpc architecture
  parisc: types: use &lt;asm-generic/int-*.h&gt; for the parisc architecture
  mn10300: types: use &lt;asm-generic/int-*.h&gt; for the mn10300 architecture
  mips: types: use &lt;asm-generic/int-*.h&gt; for the mips architecture
  m68k: types: use &lt;asm-generic/int-*.h&gt; for the m68k architecture
  m32r: types: use &lt;asm-generic/int-*.h&gt; for the m32r architecture
  ia64: types: use &lt;asm-generic/int-*.h&gt; for the ia64 architecture
  h8300: types: use &lt;asm-generic/int-*.h&gt; for the h8300 architecture
  frv: types: use &lt;asm-generic/int-*.h&gt; for the frv architecture
  cris: types: use &lt;asm-generic/int-*.h&gt; for the cris architecture
  blackfin: types: use &lt;asm-generic/int-*.h&gt; for the blackfin architecture
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* git://git.kernel.org/pub/scm/linux/kernel/git/hpa/linux-2.6-inttypes: (24 commits)
  Make constants in kernel/timeconst.h fixed 64 bits
  types: add C99-style constructors to &lt;asm-generic/int-*.h&gt;
  xtensa: types: use &lt;asm-generic/int-*.h&gt; for the xtensa architecture
  x86: types: use &lt;asm-generic/int-*.h&gt; for the x86 architecture
  v850: types: use &lt;asm-generic/int-*.h&gt; for the v850 architecture
  sparc64: types: use &lt;asm-generic/int-*.h&gt; for the sparc64 architecture
  sparc: types: use &lt;asm-generic/int-*.h&gt; for the sparc architecture
  sh: types: use &lt;asm-generic/int-*.h&gt; for the sh architecture
  s390: types: use &lt;asm-generic/int-*.h&gt; for the s390 architecture
  powerpc: types: use &lt;asm-generic/int-*.h&gt; for the powerpc architecture
  parisc: types: use &lt;asm-generic/int-*.h&gt; for the parisc architecture
  mn10300: types: use &lt;asm-generic/int-*.h&gt; for the mn10300 architecture
  mips: types: use &lt;asm-generic/int-*.h&gt; for the mips architecture
  m68k: types: use &lt;asm-generic/int-*.h&gt; for the m68k architecture
  m32r: types: use &lt;asm-generic/int-*.h&gt; for the m32r architecture
  ia64: types: use &lt;asm-generic/int-*.h&gt; for the ia64 architecture
  h8300: types: use &lt;asm-generic/int-*.h&gt; for the h8300 architecture
  frv: types: use &lt;asm-generic/int-*.h&gt; for the frv architecture
  cris: types: use &lt;asm-generic/int-*.h&gt; for the cris architecture
  blackfin: types: use &lt;asm-generic/int-*.h&gt; for the blackfin architecture
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc</title>
<updated>2008-05-03T17:01:33+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2008-05-03T17:01:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c36c804559d3a891a2e655ba8185b4fa7eaee156'/>
<id>c36c804559d3a891a2e655ba8185b4fa7eaee156</id>
<content type='text'>
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc:
  [POWERPC] Bolt in SLB entry for kernel stack on secondary cpus
  [POWERPC] PS3: Update ps3_defconfig
  [POWERPC] PS3: Remove unsupported wakeup sources
  [POWERPC] PS3: Make ps3_virq_setup and ps3_virq_destroy static
  [POWERPC] PS3: Add time include to lpm
  [POWERPC] Fix slb.c compile warnings
  [POWERPC] Xilinx: Fix compile warnings
  [POWERPC] Squash build warning for print of resource_size_t in fsl_soc.c
  [RAPIDIO] fix current kernel-doc notation
  [POWERPC] 86xx: mpc8610_hpcd: add support for PCI Express x8 slot
  Fix a potential issue in mpc52xx uart driver
  [POWERPC] mpc5200: Allow for fixed speed MII configurations
  [POWERPC] 86xx: Fix the wrong serial1 interrupt for 8610 board
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc:
  [POWERPC] Bolt in SLB entry for kernel stack on secondary cpus
  [POWERPC] PS3: Update ps3_defconfig
  [POWERPC] PS3: Remove unsupported wakeup sources
  [POWERPC] PS3: Make ps3_virq_setup and ps3_virq_destroy static
  [POWERPC] PS3: Add time include to lpm
  [POWERPC] Fix slb.c compile warnings
  [POWERPC] Xilinx: Fix compile warnings
  [POWERPC] Squash build warning for print of resource_size_t in fsl_soc.c
  [RAPIDIO] fix current kernel-doc notation
  [POWERPC] 86xx: mpc8610_hpcd: add support for PCI Express x8 slot
  Fix a potential issue in mpc52xx uart driver
  [POWERPC] mpc5200: Allow for fixed speed MII configurations
  [POWERPC] 86xx: Fix the wrong serial1 interrupt for 8610 board
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: types: use &lt;asm-generic/int-*.h&gt; for the powerpc architecture</title>
<updated>2008-05-02T23:18:35+00:00</updated>
<author>
<name>H. Peter Anvin</name>
<email>hpa@zytor.com</email>
</author>
<published>2008-04-06T17:35:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=3f02c4e0e5d20884677a0259de42e553514534f9'/>
<id>3f02c4e0e5d20884677a0259de42e553514534f9</id>
<content type='text'>
This modifies &lt;asm-powerpc/types.h&gt; to use the &lt;asm-generic/int-*.h&gt;
generic include files.

Signed-off-by: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Anton Blanchard &lt;anton@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This modifies &lt;asm-powerpc/types.h&gt; to use the &lt;asm-generic/int-*.h&gt;
generic include files.

Signed-off-by: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Anton Blanchard &lt;anton@samba.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
