<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/include/asm-powerpc/reg.h, branch v2.6.26</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>[POWERPC] move celleb DABRX definitions</title>
<updated>2008-03-03T07:03:14+00:00</updated>
<author>
<name>Jens Osterkamp</name>
<email>jens@de.ibm.com</email>
</author>
<published>2008-02-28T10:26:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9176c0b1f5a9099cebc07458042ae6a7c75af7b2'/>
<id>9176c0b1f5a9099cebc07458042ae6a7c75af7b2</id>
<content type='text'>
This moves the private DABRX definitions for celleb from beat.h to
reg.h to make them usable for all.

Signed-off-by: Jens Osterkamp &lt;jens@de.ibm.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
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<pre>
This moves the private DABRX definitions for celleb from beat.h to
reg.h to make them usable for all.

Signed-off-by: Jens Osterkamp &lt;jens@de.ibm.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] Made FSL Book-E PMC support more generic</title>
<updated>2008-02-06T05:34:14+00:00</updated>
<author>
<name>Andy Fleming</name>
<email>afleming@freescale.com</email>
</author>
<published>2008-02-05T00:27:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=39aef685af431c032ffd2763ec8782b13c32520c'/>
<id>39aef685af431c032ffd2763ec8782b13c32520c</id>
<content type='text'>
Some of the more recent e300 cores have the same performance monitor
implementation as the e500.  e300 isn't book-e, so the name isn't
really appropriate.  In preparation for e300 support, rename a bunch
of fsl_booke things to say fsl_emb (Freescale Embedded Performance Monitors).

Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
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<pre>
Some of the more recent e300 cores have the same performance monitor
implementation as the e500.  e300 isn't book-e, so the name isn't
really appropriate.  In preparation for e300 support, rename a bunch
of fsl_booke things to say fsl_emb (Freescale Embedded Performance Monitors).

Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] Add definition of Cell bookmark SPR</title>
<updated>2008-01-25T11:52:51+00:00</updated>
<author>
<name>Geoff Levand</name>
<email>geoffrey.levand@am.sony.com</email>
</author>
<published>2008-01-18T20:29:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=cda563fb9ca2c26ff720110b25e96205b71d3bae'/>
<id>cda563fb9ca2c26ff720110b25e96205b71d3bae</id>
<content type='text'>
Add a definition for the Cell bookmark SPR to asm-powerpc/regs.h.

Signed-off-by: Geoff Levand &lt;geoffrey.levand@am.sony.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a definition for the Cell bookmark SPR to asm-powerpc/regs.h.

Signed-off-by: Geoff Levand &lt;geoffrey.levand@am.sony.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] Use SLB size from the device tree</title>
<updated>2007-12-11T02:45:56+00:00</updated>
<author>
<name>Michael Neuling</name>
<email>mikey@neuling.org</email>
</author>
<published>2007-12-06T06:24:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=584f8b71a2e8abdaeb4b6f4fddaf542b61392453'/>
<id>584f8b71a2e8abdaeb4b6f4fddaf542b61392453</id>
<content type='text'>
Currently we hardwire the number of SLBs to 64, but PAPR says we
should use the ibm,slb-size property to obtain the number of SLB
entries.  This uses this property instead of assuming 64.  If no
property is found, we assume 64 entries as before.

This soft patches the SLB handler, so it shouldn't change performance
at all.

Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
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<pre>
Currently we hardwire the number of SLBs to 64, but PAPR says we
should use the ibm,slb-size property to obtain the number of SLB
entries.  This uses this property instead of assuming 64.  If no
property is found, we assume 64 entries as before.

This soft patches the SLB handler, so it shouldn't change performance
at all.

Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] Remove APUS support from arch/ppc</title>
<updated>2007-09-17T05:15:04+00:00</updated>
<author>
<name>Adrian Bunk</name>
<email>bunk@kernel.org</email>
</author>
<published>2007-08-27T21:29:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e6b6e3ffb9ee8926f9f2f7dc9147df73e27d5828'/>
<id>e6b6e3ffb9ee8926f9f2f7dc9147df73e27d5828</id>
<content type='text'>
Current status of APUS:
- arch/powerpc/: removed in 2.6.23
- arch/ppc/: marked BROKEN since 2 years

This therefore removes the remaining parts of APUS support from
arch/ppc, include/asm-ppc, arch/powerpc and include/asm-powerpc.

Signed-off-by: Adrian Bunk &lt;bunk@stusta.de&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Current status of APUS:
- arch/powerpc/: removed in 2.6.23
- arch/ppc/: marked BROKEN since 2 years

This therefore removes the remaining parts of APUS support from
arch/ppc, include/asm-ppc, arch/powerpc and include/asm-powerpc.

Signed-off-by: Adrian Bunk &lt;bunk@stusta.de&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] pasemi: Export more SPRs to sysfs when CONFIG_DEBUG_KERNEL=y</title>
<updated>2007-09-13T15:33:21+00:00</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2007-09-05T02:09:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2e1957fd47b9d4b7bf35be2ec3d4b5e3eefe5cc0'/>
<id>2e1957fd47b9d4b7bf35be2ec3d4b5e3eefe5cc0</id>
<content type='text'>
Export some of the implementation-specific registers via sysfs.
Useful when debugging, etc.

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Export some of the implementation-specific registers via sysfs.
Useful when debugging, etc.

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] Oprofile enhanced instruction sampling support</title>
<updated>2007-07-10T11:55:48+00:00</updated>
<author>
<name>will schmidt</name>
<email>will_schmidt@vnet.ibm.com</email>
</author>
<published>2007-06-26T16:12:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=078f194045f892a10f4a5406e7cb06a7f8d42c57'/>
<id>078f194045f892a10f4a5406e7cb06a7f8d42c57</id>
<content type='text'>
Oprofile enhanced instruction sampling support.

When performing instruction sampling, the mmcra[SLOT] field can be used to
more accurately identify the address of the sampled instruction.

Tested on power4, js20, power5 and power5+.

Signed-off-by: Will Schmidt &lt;will_schmidt@vnet.ibm.com&gt;
cc: Maynard Johnson &lt;maynardj@us.ibm.com&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Oprofile enhanced instruction sampling support.

When performing instruction sampling, the mmcra[SLOT] field can be used to
more accurately identify the address of the sampled instruction.

Tested on power4, js20, power5 and power5+.

Signed-off-by: Will Schmidt &lt;will_schmidt@vnet.ibm.com&gt;
cc: Maynard Johnson &lt;maynardj@us.ibm.com&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] pasemi: PA6T oprofile support</title>
<updated>2007-04-24T11:31:51+00:00</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2007-04-18T06:38:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=25fc530eed1ca9ccde2a1e96d0b2060867f76bb2'/>
<id>25fc530eed1ca9ccde2a1e96d0b2060867f76bb2</id>
<content type='text'>
Oprofile support for PA6T, kernel side.

Also rename the PA6T_SPRN.* defines to SPRN_PA6T.*.

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Oprofile support for PA6T, kernel side.

Also rename the PA6T_SPRN.* defines to SPRN_PA6T.*.

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] pasemi: SMP timebase sync</title>
<updated>2007-02-07T03:03:22+00:00</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2007-02-04T22:36:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c388cfebbf22acd2b6adf757b35e28d4be66ac7c'/>
<id>c388cfebbf22acd2b6adf757b35e28d4be66ac7c</id>
<content type='text'>
Timebase update is simple on PA6T, since global updates can be done from
one core by writing to an SPR.

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Timebase update is simple on PA6T, since global updates can be done from
one core by writing to an SPR.

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] pasemi: Idle loops</title>
<updated>2007-02-07T03:03:22+00:00</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2007-02-04T22:36:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=1199919b69ff9559a3d3444fb5eb45b7cc48264d'/>
<id>1199919b69ff9559a3d3444fb5eb45b7cc48264d</id>
<content type='text'>
Powersave support on PA6T. Right now it only uses 'doze' mode, and
will default to no savings (spin).

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Powersave support on PA6T. Right now it only uses 'doze' mode, and
will default to no savings (spin).

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
