linux.git/include/asm-mips/mipsregs.h, branch master

MIPS: Move headfiles to new location below arch/mips/include

2008-10-11T15:18:52+00:00

Signed-off-by: Ralf Baechle

[MIPS] Build fix: Fix irq flags type

2008-10-03T16:58:56+00:00

Though from a hardware perspective it would be sensible to use only a
32-bit unsigned int type Linux defines interrupt flags to be stored in
an unsigned long and nothing else.

Signed-off-by: Ralf Baechle

[MIPS] Add accessors for random register.

2008-06-05T17:13:15+00:00

Signed-off-by: Ralf Baechle

[MIPS] checkfiles: Fix "need space after that ','" errors.

2007-10-11T22:46:15+00:00

Signed-off-by: Ralf Baechle

[MIPS] Change names of local variables to silence sparse (part 2)

2007-07-12T16:41:10+00:00

This patch is an workaround for these sparse warnings:

include2/asm/mmu_context.h:172:2: warning: symbol 'flags' shadows an earlier one
include2/asm/mmu_context.h:133:16: originally declared here
include2/asm/mmu_context.h:232:2: warning: symbol 'flags' shadows an earlier one
include2/asm/mmu_context.h:203:16: originally declared here
include2/asm/mmu_context.h:277:3: warning: symbol 'flags' shadows an earlier one
include2/asm/mmu_context.h:250:16: originally declared here

Signed-off-by: Atsushi Nemoto 
Signed-off-by: Ralf Baechle

[MIPS] PMC MSP71xx mips common

2007-07-10T16:33:03+00:00

Patch to add mips common support for the PMC-Sierra MSP71xx devices.

Signed-off-by: Marc St-Jean 
Signed-off-by: Ralf Baechle

[MIPS] Enable support for the userlocal hardware register

2007-07-10T16:33:02+00:00

Which will cut down the cost of RDHWR $29 which is used to obtain the
TLS pointer and so far being emulated in software down to a single cycle
operation.

Signed-off-by: Ralf Baechle

[MIPS] Fix scheduling latency issue on 24K, 34K and 74K cores

2007-07-06T15:17:11+00:00

The idle loop goes to sleep using the WAIT instruction if !need_resched().
This has is suffering from from a race condition that if if just after
need_resched has returned 0 an interrupt might set TIF_NEED_RESCHED but
we've just completed the test so go to sleep anyway.  This would be
trivial to fix by just disabling interrupts during that sequence as in:

        local_irq_disable();
        if (!need_resched())
                __asm__("wait");
        local_irq_enable();

but the processor architecture leaves it undefined if a processor calling
WAIT with interrupts disabled will ever restart its pipeline and indeed
some processors have made use of the freedom provided by the architecture
definition.  This has been resolved and the Config7.WII bit indicates that
the use of WAIT is safe on 24K, 24KE and 34K cores.  It also is safe on
74K starting revision 2.1.0 so enable the use of WAIT with interrupts
disabled for 74K based on a c0_prid of at least that.

Signed-off-by: Ralf Baechle

[MIPS] Remove unused R10000 performance counter definitions.

2006-11-30T01:14:45+00:00

Signed-off-by: Ralf Baechle

[MIPS] vr41xx: Replace magic number for P4K bit with symbol.

2006-07-13T20:26:11+00:00

    
Signed-off-by: Yoichi Yuasa 
Signed-off-by: Ralf Baechle