linux.git/include/asm-mips/cpu-features.h, branch v2.6.23 Linux kernel source tree [MIPS] Enable support for the userlocal hardware register 2007-07-10T16:33:02+00:00 Ralf Baechle ralf@linux-mips.org 2007-07-10T16:33:02+00:00 a36920200c5b89d56120a5e839fe4a603d51b16c Which will cut down the cost of RDHWR $29 which is used to obtain the TLS pointer and so far being emulated in software down to a single cycle operation. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Which will cut down the cost of RDHWR $29 which is used to obtain the
TLS pointer and so far being emulated in software down to a single cycle
operation.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] FPU ownership management & preemption fixes 2007-03-17T01:03:26+00:00 Atsushi Nemoto anemo@mba.ocn.ne.jp 2007-03-09T16:07:45+00:00 53dc80287da43b75df2fe2658651d3c5160dad8e Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] Use the proper technical term for naming some of the cache macros. 2006-07-13T20:26:04+00:00 Ralf Baechle ralf@linux-mips.org 2006-07-06T12:04:01+00:00 fc5d2d279ff820172a698706d33e733d4578bd6c Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] Default cpu_has_mipsmt to a runtime check 2006-07-13T20:25:58+00:00 Chris Dearman chris@mips.com 2006-06-30T11:32:37+00:00 2e128dedcd66d2f17f42a45dacc223fa2dcd8acd Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] Fix configuration of R2 CPU features and multithreading. 2006-06-29T20:10:51+00:00 Ralf Baechle ralf@linux-mips.org 2006-06-05T16:24:46+00:00 f41ae0b2b9e5b4455cfc68dcc885f4fa2a973384 Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Don't include linux/config.h from anywhere else in include/ 2006-04-26T11:56:16+00:00 David Woodhouse dwmw2@infradead.org 2006-04-26T11:56:16+00:00 62c4f0a2d5a188f73a94f2cb8ea0dba3e7cf0a7f Signed-off-by: David Woodhouse <dwmw2@infradead.org> 
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
[MIPS] FPU affinity for MT ASE. 2006-04-19T02:14:28+00:00 Ralf Baechle ralf@linux-mips.org 2006-04-05T08:45:47+00:00 f088fc84f94c1a36943e28ad704a9a740a35f877 Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] local_r4k_flush_cache_page fix 2006-03-18T16:59:27+00:00 Atsushi Nemoto anemo@mba.ocn.ne.jp 2006-03-13T09:23:03+00:00 de62893bc0725f8b5f0445250577cd7a10b2d8f8 If dcache_size != icache_size or dcache_size != scache_size, or set-associative cache, icache/scache does not flushed properly. Make blast_?cache_page_indexed() masks its index value correctly. Also, use physical address for physically indexed pcache/scache. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
    
If dcache_size != icache_size or dcache_size != scache_size, or
set-associative cache, icache/scache does not flushed properly.  Make
blast_?cache_page_indexed() masks its index value correctly.  Also,
use physical address for physically indexed pcache/scache.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
MIPS: Reorganize ISA constants strictly as bitmasks. 2006-01-10T13:39:07+00:00 Ralf Baechle ralf@ongar.mips.com 2005-12-09T12:20:49+00:00 0401572a9b9b2f368176b6e53f53004fd048a566 Signed-off-by: Ralf Baechle <ralf@ongar.mips.com> 
    
Signed-off-by: Ralf Baechle <ralf@ongar.mips.com>
MIPS: Introduce machinery for testing for MIPSxxR1/2. 2006-01-10T13:39:06+00:00 Ralf Baechle ralf@linux-mips.org 2005-12-08T14:04:24+00:00 b4672d37293cb045ec4d57e8b76a62810c96da71 Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>